thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
404 lines
16 KiB
Systemverilog
404 lines
16 KiB
Systemverilog
// retroDE_ps2 — tb_gs_textured_triangle (textured-triangle rung)
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//
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// FIRST textured-TRIANGLE test: drives a PSMCT32 DECAL textured,
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// NON-axis-aligned TRIANGLE (PRIM type 3, TME=1) through gs_stub and
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// verifies the framebuffer pixels equal the texel sampled at the
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// per-pixel AFFINE-interpolated (u,v).
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//
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// Datapath under test:
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// PRIM.TRI+TME + TEX0_1 + per-vertex UV
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// -> shared-divider gradient engine solves dU/dx,dU/dy,dV/dx,dV/dy
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// (steps 10..13) alongside R/G/B/A/Z
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// -> per-pixel affine (u,v) via interp_affine_uv (reuses the 32x16
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// interp multipliers)
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// -> gs_texture_unit (gs_texel_addr + PSMCT32 DECAL sample)
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// -> texel REPLACES the Gouraud color at emit.
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//
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// ZTE=0, ABE=0 for this rung (read2's only consumer is the texel fetch).
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//
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// Mapping trick (so the expected texel is exactly texel(x,y)): each
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// vertex's UV is set EQUAL to its screen (x,y). Both UV and screen XY
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// are then the SAME affine function of barycentric coords, so the
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// interpolated (u,v) == (x,y) at every interior pixel. The expected FB
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// pixel is therefore the preloaded texel(x,y).
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//
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// The texture is PRELOADED directly into vram_stub at TBP0*256 (same
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// upload bypass as tb_gs_textured_sprite) to isolate the sampling path.
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`timescale 1ns/1ps
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module tb_gs_textured_triangle;
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logic clk;
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logic rst_n;
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initial clk = 1'b0;
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always #5 clk = ~clk;
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logic gif_reg_wr_en;
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logic [7:0] gif_reg_num;
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logic [63:0] gif_reg_data;
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logic [7:0] bg_r, bg_g, bg_b;
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logic [63:0] pmode_q, dispfb1_q, display1_q;
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logic [63:0] prim_q, rgbaq_q, xyz2_q, xyzf2_q, frame_1_q, zbuf_1_q;
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logic [63:0] tex0_1_q;
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logic [13:0] tex0_1_cbp_q;
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logic [3:0] tex0_1_cpsm_q;
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logic tex0_1_csm_q;
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logic [4:0] tex0_1_csa_q;
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logic [2:0] tex0_1_cld_q;
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logic tex0_1_wr_q;
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logic [63:0] bitbltbuf_q, trxpos_q, trxreg_q, trxdir_q;
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logic trxdir_wr_q;
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logic prim_complete;
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logic [31:0] prim_complete_count;
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logic [63:0] prim_v0_q, prim_v1_q, prim_v2_q;
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logic [63:0] prim_color_q;
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logic [63:0] prim_color_v0_q, prim_color_v1_q, prim_color_v2_q;
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trace_pkg::vertex_t prim_v0_decoded_q, prim_v1_decoded_q, prim_v2_decoded_q;
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trace_pkg::color_t prim_v0_color_decoded_q, prim_v1_color_decoded_q, prim_v2_color_decoded_q;
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logic pixel_emit;
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logic [31:0] pixel_emit_count;
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logic [11:0] pixel_x_q, pixel_y_q;
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logic [63:0] pixel_color_q;
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logic [8:0] pixel_fbp_q;
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logic [5:0] pixel_fbw_q, pixel_psm_q;
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logic [31:0] pixel_fb_addr_q;
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logic raster_pixel_emit;
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logic [31:0] raster_pixel_emit_count;
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logic [11:0] raster_pixel_x_q, raster_pixel_y_q;
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logic [63:0] raster_pixel_color_q;
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logic [31:0] raster_pixel_fb_addr_q;
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logic [3:0] raster_pixel_be_q;
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logic [31:0] raster_pixel_mask_q;
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logic [5:0] raster_pixel_psm_q;
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logic raster_active;
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logic raster_overflow;
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logic raster_fifo_full;
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logic raster_degenerate;
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logic tex_rd_en;
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logic [31:0] tex_rd_addr;
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logic [31:0] tex_rd_data;
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logic gs_ev_valid;
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trace_pkg::subsys_e gs_ev_subsys;
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trace_pkg::event_e gs_ev_event;
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logic [63:0] gs_ev_arg0, gs_ev_arg1, gs_ev_arg2, gs_ev_arg3;
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logic [31:0] gs_ev_flags;
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gs_stub u_gs (
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.clk(clk), .rst_n(rst_n),
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.reg_wr_en(1'b0), .reg_wr_addr(16'd0), .reg_wr_data(64'd0),
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.gif_reg_wr_en(gif_reg_wr_en),
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.gif_reg_num(gif_reg_num),
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.gif_reg_data(gif_reg_data),
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.bg_r(bg_r), .bg_g(bg_g), .bg_b(bg_b),
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.pmode_q(pmode_q), .dispfb1_q(dispfb1_q), .display1_q(display1_q),
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.prim_q(prim_q), .rgbaq_q(rgbaq_q),
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.xyz2_q(xyz2_q), .xyzf2_q(xyzf2_q),
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.frame_1_q(frame_1_q), .zbuf_1_q(zbuf_1_q),
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.tex0_1_q(tex0_1_q),
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.tex0_1_cbp_q(tex0_1_cbp_q),
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.tex0_1_cpsm_q(tex0_1_cpsm_q),
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.tex0_1_csm_q(tex0_1_csm_q),
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.tex0_1_csa_q(tex0_1_csa_q),
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.tex0_1_cld_q(tex0_1_cld_q),
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.tex0_1_wr_q(tex0_1_wr_q),
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.bitbltbuf_q(bitbltbuf_q), .trxpos_q(trxpos_q),
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.trxreg_q(trxreg_q), .trxdir_q(trxdir_q),
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.trxdir_wr_q(trxdir_wr_q),
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.prim_complete(prim_complete),
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.prim_complete_count(prim_complete_count),
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.prim_v0_q(prim_v0_q), .prim_v1_q(prim_v1_q), .prim_v2_q(prim_v2_q),
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.prim_color_q(prim_color_q),
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.prim_color_v0_q(prim_color_v0_q),
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.prim_color_v1_q(prim_color_v1_q),
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.prim_color_v2_q(prim_color_v2_q),
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.prim_v0_decoded_q(prim_v0_decoded_q),
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.prim_v1_decoded_q(prim_v1_decoded_q),
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.prim_v2_decoded_q(prim_v2_decoded_q),
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.prim_v0_color_decoded_q(prim_v0_color_decoded_q),
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.prim_v1_color_decoded_q(prim_v1_color_decoded_q),
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.prim_v2_color_decoded_q(prim_v2_color_decoded_q),
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.pixel_emit(pixel_emit),
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.pixel_emit_count(pixel_emit_count),
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.pixel_x_q(pixel_x_q), .pixel_y_q(pixel_y_q),
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.pixel_color_q(pixel_color_q),
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.pixel_fbp_q(pixel_fbp_q),
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.pixel_fbw_q(pixel_fbw_q),
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.pixel_psm_q(pixel_psm_q),
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.pixel_fb_addr_q(pixel_fb_addr_q),
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.raster_pixel_emit(raster_pixel_emit),
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.raster_pixel_emit_count(raster_pixel_emit_count),
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.raster_pixel_x_q(raster_pixel_x_q),
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.raster_pixel_y_q(raster_pixel_y_q),
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.raster_pixel_color_q(raster_pixel_color_q),
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.raster_pixel_fb_addr_q(raster_pixel_fb_addr_q),
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.raster_pixel_be_q(raster_pixel_be_q),
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.raster_pixel_mask_q(raster_pixel_mask_q),
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.raster_pixel_psm_q(raster_pixel_psm_q),
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.raster_active(raster_active),
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.raster_overflow(raster_overflow),
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.raster_fifo_full(raster_fifo_full),
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.raster_degenerate(raster_degenerate),
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.tex_rd_en(tex_rd_en),
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.tex_rd_addr(tex_rd_addr),
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.tex_rd_data(tex_rd_data),
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.ev_valid(gs_ev_valid),
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.ev_subsys(gs_ev_subsys),
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.ev_event(gs_ev_event),
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.ev_arg0(gs_ev_arg0), .ev_arg1(gs_ev_arg1),
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.ev_arg2(gs_ev_arg2), .ev_arg3(gs_ev_arg3),
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.ev_flags(gs_ev_flags)
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);
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logic [31:0] vram_read_addr;
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logic [31:0] vram_read_data;
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localparam int VRAM_BYTES = 16384;
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vram_stub #(.BYTES(VRAM_BYTES)) u_vram (
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.clk(clk), .rst_n(rst_n),
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.write_en (raster_pixel_emit),
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.write_addr(raster_pixel_fb_addr_q),
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.write_data(raster_pixel_color_q[31:0]),
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.write_be (raster_pixel_be_q),
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.write_mask(raster_pixel_mask_q),
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.read_addr (vram_read_addr),
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.read_data (vram_read_data),
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.read2_addr(tex_rd_addr),
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.read2_data(tex_rd_data)
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);
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// ----- GIF register numbers -----
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localparam logic [7:0] R_PRIM = 8'h00;
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localparam logic [7:0] R_RGBAQ = 8'h01;
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localparam logic [7:0] R_UV = 8'h03;
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localparam logic [7:0] R_XYZ2 = 8'h05;
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localparam logic [7:0] R_TEX0_1 = 8'h06;
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localparam logic [7:0] R_FRAME_1 = 8'h4C;
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// PRIM: type=3 (TRIANGLE) at [2:0]; TME at bit 4.
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localparam logic [63:0] PRIM_TRI_TEX = 64'd3 | (64'd1 << 4);
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// FRAME_1: FBP=0, FBW=1, PSM=PSMCT32.
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localparam logic [63:0] FRAME_1_FB0 = 64'h0000_0000_0001_0000;
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// TEX0_1: TBP0=8 (base 2048 B), TBW=1 (64 texels/row), PSM=PSMCT32.
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localparam logic [13:0] TEX_TBP0 = 14'd8;
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localparam logic [5:0] TEX_TBW = 6'd1;
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localparam logic [63:0] TEX0_VAL = {30'd0, 6'd0 /*TH*/, 4'd0 /*TW*/,
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6'd0 /*PSM*/, TEX_TBW, TEX_TBP0};
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localparam logic [31:0] TEX_BASE_BYTES = 32'd8 * 32'd256; // 2048
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localparam int TEX_ROW_TEXELS = 64; // TBW*64
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localparam int FB0_STRIDE = 64 * 4; // FBW=1 -> 64 px/row * 4 B
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// Recognizable texel pattern (distinct per (x,y)).
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function automatic logic [31:0] texel(input int x, input int y);
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return 32'hFF000000 | (x << 8) | (y << 16) | 32'h00000050;
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endfunction
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// ----- drive helpers -----
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task automatic drive_reg(input logic [7:0] num, input logic [63:0] data);
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@(negedge clk);
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gif_reg_wr_en = 1'b1; gif_reg_num = num; gif_reg_data = data;
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@(posedge clk);
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endtask
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task automatic drive_idle();
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@(negedge clk);
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gif_reg_wr_en = 1'b0; gif_reg_num = 8'd0; gif_reg_data = 64'd0;
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@(posedge clk);
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endtask
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function automatic logic [63:0] xyz2_data(input int x, input int y);
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return {32'd0, 12'(y), 4'd0, 12'(x), 4'd0};
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endfunction
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function automatic logic [63:0] rgbaq(input int r, input int g, input int b);
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return {32'd0, 8'hFF, 8'(b), 8'(g), 8'(r)};
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endfunction
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// UV reg: U=[13:0], V=[27:14], 10.4 fixed-point (integer << 4).
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function automatic logic [63:0] uv_data(input int ui, input int vi);
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logic [13:0] u_fp, v_fp;
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u_fp = 14'(ui) << 4;
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v_fp = 14'(vi) << 4;
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return {36'd0, v_fp, u_fp};
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endfunction
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task automatic vram_word(input logic [31:0] byte_addr, output logic [31:0] word);
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vram_read_addr = byte_addr;
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#1;
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word = vram_read_data;
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endtask
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task automatic force_word(input logic [31:0] addr, input logic [31:0] data);
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u_vram.mem[addr + 0] = data[7:0];
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u_vram.mem[addr + 1] = data[15:8];
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u_vram.mem[addr + 2] = data[23:16];
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u_vram.mem[addr + 3] = data[31:24];
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endtask
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// ----- Independent reference: triangle inside test (matches DUT) -----
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int vx0, vy0, vx1, vy1, vx2, vy2;
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int sx1, sy1, sx2, sy2;
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function automatic int edge_f(input int px, input int py,
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input int ax, input int ay,
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input int bx, input int by);
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return (px - ax) * (by - ay) - (py - ay) * (bx - ax);
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endfunction
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function automatic bit tol(input int ax, input int ay, input int bx, input int by);
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int dx, dy; dx = bx - ax; dy = by - ay;
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return (dy > 0) || ((dy == 0) && (dx > 0));
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endfunction
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task automatic setup_ref();
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int sa;
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sa = (vx1 - vx0) * (vy2 - vy0) - (vy1 - vy0) * (vx2 - vx0);
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if (sa < 0) begin sx1 = vx2; sy1 = vy2; sx2 = vx1; sy2 = vy1; end
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else begin sx1 = vx1; sy1 = vy1; sx2 = vx2; sy2 = vy2; end
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endtask
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function automatic bit ref_inside(input int px, input int py);
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int e0, e1, e2, b0, b1, b2;
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e0 = edge_f(px, py, vx0, vy0, sx1, sy1);
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e1 = edge_f(px, py, sx1, sy1, sx2, sy2);
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e2 = edge_f(px, py, sx2, sy2, vx0, vy0);
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b0 = tol(vx0, vy0, sx1, sy1) ? 0 : 1;
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b1 = tol(sx1, sy1, sx2, sy2) ? 0 : 1;
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b2 = tol(sx2, sy2, vx0, vy0) ? 0 : 1;
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return ((e0 + b0) <= 0) && ((e1 + b1) <= 0) && ((e2 + b2) <= 0);
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endfunction
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int errors;
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int inside_ok, missing, outside_bad;
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// Coverage + captured color from raster emits.
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bit covered [0:15][0:15];
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logic [31:0] cap_px [0:15][0:15];
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bit cap_armed;
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always_ff @(posedge clk) begin
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if (rst_n && cap_armed && raster_pixel_emit
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&& raster_pixel_x_q < 16 && raster_pixel_y_q < 16) begin
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covered[raster_pixel_y_q][raster_pixel_x_q] <= 1'b1;
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cap_px [raster_pixel_y_q][raster_pixel_x_q] <= raster_pixel_color_q[31:0];
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end
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end
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integer x, y;
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logic [31:0] got, exp;
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initial begin
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errors = 0; inside_ok = 0; missing = 0; outside_bad = 0;
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cap_armed = 1'b0;
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rst_n = 1'b0; gif_reg_wr_en = 1'b0; gif_reg_num = 8'd0; gif_reg_data = 64'd0;
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vram_read_addr = 32'd0;
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for (y = 0; y < 16; y++)
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for (x = 0; x < 16; x++) begin
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covered[y][x] = 1'b0; cap_px[y][x] = 32'd0;
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end
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repeat (4) @(posedge clk);
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rst_n = 1'b1;
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repeat (2) @(posedge clk);
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// --- Preload a 16x16 texture region directly into VRAM. ---
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for (y = 0; y < 16; y++)
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for (x = 0; x < 16; x++) begin
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logic [31:0] addr;
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addr = TEX_BASE_BYTES + ((y * TEX_ROW_TEXELS + x) * 4);
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force_word(addr, texel(x, y));
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end
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// --- Triangle: UV == screen XY at each vertex, so the affine
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// (u,v) == (x,y) at every interior pixel. Non-axis-aligned. ---
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vx0 = 2; vy0 = 1;
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vx1 = 13; vy1 = 2;
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vx2 = 5; vy2 = 7;
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setup_ref();
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cap_armed = 1'b1;
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drive_reg(R_PRIM, PRIM_TRI_TEX);
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drive_reg(R_FRAME_1, FRAME_1_FB0);
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drive_reg(R_TEX0_1, TEX0_VAL);
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// v0
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drive_reg(R_RGBAQ, rgbaq(8'hFF, 0, 0));
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drive_reg(R_UV, uv_data(vx0, vy0));
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drive_reg(R_XYZ2, xyz2_data(vx0, vy0));
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// v1
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drive_reg(R_RGBAQ, rgbaq(0, 8'hFF, 0));
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drive_reg(R_UV, uv_data(vx1, vy1));
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drive_reg(R_XYZ2, xyz2_data(vx1, vy1));
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// v2 (closes)
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drive_reg(R_RGBAQ, rgbaq(0, 0, 8'hFF));
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drive_reg(R_UV, uv_data(vx2, vy2));
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drive_reg(R_XYZ2, xyz2_data(vx2, vy2));
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drive_idle();
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repeat (300) @(posedge clk);
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cap_armed = 1'b0;
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@(posedge clk);
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if (raster_overflow) begin $error("raster_overflow"); errors = errors + 1; end
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if (raster_degenerate) begin $error("raster_degenerate"); errors = errors + 1; end
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// Coverage + texel-sample check across the triangle interior.
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for (y = 0; y < 16; y++) begin
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for (x = 0; x < 16; x++) begin
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bit want;
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want = ref_inside(x, y);
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if (want && !covered[y][x]) begin
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$error("[coverage] inside (%0d,%0d) NOT drawn", x, y);
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missing = missing + 1; errors = errors + 1;
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end else if (!want && covered[y][x]) begin
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$error("[coverage] outside (%0d,%0d) WAS drawn", x, y);
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outside_bad = outside_bad + 1; errors = errors + 1;
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end else if (want && covered[y][x]) begin
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// affine (u,v) == (x,y) here -> texel(x,y) exactly.
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exp = texel(x, y);
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got = cap_px[y][x];
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if (got !== exp) begin
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$error("[texel] (%0d,%0d) got 0x%08x expected 0x%08x",
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x, y, got, exp);
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errors = errors + 1;
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end else begin
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inside_ok = inside_ok + 1;
|
|
end
|
|
end
|
|
end
|
|
end
|
|
|
|
// Also confirm the framebuffer landed the sampled texels.
|
|
for (y = 0; y < 16; y++) begin
|
|
for (x = 0; x < 16; x++) begin
|
|
if (ref_inside(x, y)) begin
|
|
logic [31:0] addr;
|
|
addr = (y * FB0_STRIDE) + (x * 4);
|
|
vram_word(addr, got);
|
|
exp = texel(x, y);
|
|
if (got !== exp) begin
|
|
$error("[FB] (%0d,%0d)@0x%08x got 0x%08x expected 0x%08x",
|
|
x, y, addr, got, exp);
|
|
errors = errors + 1;
|
|
end
|
|
end
|
|
end
|
|
end
|
|
|
|
if (inside_ok < 4) begin
|
|
$error("too few interior textured pixels checked (%0d)", inside_ok);
|
|
errors = errors + 1;
|
|
end
|
|
|
|
$display("[tb_gs_textured_triangle] inside_ok=%0d missing=%0d outside_bad=%0d emits=%0d errors=%0d",
|
|
inside_ok, missing, outside_bad, raster_pixel_emit_count, errors);
|
|
if (errors == 0) $display("[tb_gs_textured_triangle] PASS");
|
|
else $display("[tb_gs_textured_triangle] FAIL");
|
|
$finish;
|
|
end
|
|
|
|
initial begin
|
|
#5000000;
|
|
$error("[tb_gs_textured_triangle] timeout");
|
|
$finish;
|
|
end
|
|
|
|
endmodule : tb_gs_textured_triangle
|