ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
21 lines
987 B
Markdown
21 lines
987 B
Markdown
# Supplemental References (Claude pass)
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These notes supplement the top-level `references/` files produced by the Codex
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pass. Goal: add sources Codex did not surface, without duplicating its memory
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map / workstream / emulator-landscape work.
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Files in this folder:
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- `sony_official_docs.md`: primary Sony register manuals for GS and the VUs.
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Codex leaned on `ps2tek` (community-compiled); these are one layer closer to
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the silicon.
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- `fpga_prior_art.md`: PSX-on-FPGA projects. None are PS2, but they are the
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closest real-world methodology templates for a console-gen FPGA effort.
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- `architecture_studies.md`: high-level architecture writeups, an academic
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VU-on-FPGA feasibility thesis, and MiSTer community consensus on why PS2
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has not been attempted.
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- `source_log.md`: sources introduced in this pass, with URLs and short notes.
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These are reference-only. No implementation claims, no planning overrides —
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Codex's `implementation_workstreams.md` remains the planning map.
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