ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Supplemental References (Claude pass)
These notes supplement the top-level references/ files produced by the Codex
pass. Goal: add sources Codex did not surface, without duplicating its memory
map / workstream / emulator-landscape work.
Files in this folder:
sony_official_docs.md: primary Sony register manuals for GS and the VUs. Codex leaned onps2tek(community-compiled); these are one layer closer to the silicon.fpga_prior_art.md: PSX-on-FPGA projects. None are PS2, but they are the closest real-world methodology templates for a console-gen FPGA effort.architecture_studies.md: high-level architecture writeups, an academic VU-on-FPGA feasibility thesis, and MiSTer community consensus on why PS2 has not been attempted.source_log.md: sources introduced in this pass, with URLs and short notes.
These are reference-only. No implementation claims, no planning overrides —
Codex's implementation_workstreams.md remains the planning map.