thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
34 lines
1.5 KiB
Markdown
34 lines
1.5 KiB
Markdown
# rtl/memory
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Memory visibility, storage, and arbitration. Matches `docs/contracts/memory.md`.
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Per the BIOS-ownership split (memory owns storage, IOP owns behavior), this
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directory contains the storage/mapping layer. BIOS boot sequencing
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(IOPBOOT / IOPBTCONF parsing) belongs under `rtl/iop/`.
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## Wave 1 contents
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- `bios_rom_stub.sv` — 4 MiB BIOS ROM adapter. Loads a user-supplied hex
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image via `$readmemh` when `IMAGE_FILE` is set, otherwise falls back to a
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synthetic NOP sled. One-cycle read latency.
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- `ee_memory_map_stub.sv` — EE-side address decode. Wave 2.7 revision adds
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a DMAC read-master port (128-bit data, physical addressing) with its own
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RAM-window decode at 0x00000000-0x01FFFFFF routing to `ee_ram_stub`. EE
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fetch path still uses kseg-aliased decode and is BIOS-only.
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## Wave 2.5 addition
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- `ee_ram_stub.sv` — small addressable EE-RAM block (default 16 KiB,
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128-bit data path). First real memory source for DMAC-backed transfers.
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Read port: `rd_en/rd_addr/rd_data/rd_valid`. Write port: `wr_en/wr_addr/
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wr_data/wr_be`. Caller-provided `master_id` gets tagged into MEM READ /
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WRITE trace events. Not the final 32 MiB EE-RAM model — see
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`docs/wave25_memory_backed_dma_plan.md` for scope boundaries.
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## BIOS policy note
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Per `docs/decisions/0002-bios-policy.md`, no BIOS image is distributed from
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this repository. Synthetic fixture is the default so the project can run
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stubs without any Sony firmware. Real BIOS usage requires a user-supplied
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dump placed at the path passed to `IMAGE_FILE`.
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