thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
52 lines
1.2 KiB
Markdown
52 lines
1.2 KiB
Markdown
# VIF/VU Contract
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Status: `Draft`
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## Purpose
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Define the vector-processing cluster and its packet/program interfaces.
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## Owns
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- VIF0 and VIF1 packet decode/unpack behavior,
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- VU0 and VU1 local code/data memories,
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- microprogram upload path,
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- macro/micro mode coordination as chosen for the implementation scope,
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- synchronization against DMAC and GIF-visible downstream behavior.
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## Inputs
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- DMAC-fed packet traffic,
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- EE control interactions,
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- memory-backed data where applicable,
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- reset and status/control writes.
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## Outputs
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- local memory writes,
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- VU execution progress,
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- downstream graphics/data traffic,
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- interrupts/status,
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- trace events.
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## Questions to lock
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- Is VU0 macro mode required for the first boot milestone?
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- How much VIF unpack coverage is required for the first homebrew target?
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- Do we treat VU execution timing as functionally-correct first or cycle-shaped
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first?
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## Allowed early stubs
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- packet capture without execution,
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- microprogram RAM load/observe only,
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- no-op VU execution with trace confirmation.
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## Required debug visibility
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- packet headers/tags,
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- microprogram loads,
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- local memory writes,
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- VU start/stop,
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- synchronization stalls.
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