thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
61 lines
1.5 KiB
Markdown
61 lines
1.5 KiB
Markdown
# IOP Contract
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Status: `Draft`
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## Purpose
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Define the separate I/O Processor subsystem as an explicit peer block, not an
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afterthought.
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## Owns
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- IOP CPU execution,
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- IOP-local RAM/I/O decode,
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- IOP interrupt intake,
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- IOP DMAC channels and their peripheral-facing coordination points,
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- BIOS-side IOP boot sequencing behavior, including `IOPBOOT`,
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`IOPBTCONF`-driven module loading, and early module-init-visible progress as
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seen from the IOP side.
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## Inputs
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- clocks/resets,
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- BIOS/boot vectors,
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- SIF signaling,
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- IOP DMA/peripheral responses,
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- interrupt sources from IOP-side peripherals.
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## Outputs
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- IOP memory/I/O requests,
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- DMA requests,
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- SIF activity,
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- debug trace events.
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## Questions to lock
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- How early do we expect a real IOP boot path versus a stubbed acknowledgement
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model?
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- Which IOP peripherals must exist before the BIOS path becomes meaningful?
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- Will PS1-compatibility-only behavior be ignored initially?
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- Which IOP DMAC channels must exist for the first BIOS-progress milestone?
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## Allowed early stubs
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- minimal boot-progress IOP stub,
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- fake module-load acknowledgements for ultra-early scaffolding,
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- reduced DMA interaction for trace-first bring-up.
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## Required debug visibility
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- PC stream,
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- interrupt events,
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- IOP DMAC channel activity,
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- SIF mailbox/flag transitions,
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- module-load progress markers if detectable.
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## Clarification
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- BIOS/firmware storage and address visibility belong to the memory contract.
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- BIOS-driven IOP boot behavior belongs here.
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