96d23ea8ee0578a8078fe99536be4d46ef2a6880
Per Codex review of dd7ca4f (testbench only, RTL unchanged):
1. Stall check now requires d_wvalid to REMAIN asserted (catches a deassert) and
compares the COMPLETE {d_wdata,d_wstrb,d_wlast} against the held beat, not just
d_wdata.
2. Added saw_full_and_ready coverage flag (set on dut.full && d_wready) and a final
check that FAILS if the distinguishing no-bypass case was never observed.
No RTL change, no simulations, no Quartus.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
retroDE_ps2 Planning Docs
This directory is the working design scaffold for the PS2 core.
Purpose:
- define the intended repository shape before RTL lands,
- define subsystem boundaries before implementation choices harden,
- document what each block owns, what crosses the boundary, and how we will validate it.
Recommended reading order:
- repo_layout.md
- phase0_checklist.md
- contracts/README.md
- stub_module_plan.md
- wave2_dma_gif_plan.md
- wave25_memory_backed_dma_plan.md
- wave26_multi_beat_dma_plan.md
Relationship to references/:
references/is the research library.docs/is the project-definition layer.
Rule of thumb:
- If a file explains PS2 hardware as it exists, it belongs under
references/. - If a file explains how
retroDE_ps2intends to model, partition, or validate that hardware, it belongs underdocs/.
Description
Languages
SystemVerilog
75.5%
Verilog
15.4%
Tcl
4.7%
HTML
1.1%
Python
1%
Other
2.3%