thejayman77
ba74bbd5aa
Per-vertex GS fog end-to-end (gs_stub emit incl. persp_emit5, gs_prim_list_feeder XYZ2->XYZF2 on PRIM.FGE, gs_make_sh3_scheduler_fixture.py F/FGE packing), new fog TBs, fidelity attribution tooling. Functional baseline before removing the dead bilinear lerp8 clamps (Codex: 161-node comb loop -> -0.042ns setup fail). Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
86 lines
3.6 KiB
Markdown
86 lines
3.6 KiB
Markdown
# Ch418 — authentic SH3 display presentation mapping (prefit)
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## Objective
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Fix the large presentation mismatch between the accepted Ch417 framebuffer and
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the PCSX2 224139 frame without changing any rasterized framebuffer byte. Ch418
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is scanout-only: it maps the captured GS display source onto the board's
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640x480 HDMI/VGA active raster.
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## Captured register evidence
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The vendored PCSX2 `GSPrivRegSet` layout was used to decode the initial and all
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eight per-vsync register snapshots in dump 224139. The active context is
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DISPLAY2 (`PMODE.EN2=1`), stable in every snapshot:
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- `DISPFB2 = 0x0001000000009000` (FBP rotates later), `FBW=8`, `PSM=1`,
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`DBX=0`, `DBY=32`;
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- `DISPLAY2 = 0x0037f9ff0203228c`, `DX=652`, `DY=50`, `MAGH=4`,
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`MAGV=0`, `DW=2559`, `DH=895`.
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Therefore the display source is 512 pixels wide (`FBW*64`) and 448 interlaced
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source lines beginning at framebuffer line 32. DISPLAY2 expands each source
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pixel to five VCKs (`MAGH+1`) across 2560 display clocks. Reducing that
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captured display to the board raster gives the exact integer maps:
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```
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source_x = floor(output_x * 4 / 5) // 0..639 -> 0..511
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source_y = 32 + floor(output_y * 14 / 15) // 0..479 -> 32..479
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```
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## RTL change
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`gs_lpddr_scanout_lb` now has opt-in divider-free presentation mapping:
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- a five-state horizontal phase accumulator implements 512 -> 640;
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- a fifteen-state vertical phase accumulator implements 448 -> 480;
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- vertical prefetch starts at captured `DBY=32`;
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- buffer parity, prefetch throttling, and underflow checks use mapped source y;
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- all default parameters retain the legacy 1:1 behavior.
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Only `GS_SH3_LPDDR_FB_640` enables the mapping in the DE25 top. The OSD remains
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in the 640x480 output domain and the LPDDR framebuffer/dump remains byte-exact
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to Ch417.
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The mapper contains no `/` or variable multiply in synthesizable RTL. Its
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datapath is one small phase decrement and one coordinate increment per output
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pixel/line, both in the 25 MHz video domain.
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## Prefit verification
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- New two-axis scanout oracle: 600/600 RGB pixels exact, including horizontal
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repeats, vertical repeats, DBY offset, alternating line buffers, zero
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underflow, and zero AXI read errors.
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- Legacy PSMCT16 line-buffer regression: PASS, underflow=0, read errors=0.
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- Legacy PSMCT32 line-buffer/concurrency regression: 49,152 pixels exact,
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underflow=0, read errors=0, 325/325 probes good.
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- The actual QSF profile macros plus `USE_QSYS_TOP` elaborate cleanly under
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Icarus (unavailable vendor IP treated as black boxes); no RTL binding or
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syntax errors.
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- `git diff --check` and the preview utility's Python compile pass.
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Expected HDMI preview:
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`sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_ch418_scanout.png`
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Preview SHA-256:
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`b710aa7a09db6992faacdaa5a6257d490f1d4fa0112f6c6d20fc388f4b580a63`
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The preview moves the already-rendered lamppost and character onto the PCSX2
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landmark positions. Full-frame RGB MAE rises from 20.12 to 21.02 because the
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board is still missing large bright/background draws that the transform now
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spreads over more output pixels; that global statistic is a coverage metric at
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this stage, not an alignment metric. The mapping is justified by the captured
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registers and visible landmark alignment, not by claiming a false MAE win.
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## Owner fit gate
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Ready for the owner-controlled Quartus 26.1 GUI compile. Required acceptance:
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- Analysis & Synthesis succeeds with no inferred display divider;
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- setup, hold, recovery, removal, and minimum pulse all close;
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- after deployment, the unchanged 263-epoch board run still passes and the
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framebuffer dump remains byte-identical to Ch417;
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- HDMI shows the 512x448 captured source presented across 640x480.
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