thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
390 lines
16 KiB
Systemverilog
390 lines
16 KiB
Systemverilog
// retroDE_ps2 — tb_gs_zbuffer (Brick 2b)
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//
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// White-box UNIT TB for the gs_stub Z-buffer (depth test) datapath.
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// Wires gs_stub + vram_stub (byte-addressable, combinational read2)
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// directly via gif_reg_* (no DMA). vram_stub.read2 is the stored-Z
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// read port (Z_RD_REGISTERED=0); the raster_pixel_emit channel is the
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// single VRAM write port (fb color + Z value serialized 2-beat).
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//
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// Covers, for a FLAT PSMCT32 SPRITE with TEST_1.ZTE=1, ZBUF PSMZ32:
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// - GEQUAL: a fragment with Z >= stored Z passes (writes color + Z);
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// a fragment with Z < stored Z fails (no fb write, no Z write).
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// - GREATER: Z > stored passes; Z == stored fails.
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// - ALWAYS / NEVER.
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// - ZMSK=1 gates the Z update (color still writes on pass; Z unchanged).
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// - Draw-order independence: NEAR (large Z) then FAR (small Z) overlap;
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// GEQUAL → near wins in the overlap.
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//
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// VRAM layout (PSMCT32 fb at FBP=0, FBW=1 → 64 px/row; PSMZ32 Z buffer
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// at ZBP=1 → byte base 1*2048=0x800). Sprites are small (a few px) so
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// addresses are easy to predict. The Z buffer is pre-seeded by direct
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// writes through the same vram_stub write port before each scenario.
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`timescale 1ns/1ps
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module tb_gs_zbuffer;
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logic clk;
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logic rst_n;
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initial clk = 1'b0;
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always #5 clk = ~clk;
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logic gif_reg_wr_en;
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logic [7:0] gif_reg_num;
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logic [63:0] gif_reg_data;
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logic raster_pixel_emit;
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logic [31:0] raster_pixel_emit_count;
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logic [11:0] raster_pixel_x_q, raster_pixel_y_q;
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logic [63:0] raster_pixel_color_q;
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logic [31:0] raster_pixel_fb_addr_q;
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logic [3:0] raster_pixel_be_q;
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logic [31:0] raster_pixel_mask_q;
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logic [5:0] raster_pixel_psm_q;
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logic raster_active;
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logic raster_overflow;
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logic gs_tex_rd_en;
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logic [31:0] gs_tex_rd_addr;
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logic gs_fb_rd_en;
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logic [31:0] gs_fb_rd_addr;
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logic gs_z_rd_en;
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logic [31:0] gs_z_rd_addr;
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logic [31:0] read2_data;
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// gs_stub with combinational read2 (Z_RD_REGISTERED=0, matches vram_stub).
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gs_stub #(
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.FB_RD_REGISTERED(1'b0),
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.Z_RD_REGISTERED (1'b0)
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) u_gs (
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.clk(clk), .rst_n(rst_n),
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.reg_wr_en(1'b0), .reg_wr_addr(16'd0), .reg_wr_data(64'd0),
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.gif_reg_wr_en(gif_reg_wr_en),
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.gif_reg_num(gif_reg_num),
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.gif_reg_data(gif_reg_data),
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.bg_r(), .bg_g(), .bg_b(),
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.pmode_q(), .dispfb1_q(), .display1_q(),
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.prim_q(), .rgbaq_q(),
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.xyz2_q(), .xyzf2_q(),
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.frame_1_q(), .zbuf_1_q(),
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.tex0_1_q(), .tex0_1_cbp_q(), .tex0_1_cpsm_q(),
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.tex0_1_csm_q(), .tex0_1_csa_q(), .tex0_1_cld_q(), .tex0_1_wr_q(),
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.bitbltbuf_q(), .trxpos_q(), .trxreg_q(), .trxdir_q(), .trxdir_wr_q(),
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.prim_complete(), .prim_complete_count(),
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.prim_v0_q(), .prim_v1_q(), .prim_v2_q(),
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.prim_color_q(),
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.prim_color_v0_q(), .prim_color_v1_q(), .prim_color_v2_q(),
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.prim_v0_decoded_q(), .prim_v1_decoded_q(), .prim_v2_decoded_q(),
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.prim_v0_color_decoded_q(), .prim_v1_color_decoded_q(), .prim_v2_color_decoded_q(),
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.pixel_emit(), .pixel_emit_count(),
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.pixel_x_q(), .pixel_y_q(),
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.pixel_color_q(),
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.pixel_fbp_q(), .pixel_fbw_q(), .pixel_psm_q(), .pixel_fb_addr_q(),
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.raster_pixel_emit(raster_pixel_emit),
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.raster_pixel_emit_count(raster_pixel_emit_count),
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.raster_pixel_x_q(raster_pixel_x_q),
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.raster_pixel_y_q(raster_pixel_y_q),
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.raster_pixel_color_q(raster_pixel_color_q),
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.raster_pixel_fb_addr_q(raster_pixel_fb_addr_q),
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.raster_pixel_be_q(raster_pixel_be_q),
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.raster_pixel_mask_q(raster_pixel_mask_q),
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.raster_pixel_psm_q(raster_pixel_psm_q),
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.raster_active(raster_active),
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.raster_overflow(raster_overflow),
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.raster_fifo_full(),
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.raster_degenerate(),
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.tex_rd_en(gs_tex_rd_en), .tex_rd_addr(gs_tex_rd_addr), .tex_rd_data(read2_data),
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.fb_rd_en(gs_fb_rd_en), .fb_rd_addr(gs_fb_rd_addr), .fb_rd_data(read2_data),
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.z_rd_en(gs_z_rd_en), .z_rd_addr(gs_z_rd_addr), .z_rd_data(read2_data),
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.ev_valid(), .ev_subsys(), .ev_event(),
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.ev_arg0(), .ev_arg1(), .ev_arg2(), .ev_arg3(), .ev_flags()
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);
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// ----- VRAM (byte-addressable, combinational read2) -----
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// TB-direct write override so the harness can pre-seed fb + Z.
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logic tb_we;
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logic [31:0] tb_waddr;
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logic [31:0] tb_wdata;
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logic vram_we;
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logic [31:0] vram_waddr;
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logic [31:0] vram_wdata;
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logic [3:0] vram_wbe;
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assign vram_we = tb_we ? 1'b1 : raster_pixel_emit;
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assign vram_waddr = tb_we ? tb_waddr : raster_pixel_fb_addr_q;
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assign vram_wdata = tb_we ? tb_wdata : raster_pixel_color_q[31:0];
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assign vram_wbe = tb_we ? 4'b1111 : raster_pixel_be_q;
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// read2 address mux (matches the wrapper arbitration; only one of the
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// three consumers is ever active for a Z-tested flat sprite).
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logic [31:0] read2_addr;
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assign read2_addr = gs_tex_rd_en ? gs_tex_rd_addr
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: gs_fb_rd_en ? gs_fb_rd_addr
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: gs_z_rd_en ? gs_z_rd_addr
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: 32'd0;
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logic [31:0] rd_addr;
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logic [31:0] rd_data;
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vram_stub u_vram (
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.clk(clk), .rst_n(rst_n),
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.write_en (vram_we),
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.write_addr(vram_waddr),
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.write_data(vram_wdata),
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.write_be (vram_wbe),
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.write_mask(32'hFFFF_FFFF),
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.read_addr (rd_addr),
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.read_data (rd_data),
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.read2_addr(read2_addr),
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.read2_data(read2_data)
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);
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// ---- encoders ----
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localparam logic [7:0] R_PRIM = 8'h00;
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localparam logic [7:0] R_RGBAQ = 8'h01;
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localparam logic [7:0] R_XYZ2 = 8'h05;
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localparam logic [7:0] R_TEST_1 = 8'h47;
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localparam logic [7:0] R_FRAME_1 = 8'h4C;
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localparam logic [7:0] R_ZBUF_1 = 8'h4E;
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localparam logic [63:0] PRIM_SPRITE = 64'd6;
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// FRAME_1: FBP=0, FBW=1 (64 px/row), PSMCT32.
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localparam logic [63:0] FRAME_1_VAL = 64'h0000_0000_0001_0000;
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// ZBUF_1: ZBP=1 (byte base 0x800), PSM=PSMZ32(0), ZMSK depends.
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function automatic logic [63:0] xyz2_dataz(input logic [11:0] x_int,
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input logic [11:0] y_int,
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input logic [31:0] z);
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// X=[15:4], Y=[31:20], Z=[63:32].
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return {z, y_int, 4'd0, x_int, 4'd0};
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endfunction
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function automatic logic [63:0] test1_z(input logic ztst_en, input logic [1:0] ztst);
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// ZTE=bit16, ZTST=bits[18:17].
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logic [63:0] v;
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v = 64'd0;
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v[16] = ztst_en;
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v[18:17] = ztst;
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return v;
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endfunction
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function automatic logic [63:0] zbuf1(input logic [8:0] zbp, input logic zmsk);
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// ZBP=[8:0], PSM=[27:24]=0 (PSMZ32), ZMSK=bit0. The task spec
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// places ZMSK at bit 0 which overlaps ZBP[0]; we keep ZBP EVEN
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// (bit0=0) in every test so the two never alias.
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logic [63:0] v;
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v = 64'd0;
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v[8:0] = zbp;
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v[27:24] = 4'd0; // PSMZ32
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v[0] = zmsk;
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return v;
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endfunction
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// fb byte address for (x,y): FBP*2048 + (y*FBW*64 + x)*4. FBP=0, FBW=1.
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function automatic logic [31:0] fb_addr_of(input logic [11:0] x, input logic [11:0] y);
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return ((y * 64) + x) * 4;
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endfunction
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// Z byte address: ZBP*2048 + (y*FBW*64 + x)*4. ZBP=2 -> 0x1000.
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function automatic logic [31:0] z_addr_of(input logic [11:0] x, input logic [11:0] y);
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return 32'h1000 + (((y * 64) + x) * 4);
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endfunction
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task automatic drive_reg(input logic [7:0] num, input logic [63:0] data);
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@(negedge clk);
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gif_reg_wr_en = 1'b1;
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gif_reg_num = num;
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gif_reg_data = data;
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@(posedge clk);
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@(negedge clk);
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gif_reg_wr_en = 1'b0;
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@(posedge clk);
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endtask
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task automatic tb_write(input logic [31:0] addr, input logic [31:0] data);
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@(negedge clk);
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tb_we = 1'b1;
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tb_waddr = addr;
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tb_wdata = data;
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@(posedge clk);
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@(negedge clk);
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tb_we = 1'b0;
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@(posedge clk);
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endtask
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// Combinational read helper (task; iverilog-12 forbids delays in
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// functions). Drives rd_addr, settles, returns rd_data via output.
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task automatic peek(input logic [31:0] addr, output logic [31:0] val);
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rd_addr = addr;
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#1;
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val = rd_data;
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endtask
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int errors;
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task automatic expect_fb(input logic [11:0] x, input logic [11:0] y,
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input logic [31:0] exp, input string label);
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logic [31:0] got;
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peek(fb_addr_of(x, y), got);
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if (got !== exp) begin
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$error("[%s] fb(%0d,%0d) got 0x%08x exp 0x%08x", label, x, y, got, exp);
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errors = errors + 1;
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end
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endtask
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task automatic expect_z(input logic [11:0] x, input logic [11:0] y,
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input logic [31:0] exp, input string label);
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logic [31:0] got;
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peek(z_addr_of(x, y), got);
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if (got !== exp) begin
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$error("[%s] Z(%0d,%0d) got 0x%08x exp 0x%08x", label, x, y, got, exp);
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errors = errors + 1;
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end
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endtask
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// Draw a 1x1 Z-tested flat sprite at (x,y) with color/Z; ZTST + ZMSK
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// configured per call. Returns after raster drains.
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task automatic draw_ztest_pixel(input logic [11:0] x,
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input logic [11:0] y,
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input logic [31:0] color,
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input logic [31:0] z,
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input logic [1:0] ztst,
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input logic zmsk);
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drive_reg(R_PRIM, PRIM_SPRITE);
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drive_reg(R_FRAME_1, FRAME_1_VAL);
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drive_reg(R_TEST_1, test1_z(1'b1, ztst));
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drive_reg(R_ZBUF_1, zbuf1(9'd2, zmsk));
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drive_reg(R_RGBAQ, {32'd0, color});
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drive_reg(R_XYZ2, xyz2_dataz(x, y, z)); // v1
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drive_reg(R_XYZ2, xyz2_dataz(x, y, z)); // v2 close (1x1)
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repeat (30) @(posedge clk);
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endtask
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initial begin
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rst_n = 1'b0;
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gif_reg_wr_en = 1'b0;
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gif_reg_num = 8'd0;
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gif_reg_data = 64'd0;
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tb_we = 1'b0;
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tb_waddr = 32'd0;
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tb_wdata = 32'd0;
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rd_addr = 32'd0;
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errors = 0;
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repeat (4) @(posedge clk);
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rst_n = 1'b1;
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repeat (4) @(posedge clk);
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// ============================================================
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// Scenario 1 — GEQUAL pass: stored Z=0x100, frag Z=0x200 (>=).
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// Pixel passes → color written, Z updated to 0x200.
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// ============================================================
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tb_write(z_addr_of(1, 1), 32'h0000_0100); // seed stored Z
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tb_write(fb_addr_of(1, 1), 32'hDEAD_BEEF); // seed fb (sentinel)
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draw_ztest_pixel(12'd1, 12'd1, 32'h0000_00AA, 32'h0000_0200, 2'd2, 1'b0);
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expect_fb(1, 1, 32'h0000_00AA, "geq_pass_color");
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expect_z (1, 1, 32'h0000_0200, "geq_pass_z");
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// ============================================================
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// Scenario 2 — GEQUAL fail: stored Z=0x200, frag Z=0x100 (<).
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// Pixel fails → fb stays sentinel, Z stays 0x200.
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// ============================================================
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tb_write(z_addr_of(2, 1), 32'h0000_0200);
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tb_write(fb_addr_of(2, 1), 32'hDEAD_BEEF);
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draw_ztest_pixel(12'd2, 12'd1, 32'h0000_00BB, 32'h0000_0100, 2'd2, 1'b0);
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expect_fb(2, 1, 32'hDEAD_BEEF, "geq_fail_color"); // discarded
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expect_z (2, 1, 32'h0000_0200, "geq_fail_z"); // unchanged
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// ============================================================
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// Scenario 3 — GEQUAL equal-Z passes (>=): stored=frag=0x55.
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// ============================================================
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tb_write(z_addr_of(3, 1), 32'h0000_0055);
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tb_write(fb_addr_of(3, 1), 32'hDEAD_BEEF);
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draw_ztest_pixel(12'd3, 12'd1, 32'h0000_00CC, 32'h0000_0055, 2'd2, 1'b0);
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expect_fb(3, 1, 32'h0000_00CC, "geq_equal_color");
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expect_z (3, 1, 32'h0000_0055, "geq_equal_z");
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// ============================================================
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// Scenario 4 — GREATER equal-Z FAILS: stored=frag=0x55.
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// ============================================================
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tb_write(z_addr_of(4, 1), 32'h0000_0055);
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tb_write(fb_addr_of(4, 1), 32'hDEAD_BEEF);
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draw_ztest_pixel(12'd4, 12'd1, 32'h0000_00DD, 32'h0000_0055, 2'd3, 1'b0);
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expect_fb(4, 1, 32'hDEAD_BEEF, "gtr_equal_fail_color");
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expect_z (4, 1, 32'h0000_0055, "gtr_equal_fail_z");
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// GREATER strictly-greater PASSES.
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tb_write(z_addr_of(5, 1), 32'h0000_0055);
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tb_write(fb_addr_of(5, 1), 32'hDEAD_BEEF);
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draw_ztest_pixel(12'd5, 12'd1, 32'h0000_00EE, 32'h0000_0056, 2'd3, 1'b0);
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expect_fb(5, 1, 32'h0000_00EE, "gtr_pass_color");
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expect_z (5, 1, 32'h0000_0056, "gtr_pass_z");
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// ============================================================
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// Scenario 5 — ALWAYS passes regardless of stored Z.
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// ============================================================
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tb_write(z_addr_of(6, 1), 32'hFFFF_FFFF); // huge stored Z
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tb_write(fb_addr_of(6, 1), 32'hDEAD_BEEF);
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draw_ztest_pixel(12'd6, 12'd1, 32'h0000_0011, 32'h0000_0001, 2'd1, 1'b0);
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expect_fb(6, 1, 32'h0000_0011, "always_color");
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expect_z (6, 1, 32'h0000_0001, "always_z");
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// ============================================================
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// Scenario 6 — NEVER: nothing written.
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// ============================================================
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tb_write(z_addr_of(7, 1), 32'h0000_0000);
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tb_write(fb_addr_of(7, 1), 32'hDEAD_BEEF);
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draw_ztest_pixel(12'd7, 12'd1, 32'h0000_0022, 32'h0000_9999, 2'd0, 1'b0);
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expect_fb(7, 1, 32'hDEAD_BEEF, "never_color");
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expect_z (7, 1, 32'h0000_0000, "never_z");
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// ============================================================
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// Scenario 7 — ZMSK=1: pass writes color but NOT Z.
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// stored=0x100 frag=0x200 GEQUAL passes; Z must remain 0x100.
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// ============================================================
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tb_write(z_addr_of(8, 1), 32'h0000_0100);
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tb_write(fb_addr_of(8, 1), 32'hDEAD_BEEF);
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draw_ztest_pixel(12'd8, 12'd1, 32'h0000_0033, 32'h0000_0200, 2'd2, 1'b1);
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expect_fb(8, 1, 32'h0000_0033, "zmsk_color");
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expect_z (8, 1, 32'h0000_0100, "zmsk_z_unchanged");
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// ============================================================
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// Scenario 8 — DRAW-ORDER INDEPENDENCE.
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// Clear Z at (10,1). Draw NEAR (large Z=0x300, color NEAR) then
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// FAR (small Z=0x100, color FAR) at the SAME pixel with GEQUAL.
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// Near wins: fb == NEAR, Z == 0x300. Proves depth gated, NOT
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// last-write-wins.
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// ============================================================
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tb_write(z_addr_of(10, 1), 32'h0000_0000); // clear Z
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tb_write(fb_addr_of(10, 1), 32'h0000_0000);
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draw_ztest_pixel(12'd10, 12'd1, 32'h0000_00AA, 32'h0000_0300, 2'd2, 1'b0); // NEAR
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draw_ztest_pixel(12'd10, 12'd1, 32'h0000_00BB, 32'h0000_0100, 2'd2, 1'b0); // FAR (behind)
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expect_fb(10, 1, 32'h0000_00AA, "order_near_wins_color");
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expect_z (10, 1, 32'h0000_0300, "order_near_wins_z");
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begin
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logic [31:0] ov;
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peek(fb_addr_of(10, 1), ov);
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if (ov === 32'h0000_00BB) begin
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$error("draw-order: overlap is FAR (last-drawn) — depth NOT gated!");
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|
errors = errors + 1;
|
|
end
|
|
end
|
|
|
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$display("[tb_gs_zbuffer] raster_emits=%0d overflow=%b errors=%0d",
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raster_pixel_emit_count, raster_overflow, errors);
|
|
if (raster_overflow) begin
|
|
$error("raster_overflow set"); errors = errors + 1;
|
|
end
|
|
if (errors == 0) $display("[tb_gs_zbuffer] PASS");
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|
else $display("[tb_gs_zbuffer] FAIL");
|
|
$finish;
|
|
end
|
|
|
|
initial begin
|
|
#5000000;
|
|
$error("[tb_gs_zbuffer] TIMEOUT");
|
|
$finish;
|
|
end
|
|
|
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endmodule : tb_gs_zbuffer
|