thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
404 lines
16 KiB
Systemverilog
404 lines
16 KiB
Systemverilog
// retroDE_ps2 — tb_gs_textured_sprite (Brick 1)
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//
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// FIRST textured-sprite test: drives a PSMCT32 DECAL textured SPRITE
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// through gs_stub's raster pipeline and verifies the framebuffer
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// pixels equal the preloaded texture texels.
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//
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// Datapath under test (Brick 1):
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// PRIM.TME=1 + TEX0_1(texture-side) + UV per-vertex + SPRITE
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// -> per-pixel linear (u,v) interpolation
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// -> gs_texture_unit (gs_texel_addr + PSMCT32 DECAL sample)
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// -> texel REPLACES the flat sprite color at emit.
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//
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// To isolate the sampling datapath from the texture-UPLOAD path, the
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// texture is PRELOADED DIRECTLY into vram_stub at the TBP0-derived
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// base (TBP0*256, the convention gs_stub documents + the upload path
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// uses). A follow-on chapter reconciles the BITBLT/TRX upload path.
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//
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// Geometry / mapping (chosen so the mapping is the identity texel(x,y)):
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// SPRITE endpoints (0,0)->(3,3) => 4x4 fill.
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// UV endpoints (0,0)->(3,3) => u=x, v=y across the sprite.
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// Framebuffer: FBP=0, FBW=1, PSM=PSMCT32. Stride = 64*4 = 256 B/row.
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// Texture: TBP0=8 (base 2048 B), TBW=1 (64 texels/row), PSM=PSMCT32.
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//
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// PASS criteria:
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// - 16 raster_pixel_emit pulses.
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// - Each framebuffer pixel (x,y) == preloaded texel(x,y).
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// - A NON-textured control SPRITE (TME=0) at a different FB region
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// still emits the FLAT color (proves the TME=0 path is unchanged).
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`timescale 1ns/1ps
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module tb_gs_textured_sprite;
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logic clk;
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logic rst_n;
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initial clk = 1'b0;
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always #5 clk = ~clk;
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// gs_stub IO
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logic gif_reg_wr_en;
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logic [7:0] gif_reg_num;
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logic [63:0] gif_reg_data;
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logic [7:0] bg_r, bg_g, bg_b;
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logic [63:0] pmode_q, dispfb1_q, display1_q;
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logic [63:0] prim_q, rgbaq_q, xyz2_q, xyzf2_q, frame_1_q, zbuf_1_q;
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logic [63:0] tex0_1_q;
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logic [13:0] tex0_1_cbp_q;
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logic [3:0] tex0_1_cpsm_q;
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logic tex0_1_csm_q;
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logic [4:0] tex0_1_csa_q;
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logic [2:0] tex0_1_cld_q;
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logic tex0_1_wr_q;
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logic [63:0] bitbltbuf_q, trxpos_q, trxreg_q, trxdir_q;
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logic trxdir_wr_q;
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logic prim_complete;
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logic [31:0] prim_complete_count;
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logic [63:0] prim_v0_q, prim_v1_q, prim_v2_q;
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logic [63:0] prim_color_q;
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logic [63:0] prim_color_v0_q, prim_color_v1_q, prim_color_v2_q;
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trace_pkg::vertex_t prim_v0_decoded_q, prim_v1_decoded_q, prim_v2_decoded_q;
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trace_pkg::color_t prim_v0_color_decoded_q, prim_v1_color_decoded_q, prim_v2_color_decoded_q;
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logic pixel_emit;
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logic [31:0] pixel_emit_count;
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logic [11:0] pixel_x_q, pixel_y_q;
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logic [63:0] pixel_color_q;
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logic [8:0] pixel_fbp_q;
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logic [5:0] pixel_fbw_q, pixel_psm_q;
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logic [31:0] pixel_fb_addr_q;
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logic raster_pixel_emit;
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logic [31:0] raster_pixel_emit_count;
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logic [11:0] raster_pixel_x_q, raster_pixel_y_q;
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logic [63:0] raster_pixel_color_q;
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logic [31:0] raster_pixel_fb_addr_q;
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logic [3:0] raster_pixel_be_q;
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logic [31:0] raster_pixel_mask_q;
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logic [5:0] raster_pixel_psm_q;
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logic raster_active;
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logic raster_overflow;
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logic raster_fifo_full;
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logic raster_degenerate;
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logic tex_rd_en;
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logic [31:0] tex_rd_addr;
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logic [31:0] tex_rd_data;
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logic gs_ev_valid;
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trace_pkg::subsys_e gs_ev_subsys;
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trace_pkg::event_e gs_ev_event;
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logic [63:0] gs_ev_arg0, gs_ev_arg1, gs_ev_arg2, gs_ev_arg3;
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logic [31:0] gs_ev_flags;
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gs_stub u_gs (
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.clk(clk), .rst_n(rst_n),
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.reg_wr_en(1'b0), .reg_wr_addr(16'd0), .reg_wr_data(64'd0),
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.gif_reg_wr_en(gif_reg_wr_en),
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.gif_reg_num(gif_reg_num),
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.gif_reg_data(gif_reg_data),
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.bg_r(bg_r), .bg_g(bg_g), .bg_b(bg_b),
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.pmode_q(pmode_q), .dispfb1_q(dispfb1_q), .display1_q(display1_q),
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.prim_q(prim_q), .rgbaq_q(rgbaq_q),
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.xyz2_q(xyz2_q), .xyzf2_q(xyzf2_q),
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.frame_1_q(frame_1_q), .zbuf_1_q(zbuf_1_q),
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.tex0_1_q(tex0_1_q),
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.tex0_1_cbp_q(tex0_1_cbp_q),
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.tex0_1_cpsm_q(tex0_1_cpsm_q),
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.tex0_1_csm_q(tex0_1_csm_q),
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.tex0_1_csa_q(tex0_1_csa_q),
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.tex0_1_cld_q(tex0_1_cld_q),
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.tex0_1_wr_q(tex0_1_wr_q),
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.bitbltbuf_q(bitbltbuf_q), .trxpos_q(trxpos_q),
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.trxreg_q(trxreg_q), .trxdir_q(trxdir_q),
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.trxdir_wr_q(trxdir_wr_q),
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.prim_complete(prim_complete),
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.prim_complete_count(prim_complete_count),
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.prim_v0_q(prim_v0_q), .prim_v1_q(prim_v1_q), .prim_v2_q(prim_v2_q),
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.prim_color_q(prim_color_q),
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.prim_color_v0_q(prim_color_v0_q),
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.prim_color_v1_q(prim_color_v1_q),
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.prim_color_v2_q(prim_color_v2_q),
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.prim_v0_decoded_q(prim_v0_decoded_q),
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.prim_v1_decoded_q(prim_v1_decoded_q),
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.prim_v2_decoded_q(prim_v2_decoded_q),
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.prim_v0_color_decoded_q(prim_v0_color_decoded_q),
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.prim_v1_color_decoded_q(prim_v1_color_decoded_q),
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.prim_v2_color_decoded_q(prim_v2_color_decoded_q),
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.pixel_emit(pixel_emit),
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.pixel_emit_count(pixel_emit_count),
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.pixel_x_q(pixel_x_q), .pixel_y_q(pixel_y_q),
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.pixel_color_q(pixel_color_q),
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.pixel_fbp_q(pixel_fbp_q),
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.pixel_fbw_q(pixel_fbw_q),
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.pixel_psm_q(pixel_psm_q),
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.pixel_fb_addr_q(pixel_fb_addr_q),
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.raster_pixel_emit(raster_pixel_emit),
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.raster_pixel_emit_count(raster_pixel_emit_count),
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.raster_pixel_x_q(raster_pixel_x_q),
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.raster_pixel_y_q(raster_pixel_y_q),
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.raster_pixel_color_q(raster_pixel_color_q),
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.raster_pixel_fb_addr_q(raster_pixel_fb_addr_q),
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.raster_pixel_be_q(raster_pixel_be_q),
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.raster_pixel_mask_q(raster_pixel_mask_q),
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.raster_pixel_psm_q(raster_pixel_psm_q),
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.raster_active(raster_active),
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.raster_overflow(raster_overflow),
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.raster_fifo_full(raster_fifo_full),
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.raster_degenerate(raster_degenerate),
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.tex_rd_en(tex_rd_en),
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.tex_rd_addr(tex_rd_addr),
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.tex_rd_data(tex_rd_data),
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.ev_valid(gs_ev_valid),
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.ev_subsys(gs_ev_subsys),
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.ev_event(gs_ev_event),
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.ev_arg0(gs_ev_arg0), .ev_arg1(gs_ev_arg1),
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.ev_arg2(gs_ev_arg2), .ev_arg3(gs_ev_arg3),
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.ev_flags(gs_ev_flags)
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);
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// VRAM. Port 0 = raster write + TB readback. Port 1 (read2) =
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// texel fetch. In a full integration read2 is muxed between
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// clut_loader_stub (CLUT load at TEX0 commit) and gs_stub's texel
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// fetch (during the scan); clut_loader is not instantiated here,
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// so read2 is dedicated to the texel port. The mux is documented
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// in gs_stub's tex_rd_* port comment.
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logic [31:0] vram_read_addr;
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logic [31:0] vram_read_data;
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localparam int VRAM_BYTES = 8192;
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vram_stub #(.BYTES(VRAM_BYTES)) u_vram (
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.clk(clk), .rst_n(rst_n),
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.write_en (raster_pixel_emit),
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.write_addr(raster_pixel_fb_addr_q),
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.write_data(raster_pixel_color_q[31:0]),
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.write_be (raster_pixel_be_q),
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.write_mask(raster_pixel_mask_q),
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.read_addr (vram_read_addr),
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.read_data (vram_read_data),
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.read2_addr(tex_rd_addr),
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.read2_data(tex_rd_data)
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);
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int errors;
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int textured_emit_seen;
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initial begin
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errors = 0;
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textured_emit_seen = 0;
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end
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// ----- GIF register numbers -----
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localparam logic [7:0] R_PRIM = 8'h00;
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localparam logic [7:0] R_RGBAQ = 8'h01;
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localparam logic [7:0] R_UV = 8'h03;
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localparam logic [7:0] R_XYZ2 = 8'h05;
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localparam logic [7:0] R_TEX0_1 = 8'h06;
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localparam logic [7:0] R_FRAME_1 = 8'h4C;
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// PRIM: type=6 (SPRITE) at [2:0]; TME at bit 4.
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localparam logic [63:0] PRIM_SPRITE_TEX = 64'd6 | (64'd1 << 4); // SPRITE + TME
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localparam logic [63:0] PRIM_SPRITE_FLAT = 64'd6; // SPRITE, no TME
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// FRAME_1: FBP[8:0]=0, FBW[21:16]=1, PSM[29:24]=PSMCT32(0x00).
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localparam logic [63:0] FRAME_1_FB0 = 64'h0000_0000_0001_0000;
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// A second FB region for the flat control sprite: FBP=1 (2048 B).
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localparam logic [63:0] FRAME_1_FB1 = 64'h0000_0000_0001_0001;
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// TEX0_1 texture-side: TBP0[13:0]=8, TBW[19:14]=1, PSM[25:20]=0.
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// TBP0=8 -> base bytes = 8*256 = 2048.
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localparam logic [13:0] TEX_TBP0 = 14'd8;
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localparam logic [5:0] TEX_TBW = 6'd1;
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localparam logic [63:0] TEX0_VAL = {30'd0, 6'd0 /*TH*/, 4'd0 /*TW*/,
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6'd0 /*PSM*/, TEX_TBW, TEX_TBP0};
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localparam logic [31:0] TEX_BASE_BYTES = 32'd8 * 32'd256; // 2048
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localparam int TEX_ROW_TEXELS = 64; // TBW*64
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// Flat control color.
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localparam logic [63:0] FLAT_RGBAQ = 64'h0000_0000_8011_2233; // ABGR=0x80112233
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localparam int SPRITE_W = 4;
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localparam int SPRITE_H = 4;
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localparam int FB0_STRIDE = 64 * 4; // FBW=1 -> 64 px/row * 4 B
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localparam int FB1_BASE = 2048; // FBP=1 -> 1*2048
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// Expected texel for (x,y): a recognizable pattern.
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function automatic logic [31:0] texel(input int x, input int y);
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return 32'hFF000000 | (x << 8) | (y << 16) | 32'h00000040;
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endfunction
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// ----- drive helpers -----
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task automatic step_drive(input logic wr_en,
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input logic [7:0] num,
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input logic [63:0] data);
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@(negedge clk);
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gif_reg_wr_en = wr_en;
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gif_reg_num = num;
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gif_reg_data = data;
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@(posedge clk);
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endtask
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task automatic drive_reg(input logic [7:0] num, input logic [63:0] data);
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step_drive(1'b1, num, data);
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endtask
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task automatic drive_idle();
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step_drive(1'b0, 8'd0, 64'd0);
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endtask
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function automatic logic [63:0] xyz2_data(input logic [11:0] x_int,
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input logic [11:0] y_int);
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return {32'd0, y_int, 4'd0, x_int, 4'd0};
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endfunction
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// UV reg: U=[13:0], V=[27:14], 10.4 fixed-point. Integer u,v.
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function automatic logic [63:0] uv_data(input int ui, input int vi);
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logic [13:0] u_fp, v_fp;
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u_fp = 14'(ui) << 4;
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v_fp = 14'(vi) << 4;
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return {36'd0, v_fp, u_fp};
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endfunction
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// Read a 32-bit word from VRAM port 0 (combinational read). The
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// settle delay lives in the caller (a task), not in a function.
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task automatic vram_word(input logic [31:0] byte_addr,
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output logic [31:0] word);
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vram_read_addr = byte_addr;
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#1;
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word = vram_read_data;
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endtask
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// Preload a 32-bit little-endian word directly into the VRAM
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// backing store (raster is idle during preload, so a direct mem
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// poke is the simplest texture-upload bypass). Static task: a
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// hierarchical force/poke on automatic-task locals is illegal in
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// iverilog 12, and a direct mem write needs no force at all.
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task automatic force_word(input logic [31:0] addr, input logic [31:0] data);
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u_vram.mem[addr + 0] = data[7:0];
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u_vram.mem[addr + 1] = data[15:8];
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u_vram.mem[addr + 2] = data[23:16];
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u_vram.mem[addr + 3] = data[31:24];
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endtask
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// ----- observer: count textured emits -----
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always_ff @(posedge clk) begin
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if (rst_n && raster_pixel_emit && (raster_pixel_psm_q == 6'h00)
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&& (raster_pixel_fb_addr_q < FB1_BASE)) begin
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textured_emit_seen <= textured_emit_seen + 1;
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end
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end
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integer x, y;
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logic [31:0] got, exp;
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initial begin
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rst_n = 1'b0;
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gif_reg_wr_en = 1'b0;
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gif_reg_num = 8'd0;
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gif_reg_data = 64'd0;
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vram_read_addr = 32'd0;
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repeat (4) @(posedge clk);
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rst_n = 1'b1;
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repeat (2) @(posedge clk);
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// --- Preload the texture DIRECTLY into VRAM at TBP0*256. ---
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// (Bypasses BITBLT/TRX upload — see header + gs_stub TODO.)
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for (y = 0; y < SPRITE_H; y++) begin
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for (x = 0; x < SPRITE_W; x++) begin
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logic [31:0] addr;
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addr = TEX_BASE_BYTES + ((y * TEX_ROW_TEXELS + x) * 4);
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// poke 4 bytes little-endian via the write port
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force_word(addr, texel(x, y));
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end
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end
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// ===========================================================
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// 1) TEXTURED SPRITE
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// ===========================================================
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drive_reg(R_PRIM, PRIM_SPRITE_TEX);
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drive_reg(R_FRAME_1, FRAME_1_FB0);
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drive_reg(R_TEX0_1, TEX0_VAL);
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drive_reg(R_RGBAQ, FLAT_RGBAQ); // would-be flat color (must be overridden)
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// vertex 0: UV(0,0) at screen (0,0)
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drive_reg(R_UV, uv_data(0, 0));
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drive_reg(R_XYZ2, xyz2_data(12'd0, 12'd0));
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// vertex 1 (closing): UV(3,3) at screen (3,3)
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drive_reg(R_UV, uv_data(SPRITE_W - 1, SPRITE_H - 1));
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drive_reg(R_XYZ2, xyz2_data(12'(SPRITE_W - 1), 12'(SPRITE_H - 1)));
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drive_idle();
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wait (raster_active == 1'b1);
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wait (raster_active == 1'b0);
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repeat (10) @(posedge clk);
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if (raster_pixel_emit_count != 32'(SPRITE_W * SPRITE_H)) begin
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$error("textured sprite: expected %0d emits, got %0d",
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SPRITE_W * SPRITE_H, raster_pixel_emit_count);
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errors = errors + 1;
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end
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if (textured_emit_seen != SPRITE_W * SPRITE_H) begin
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$error("textured emit observer count=%0d (expected %0d)",
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textured_emit_seen, SPRITE_W * SPRITE_H);
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errors = errors + 1;
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end
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// Verify each FB pixel == preloaded texel(x,y).
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for (y = 0; y < SPRITE_H; y++) begin
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for (x = 0; x < SPRITE_W; x++) begin
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logic [31:0] addr;
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addr = (y * FB0_STRIDE) + (x * 4);
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vram_word(addr, got);
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exp = texel(x, y);
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if (got !== exp) begin
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$error("textured FB(%0d,%0d)@0x%08x got 0x%08x expected 0x%08x",
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x, y, addr, got, exp);
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errors = errors + 1;
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end
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end
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end
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// ===========================================================
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// 2) FLAT CONTROL SPRITE (TME=0) — proves unchanged path.
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// ===========================================================
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drive_reg(R_PRIM, PRIM_SPRITE_FLAT);
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drive_reg(R_FRAME_1, FRAME_1_FB1);
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drive_reg(R_RGBAQ, FLAT_RGBAQ);
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drive_reg(R_XYZ2, xyz2_data(12'd0, 12'd0));
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drive_reg(R_XYZ2, xyz2_data(12'(SPRITE_W - 1), 12'(SPRITE_H - 1)));
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drive_idle();
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wait (raster_active == 1'b1);
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wait (raster_active == 1'b0);
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repeat (10) @(posedge clk);
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// Flat sprite landed in FB1 — every pixel == FLAT color low32.
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for (y = 0; y < SPRITE_H; y++) begin
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for (x = 0; x < SPRITE_W; x++) begin
|
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logic [31:0] addr;
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addr = FB1_BASE + (y * FB0_STRIDE) + (x * 4);
|
|
vram_word(addr, got);
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|
exp = FLAT_RGBAQ[31:0];
|
|
if (got !== exp) begin
|
|
$error("flat FB(%0d,%0d)@0x%08x got 0x%08x expected 0x%08x",
|
|
x, y, addr, got, exp);
|
|
errors = errors + 1;
|
|
end
|
|
end
|
|
end
|
|
|
|
$display("[tb_gs_textured_sprite] sprite=%0dx%0d tex_base=0x%08x emits=%0d textured=%0d",
|
|
SPRITE_W, SPRITE_H, TEX_BASE_BYTES,
|
|
raster_pixel_emit_count, textured_emit_seen);
|
|
|
|
if (errors == 0) $display("[tb_gs_textured_sprite] PASS");
|
|
else $display("[tb_gs_textured_sprite] FAIL");
|
|
$finish;
|
|
end
|
|
|
|
initial begin
|
|
#5000000;
|
|
$error("[tb_gs_textured_sprite] timeout");
|
|
$finish;
|
|
end
|
|
|
|
endmodule : tb_gs_textured_sprite
|