thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
83 lines
2.9 KiB
Systemverilog
83 lines
2.9 KiB
Systemverilog
// retroDE_ps2 — tb_gs_texel_addr
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//
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// Unit test for gs_texel_addr: hand-computed (u,v,tbw,psm) -> byte address
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// cases across all four common PS2 pixel formats, including the PSMT4
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// nibble-select. Pure combinational DUT; drive inputs, check outputs.
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`timescale 1ns/1ps
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module tb_gs_texel_addr;
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localparam logic [5:0] PSMCT32 = 6'h00;
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localparam logic [5:0] PSMCT16 = 6'h02;
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localparam logic [5:0] PSMT8 = 6'h13;
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localparam logic [5:0] PSMT4 = 6'h14;
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logic [31:0] base_byte_addr;
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logic [10:0] u, v;
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logic [13:0] tbw;
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logic [5:0] psm;
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logic [31:0] texel_byte_addr;
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logic nibble_hi;
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int errors = 0;
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gs_texel_addr #(.ADDR_W(32)) dut (
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.base_byte_addr (base_byte_addr),
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.u (u),
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.v (v),
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.tbw (tbw),
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.psm (psm),
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.texel_byte_addr(texel_byte_addr),
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.nibble_hi (nibble_hi)
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);
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task automatic check(input string name,
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input logic [31:0] exp_addr,
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input logic exp_nib);
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#1;
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if (texel_byte_addr !== exp_addr || nibble_hi !== exp_nib) begin
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$display("FAIL %-22s addr=%0d (exp %0d) nib=%0b (exp %0b)",
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name, texel_byte_addr, exp_addr, nibble_hi, exp_nib);
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errors++;
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end else begin
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$display("ok %-22s addr=%0d nib=%0b", name, texel_byte_addr, nibble_hi);
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end
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endtask
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initial begin
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// PSMCT32, base 0, tbw=1 (64 texels/row), (u=3,v=2):
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// offset = 2*64 + 3 = 131 -> *4 = 524
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base_byte_addr = 0; tbw = 1; psm = PSMCT32; u = 3; v = 2;
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check("CT32 b0 (3,2)", 32'd524, 1'b0);
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// PSMCT16, base 0x1000, tbw=2 (128/row), (u=10,v=1):
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// offset = 128 + 10 = 138 -> *2 = 276 ; +0x1000(4096) = 4372
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base_byte_addr = 32'h1000; tbw = 2; psm = PSMCT16; u = 10; v = 1;
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check("CT16 b0x1000 (10,1)", 32'd4372, 1'b0);
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// PSMT8, base 0, tbw=4 (256/row), (u=5,v=0): offset=5 -> *1 = 5
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base_byte_addr = 0; tbw = 4; psm = PSMT8; u = 5; v = 0;
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check("T8 b0 (5,0)", 32'd5, 1'b0);
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// PSMT4, base 0, tbw=1 (64/row), (u=7,v=0): offset=7 -> >>1 = 3, nib=1
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base_byte_addr = 0; tbw = 1; psm = PSMT4; u = 7; v = 0;
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check("T4 b0 (7,0)", 32'd3, 1'b1);
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// PSMT4, (u=8,v=0): offset=8 -> >>1 = 4, nib=0
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base_byte_addr = 0; tbw = 1; psm = PSMT4; u = 8; v = 0;
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check("T4 b0 (8,0)", 32'd4, 1'b0);
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// CT32 row stride sanity: tbw=2 (128/row), (u=0,v=1): offset=128 -> 512
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base_byte_addr = 0; tbw = 2; psm = PSMCT32; u = 0; v = 1;
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check("CT32 stride (0,1)", 32'd512, 1'b0);
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if (errors == 0)
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$display("\nPASS tb_gs_texel_addr (6/6)");
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else
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$display("\nFAIL tb_gs_texel_addr (%0d errors)", errors);
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$finish;
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end
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endmodule
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