thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
456 lines
17 KiB
Systemverilog
456 lines
17 KiB
Systemverilog
// retroDE_ps2 — tb_gs_scanout_basic (Ch90, Ch91-rewired)
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//
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// End-to-end round trip TB:
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//
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// gs_stub.raster_pixel_emit → vram_stub → gs_pcrtc_stub → r/g/b
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//
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// This is the FIRST TB where written pixels are read back as
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// scan-out video — the previous Ch89 TB only verified storage
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// via the debug read port. Here the scanout engine drives its
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// own raster timing, generates fb_addr from (hcnt, vcnt), reads
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// vram, and produces the per-pixel color we then sample at the
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// pcrtc output.
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//
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// Ch91 — scanout configuration arrives through the privileged
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// CPU MMIO port (gs_stub.reg_wr_*), not via TB sideband. We
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// write DISPFB1 first (FBP/FBW/PSM), then PMODE.EN1=1 to enable
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// scanout. This matches how a real PS2 driver brings up display.
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//
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// Stream:
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// PRIM=SPRITE, FRAME_1 (FBP=0 FBW=1 PSMCT32), RGBAQ=0x0000FF30
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// v1=(0,0), v2=(3,3) — 4×4 sprite
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//
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// FBP=0 keeps the sprite at the start of VRAM. FBW=1 means
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// FBW*64=64 pixels per row → row-stride = 64*4 = 256 bytes.
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// Sprite addresses: row 0 0..0xc; row 1 0x100..0x10c;
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// row 2 0x200..0x20c; row 3 0x300..0x30c.
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//
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// pcrtc: H_ACTIVE=16, V_ACTIVE=8 active area; FBP=0/FBW=1/PSMCT32
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// matched to gs_stub config so (hcnt, vcnt) maps to the same
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// fb_addr that gs_stub wrote during raster.
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//
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// Assertions:
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// - Sample r/g/b at every (hcnt, vcnt) inside the active area
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// of one full frame after raster + scanout enable.
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// - Inside the 4×4 sprite region: (R, G, B) = (0x30, 0xFF, 0x00).
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// - Outside the sprite region: (R, G, B) = (0, 0, 0).
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// - At least one EV_MODE frame trace fires.
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`timescale 1ns/1ps
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module tb_gs_scanout_basic;
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localparam int PCRTC_H_ACTIVE = 16;
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localparam int PCRTC_V_ACTIVE = 8;
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logic clk;
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logic rst_n;
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initial clk = 1'b0;
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always #5 clk = ~clk;
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// ------------------------------------------------------------------
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// gs_stub
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// ------------------------------------------------------------------
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logic gif_reg_wr_en;
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logic [7:0] gif_reg_num;
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logic [63:0] gif_reg_data;
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logic priv_reg_wr_en;
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logic [15:0] priv_reg_wr_addr;
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logic [63:0] priv_reg_wr_data;
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logic [7:0] bg_r, bg_g, bg_b;
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logic [63:0] pmode_q, dispfb1_q, display1_q;
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logic [63:0] prim_q, rgbaq_q, xyz2_q, xyzf2_q, frame_1_q, zbuf_1_q;
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logic prim_complete;
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logic [31:0] prim_complete_count;
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logic [63:0] prim_v0_q, prim_v1_q, prim_v2_q;
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logic [63:0] prim_color_q;
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logic [63:0] prim_color_v0_q, prim_color_v1_q, prim_color_v2_q;
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trace_pkg::vertex_t prim_v0_decoded_q, prim_v1_decoded_q, prim_v2_decoded_q;
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trace_pkg::color_t prim_v0_color_decoded_q, prim_v1_color_decoded_q, prim_v2_color_decoded_q;
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logic pixel_emit;
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logic [31:0] pixel_emit_count;
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logic [11:0] pixel_x_q, pixel_y_q;
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logic [63:0] pixel_color_q;
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logic [8:0] pixel_fbp_q;
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logic [5:0] pixel_fbw_q, pixel_psm_q;
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logic [31:0] pixel_fb_addr_q;
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logic raster_pixel_emit;
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logic [31:0] raster_pixel_emit_count;
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logic [11:0] raster_pixel_x_q, raster_pixel_y_q;
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logic [63:0] raster_pixel_color_q;
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logic [31:0] raster_pixel_fb_addr_q;
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logic [3:0] raster_pixel_be_q;
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logic [5:0] raster_pixel_psm_q;
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logic raster_active;
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logic raster_overflow;
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logic raster_degenerate;
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logic gs_ev_valid;
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trace_pkg::subsys_e gs_ev_subsys;
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trace_pkg::event_e gs_ev_event;
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logic [63:0] gs_ev_arg0, gs_ev_arg1, gs_ev_arg2, gs_ev_arg3;
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logic [31:0] gs_ev_flags;
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gs_stub u_gs (
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.clk(clk), .rst_n(rst_n),
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.reg_wr_en (priv_reg_wr_en),
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.reg_wr_addr(priv_reg_wr_addr),
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.reg_wr_data(priv_reg_wr_data),
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.gif_reg_wr_en(gif_reg_wr_en),
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.gif_reg_num(gif_reg_num),
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.gif_reg_data(gif_reg_data),
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.bg_r(bg_r), .bg_g(bg_g), .bg_b(bg_b),
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.pmode_q(pmode_q), .dispfb1_q(dispfb1_q),
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.display1_q(display1_q),
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.prim_q(prim_q), .rgbaq_q(rgbaq_q),
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.xyz2_q(xyz2_q), .xyzf2_q(xyzf2_q),
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.frame_1_q(frame_1_q), .zbuf_1_q(zbuf_1_q),
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.prim_complete(prim_complete),
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.prim_complete_count(prim_complete_count),
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.prim_v0_q(prim_v0_q), .prim_v1_q(prim_v1_q), .prim_v2_q(prim_v2_q),
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.prim_color_q(prim_color_q),
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.prim_color_v0_q(prim_color_v0_q),
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.prim_color_v1_q(prim_color_v1_q),
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.prim_color_v2_q(prim_color_v2_q),
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.prim_v0_decoded_q(prim_v0_decoded_q),
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.prim_v1_decoded_q(prim_v1_decoded_q),
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.prim_v2_decoded_q(prim_v2_decoded_q),
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.prim_v0_color_decoded_q(prim_v0_color_decoded_q),
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.prim_v1_color_decoded_q(prim_v1_color_decoded_q),
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.prim_v2_color_decoded_q(prim_v2_color_decoded_q),
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.pixel_emit(pixel_emit),
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.pixel_emit_count(pixel_emit_count),
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.pixel_x_q(pixel_x_q), .pixel_y_q(pixel_y_q),
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.pixel_color_q(pixel_color_q),
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.pixel_fbp_q(pixel_fbp_q),
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.pixel_fbw_q(pixel_fbw_q),
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.pixel_psm_q(pixel_psm_q),
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.pixel_fb_addr_q(pixel_fb_addr_q),
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.raster_pixel_emit(raster_pixel_emit),
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.raster_pixel_emit_count(raster_pixel_emit_count),
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.raster_pixel_x_q(raster_pixel_x_q),
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.raster_pixel_y_q(raster_pixel_y_q),
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.raster_pixel_color_q(raster_pixel_color_q),
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.raster_pixel_fb_addr_q(raster_pixel_fb_addr_q),
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.raster_pixel_be_q(raster_pixel_be_q),
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.raster_pixel_psm_q(raster_pixel_psm_q),
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.raster_active(raster_active),
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.raster_overflow(raster_overflow),
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.raster_degenerate(raster_degenerate),
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.ev_valid(gs_ev_valid),
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.ev_subsys(gs_ev_subsys),
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.ev_event(gs_ev_event),
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.ev_arg0(gs_ev_arg0), .ev_arg1(gs_ev_arg1),
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.ev_arg2(gs_ev_arg2), .ev_arg3(gs_ev_arg3),
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.ev_flags(gs_ev_flags)
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);
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// ------------------------------------------------------------------
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// vram_stub — sized to 4 KiB (sprite addresses fit in the
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// first 0x310 bytes; 4 KiB is comfortable margin).
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// ------------------------------------------------------------------
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logic [31:0] vram_read_addr;
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logic [31:0] vram_read_data;
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vram_stub #(.BYTES(4096)) u_vram (
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.clk(clk), .rst_n(rst_n),
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.write_en (raster_pixel_emit),
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.write_addr(raster_pixel_fb_addr_q),
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.write_data(raster_pixel_color_q[31:0]),
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.write_be (raster_pixel_be_q),
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.write_mask(32'hFFFF_FFFF),
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.read_addr (vram_read_addr),
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.read_data (vram_read_data),
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.read2_addr(32'd0),
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.read2_data()
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);
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// ------------------------------------------------------------------
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// gs_pcrtc_stub — drives vram_read_addr and consumes
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// vram_read_data.
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// ------------------------------------------------------------------
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logic hsync_o, vsync_o, de_o;
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logic [7:0] r_o, g_o, b_o;
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logic pcrtc_ev_valid;
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trace_pkg::subsys_e pcrtc_ev_subsys;
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trace_pkg::event_e pcrtc_ev_event;
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logic [63:0] pcrtc_ev_arg0, pcrtc_ev_arg1;
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logic [63:0] pcrtc_ev_arg2, pcrtc_ev_arg3;
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logic [31:0] pcrtc_ev_flags;
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gs_pcrtc_stub #(
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.H_ACTIVE(PCRTC_H_ACTIVE),
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.H_FRONT (1),
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.H_SYNC (1),
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.H_BACK (1),
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.V_ACTIVE(PCRTC_V_ACTIVE),
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.V_FRONT (1),
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.V_SYNC (1),
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.V_BACK (1)
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) u_pcrtc (
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.clk(clk), .rst_n(rst_n),
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.pmode_q (pmode_q),
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.dispfb1_q (dispfb1_q),
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.display1_q (display1_q),
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.vram_read_addr(vram_read_addr),
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.vram_read_data(vram_read_data),
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.clut_enable (1'b0),
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.clut_csa (5'd0),
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.clut_read_idx (),
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.clut_read_data(32'd0),
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.hsync(hsync_o), .vsync(vsync_o), .de(de_o),
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.r(r_o), .g(g_o), .b(b_o),
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.ev_valid(pcrtc_ev_valid),
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.ev_subsys(pcrtc_ev_subsys),
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.ev_event(pcrtc_ev_event),
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.ev_arg0(pcrtc_ev_arg0), .ev_arg1(pcrtc_ev_arg1),
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.ev_arg2(pcrtc_ev_arg2), .ev_arg3(pcrtc_ev_arg3),
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.ev_flags(pcrtc_ev_flags)
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);
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// ------------------------------------------------------------------
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// Sample the scanned-out frame: when de fires, we know the
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// current (hcnt, vcnt) corresponds to vram_read_addr =
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// (vcnt * pcrtc_pixels_per_row + hcnt) * 4. We sample
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// r/g/b/de into a captured frame buffer indexed by
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// (vcnt, hcnt).
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//
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// We watch hcnt/vcnt indirectly via DE — when DE just rose
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// we're at (0,0); when it just fell at line end we know the
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// line ended; etc. Cleaner: cross-check via internal pcrtc
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// counters using hierarchical access (white-box).
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// ------------------------------------------------------------------
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logic [7:0] cap_r [0:PCRTC_V_ACTIVE-1][0:PCRTC_H_ACTIVE-1];
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logic [7:0] cap_g [0:PCRTC_V_ACTIVE-1][0:PCRTC_H_ACTIVE-1];
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logic [7:0] cap_b [0:PCRTC_V_ACTIVE-1][0:PCRTC_H_ACTIVE-1];
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logic cap_de[0:PCRTC_V_ACTIVE-1][0:PCRTC_H_ACTIVE-1];
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int pcrtc_frame_pulse_count;
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int errors;
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bit capture_armed;
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initial begin
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for (int y = 0; y < PCRTC_V_ACTIVE; y++)
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for (int x = 0; x < PCRTC_H_ACTIVE; x++) begin
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cap_r[y][x] = 8'd0;
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cap_g[y][x] = 8'd0;
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cap_b[y][x] = 8'd0;
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cap_de[y][x] = 1'b0;
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end
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pcrtc_frame_pulse_count = 0;
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errors = 0;
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capture_armed = 1'b0;
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end
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// Capture using pcrtc's internal hcnt/vcnt (white-box). We
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// sample one cycle "early" (at posedge clk when hcnt/vcnt
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// identify the current pixel and r/g/b are comb-valid) so
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// capture aligns with the pixel index that fb_addr was
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// computed from.
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always_ff @(posedge clk) begin
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if (rst_n && capture_armed && de_o
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&& (u_pcrtc.vcnt < PCRTC_V_ACTIVE)
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&& (u_pcrtc.hcnt < PCRTC_H_ACTIVE)) begin
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cap_r [u_pcrtc.vcnt][u_pcrtc.hcnt] <= r_o;
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cap_g [u_pcrtc.vcnt][u_pcrtc.hcnt] <= g_o;
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cap_b [u_pcrtc.vcnt][u_pcrtc.hcnt] <= b_o;
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cap_de[u_pcrtc.vcnt][u_pcrtc.hcnt] <= 1'b1;
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end
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if (rst_n && pcrtc_ev_valid) begin
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pcrtc_frame_pulse_count <= pcrtc_frame_pulse_count + 1;
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end
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end
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task automatic step_drive(input logic wr_en,
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input logic [7:0] num,
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input logic [63:0] data);
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@(negedge clk);
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gif_reg_wr_en = wr_en;
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gif_reg_num = num;
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gif_reg_data = data;
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@(posedge clk);
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endtask
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task automatic drive_reg(input logic [7:0] num, input logic [63:0] data);
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step_drive(1'b1, num, data);
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endtask
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task automatic drive_idle();
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step_drive(1'b0, 8'd0, 64'd0);
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endtask
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// Ch91 — privileged-block (CPU MMIO) writes go through the
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// separate reg_wr_* port. Scanout config (PMODE / DISPFB1)
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// arrives this way, NOT via TB sideband.
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task automatic drive_priv(input logic [15:0] addr,
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input logic [63:0] data);
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@(negedge clk);
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priv_reg_wr_en = 1'b1;
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priv_reg_wr_addr = addr;
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priv_reg_wr_data = data;
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@(posedge clk);
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@(negedge clk);
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priv_reg_wr_en = 1'b0;
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priv_reg_wr_addr = 16'd0;
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priv_reg_wr_data = 64'd0;
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endtask
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function automatic logic [63:0] xyz2_data(input logic [11:0] x_int,
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input logic [11:0] y_int);
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return {32'd0, y_int, 4'd0, x_int, 4'd0};
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endfunction
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localparam logic [7:0] R_PRIM = 8'h00;
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localparam logic [7:0] R_RGBAQ = 8'h01;
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localparam logic [7:0] R_XYZ2 = 8'h05;
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localparam logic [7:0] R_FRAME_1 = 8'h4C;
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// Privileged offsets (CPU MMIO within 0x12000000).
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localparam logic [15:0] PMODE_OFF = 16'h0000;
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localparam logic [15:0] DISPFB1_OFF = 16'h0070;
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localparam logic [15:0] DISPLAY1_OFF = 16'h0080;
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localparam logic [63:0] PRIM_SPRITE = 64'd6;
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// FRAME_1: FBP[8:0]=0, FBW[5:0]=1, PSM[5:0]=PSMCT32(0).
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localparam logic [63:0] FRAME_1_VAL = 64'h0000_0000_0001_0000;
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localparam logic [63:0] RGBAQ_VAL = 64'h0000_0000_0000_FF30;
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// DISPFB1: FBP=0 [8:0], FBW=1 [14:9], PSM=PSMCT32=0 [19:15].
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// FBW=1 sits at bit 9 → 0x200.
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localparam logic [63:0] DISPFB1_VAL = 64'h0000_0000_0000_0200;
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// PMODE.EN1 = bit 0.
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localparam logic [63:0] PMODE_EN1 = 64'h0000_0000_0000_0001;
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// DISPLAY1: cover the full active area (DX=0, DY=0,
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// DW=H_ACTIVE-1, DH=V_ACTIVE-1).
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// DW field = bits [43:32]
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// DH field = bits [54:44]
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localparam logic [63:0] DISPLAY1_VAL =
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(64'(PCRTC_H_ACTIVE - 1) << 32) // DW
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| (64'(PCRTC_V_ACTIVE - 1) << 44); // DH
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// Expected ABGR after PSMCT32 swizzle (R=0x30, G=0xFF, B=0x00, A=0).
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localparam logic [7:0] EXP_R = 8'h30;
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localparam logic [7:0] EXP_G = 8'hFF;
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localparam logic [7:0] EXP_B = 8'h00;
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// Sprite covers (0..3, 0..3) — 4×4 = 16 pixels.
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localparam int SPRITE_W = 4;
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localparam int SPRITE_H = 4;
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initial begin
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rst_n = 1'b0;
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gif_reg_wr_en = 1'b0;
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gif_reg_num = 8'd0;
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gif_reg_data = 64'd0;
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priv_reg_wr_en = 1'b0;
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priv_reg_wr_addr = 16'd0;
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priv_reg_wr_data = 64'd0;
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repeat (4) @(posedge clk);
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rst_n = 1'b1;
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repeat (2) @(posedge clk);
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// Configure DISPFB1 + DISPLAY1 first (before enabling
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// scanout). At this point PMODE.EN1=0 so pcrtc still
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// outputs zero — the configure-then-enable order matches
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// real driver bring-up. DISPLAY1 covers the full active
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// area so this TB sees the same window as pre-Ch92.
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drive_priv(DISPFB1_OFF, DISPFB1_VAL);
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drive_priv(DISPLAY1_OFF, DISPLAY1_VAL);
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// Drive sprite into VRAM.
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drive_reg(R_PRIM, PRIM_SPRITE);
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drive_reg(R_FRAME_1, FRAME_1_VAL);
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drive_reg(R_RGBAQ, RGBAQ_VAL);
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drive_reg(R_XYZ2, xyz2_data(12'd0, 12'd0)); // v1
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drive_reg(R_XYZ2, xyz2_data(12'd3, 12'd3)); // v2 — close
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drive_idle();
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// Wait for raster to start (FIFO pop → R_SCAN), then for
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// it to fully drain. Without the rising-edge wait, the
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// falling-edge wait would fire instantly because at this
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// moment the pop hasn't fired yet.
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wait (raster_active == 1'b1);
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wait (raster_active == 1'b0);
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repeat (10) @(posedge clk);
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if (raster_pixel_emit_count != 32'd16) begin
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$error("expected 16 raster emits, got %0d", raster_pixel_emit_count);
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errors = errors + 1;
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end
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||
// Cross-check: dispfb1_q must hold what we wrote (FBW=1
|
||
// landing at bit 9, PSMCT32 at bits [19:15]=0).
|
||
if (dispfb1_q !== DISPFB1_VAL) begin
|
||
$error("dispfb1_q=0x%016x (expected 0x%016x)", dispfb1_q, DISPFB1_VAL);
|
||
errors = errors + 1;
|
||
end
|
||
if (pmode_q !== 64'd0) begin
|
||
$error("pmode_q=0x%016x before EN1 write (expected 0)", pmode_q);
|
||
errors = errors + 1;
|
||
end
|
||
|
||
// Now enable scanout via PMODE.EN1. This is the canonical
|
||
// driver bring-up sequence: configure DISPFB1 → render
|
||
// into VRAM → set PMODE.EN1.
|
||
drive_priv(PMODE_OFF, PMODE_EN1);
|
||
|
||
if (pmode_q[0] !== 1'b1) begin
|
||
$error("pmode_q[0]=%b after EN1 write (expected 1)", pmode_q[0]);
|
||
errors = errors + 1;
|
||
end
|
||
|
||
// Drain partial frame — wait for next frame boundary.
|
||
@(posedge u_pcrtc.end_of_frame);
|
||
@(posedge clk); // step into the new frame's hcnt=0
|
||
|
||
// Arm capture for one full frame.
|
||
capture_armed = 1'b1;
|
||
@(posedge u_pcrtc.end_of_frame);
|
||
@(posedge clk);
|
||
capture_armed = 1'b0;
|
||
|
||
// Verify the captured frame.
|
||
for (int y = 0; y < PCRTC_V_ACTIVE; y++) begin
|
||
for (int x = 0; x < PCRTC_H_ACTIVE; x++) begin
|
||
logic [7:0] er, eg, eb;
|
||
if (x < SPRITE_W && y < SPRITE_H) begin
|
||
er = EXP_R; eg = EXP_G; eb = EXP_B;
|
||
end else begin
|
||
er = 8'd0; eg = 8'd0; eb = 8'd0;
|
||
end
|
||
if (!cap_de[y][x]) begin
|
||
$error("(%0d,%0d) DE never asserted during capture window", x, y);
|
||
errors = errors + 1;
|
||
end
|
||
if (cap_r[y][x] !== er || cap_g[y][x] !== eg || cap_b[y][x] !== eb) begin
|
||
$error("(%0d,%0d) got (%02x,%02x,%02x) expected (%02x,%02x,%02x)",
|
||
x, y, cap_r[y][x], cap_g[y][x], cap_b[y][x], er, eg, eb);
|
||
errors = errors + 1;
|
||
end
|
||
end
|
||
end
|
||
|
||
if (pcrtc_frame_pulse_count < 1) begin
|
||
$error("pcrtc EV_MODE frame pulse never fired");
|
||
errors = errors + 1;
|
||
end
|
||
|
||
$display("[tb_gs_scanout_basic] frames=%0d sprite=%0dx%0d active=%0dx%0d",
|
||
pcrtc_frame_pulse_count, SPRITE_W, SPRITE_H,
|
||
PCRTC_H_ACTIVE, PCRTC_V_ACTIVE);
|
||
|
||
if (errors == 0) $display("[tb_gs_scanout_basic] PASS");
|
||
else $display("[tb_gs_scanout_basic] FAIL");
|
||
$finish;
|
||
end
|
||
|
||
initial begin
|
||
#5000000;
|
||
$error("[tb_gs_scanout_basic] timeout");
|
||
$finish;
|
||
end
|
||
|
||
endmodule : tb_gs_scanout_basic
|