thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
149 lines
6.2 KiB
Systemverilog
149 lines
6.2 KiB
Systemverilog
// retroDE_ps2 — gs_swizzle_psmct32_stub (Ch119)
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//
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// Pure-combinational PSMCT32 page/block swizzle: maps a pixel
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// coordinate (x, y) within a framebuffer at (FBP, FBW) to its
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// physical VRAM byte address using the real PS2 GS layout.
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//
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// THIS MODULE DOES NOT YET REPLACE THE LINEAR ADDRESSING in
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// gs_stub / gs_pcrtc_stub / gif_image_xfer_stub. It is the
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// math primitive that future chapters will wire into the
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// existing address paths to swap "linear FBW*64*y + x*4"
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// for the real GS swizzled addressing. Ch119 establishes the
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// math, locks it against the canonical PCSX2 PSMCT32 block
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// table with a focused TB, and leaves integration to follow-on
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// chapters so the existing 109 TBs stay on the linear path.
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//
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// Real PS2 PSMCT32 layout (per PCSX2 GS source):
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// - VRAM is 4 MiB total, organized in 8 KiB pages.
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// - Each page is 64×32 PSMCT32 pixels (= 64×32×4 = 8192 bytes).
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// - Each page is divided into a 4×8 grid of blocks (4 rows of
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// blocks, 8 cols of blocks per row), each block 8×8 pixels
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// (= 256 bytes). 4×8 = 32 blocks/page.
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// - Block ordering within a page is NOT row-major; it follows
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// the PSMCT32 swizzle table below (a Z-order-like permutation
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// of (block_x, block_y) that PCSX2's GSLocalMemoryFunctions.cpp
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// defines verbatim).
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// - Within a block, PSMCT32 is row-major: pixel (xb, yb) maps
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// to byte_offset_in_block = yb*32 + xb*4 (no further swizzle
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// for PSMCT32 — other PSMs have intra-block reorderings).
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//
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// Address formula (linear in pages, swizzled in blocks within a
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// page, linear within a block):
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// pages_per_fbrow = FBW // FBW is in 64-px units; PSMCT32 page is 64 px wide
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// page_x = x / 64
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// page_y = y / 32
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// page_index = page_y * pages_per_fbrow + page_x
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// page_base = FBP*2048 + page_index*8192
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//
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// block_x_in_page = (x % 64) / 8 // 0..7
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// block_y_in_page = (y % 32) / 8 // 0..3
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// block_idx = SWIZZLE[block_y_in_page][block_x_in_page]
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// block_base = page_base + block_idx*256
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//
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// xb = x % 8
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// yb = y % 8
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// byte_in_block = yb*32 + xb*4
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//
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// addr = block_base + byte_in_block
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//
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// FBP is a 9-bit field at 2048-byte granularity, so FBP*2048
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// can land at any 2048-byte boundary in VRAM — including mid-
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// page boundaries (FBP[1:0] != 0). The math here treats FBP*2048
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// as the literal byte base, with the swizzled page/block/pixel
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// offset added on top, which matches real-PS2 behavior. Page-
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// aligned FBP (FBP[1:0]==0) is the common case in our demo, but
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// the address formula is bit-correct for any 2048-byte-aligned
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// FBP, and the focused TB exercises non-page-aligned FBP=1,2,3
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// to lock that.
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`timescale 1ns/1ps
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module gs_swizzle_psmct32_stub
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(
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// Framebuffer config (matches FRAME_1 register fields).
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input logic [8:0] fbp, // FBP — frame base, in 2048-byte units
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input logic [5:0] fbw, // FBW — frame width, in 64-pixel units
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// Pixel coordinate within the framebuffer.
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input logic [11:0] x,
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input logic [11:0] y,
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// Resulting VRAM byte address.
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output logic [31:0] addr
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);
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// --------------------------------------------------------------
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// Block swizzle table for PSMCT32 (PCSX2 GSLocalMemoryFunctions.cpp,
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// psmt32 block order). Indexed [block_y_in_page][block_x_in_page]
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// with block_x ∈ 0..7 and block_y ∈ 0..3; value is the linear
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// block index within the page (0..31).
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// --------------------------------------------------------------
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function automatic logic [4:0] swizzle_psmct32(
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input logic [1:0] by, // block_y_in_page (0..3)
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input logic [2:0] bx); // block_x_in_page (0..7)
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case ({by, bx})
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5'h00: return 5'd0; // (0,0)
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5'h01: return 5'd1; // (0,1)
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5'h02: return 5'd4; // (0,2)
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5'h03: return 5'd5; // (0,3)
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5'h04: return 5'd16; // (0,4)
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5'h05: return 5'd17; // (0,5)
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5'h06: return 5'd20; // (0,6)
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5'h07: return 5'd21; // (0,7)
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5'h08: return 5'd2; // (1,0)
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5'h09: return 5'd3; // (1,1)
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5'h0A: return 5'd6; // (1,2)
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5'h0B: return 5'd7; // (1,3)
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5'h0C: return 5'd18; // (1,4)
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5'h0D: return 5'd19; // (1,5)
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5'h0E: return 5'd22; // (1,6)
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5'h0F: return 5'd23; // (1,7)
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5'h10: return 5'd8; // (2,0)
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5'h11: return 5'd9; // (2,1)
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5'h12: return 5'd12; // (2,2)
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5'h13: return 5'd13; // (2,3)
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5'h14: return 5'd24; // (2,4)
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5'h15: return 5'd25; // (2,5)
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5'h16: return 5'd28; // (2,6)
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5'h17: return 5'd29; // (2,7)
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5'h18: return 5'd10; // (3,0)
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5'h19: return 5'd11; // (3,1)
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5'h1A: return 5'd14; // (3,2)
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5'h1B: return 5'd15; // (3,3)
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5'h1C: return 5'd26; // (3,4)
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5'h1D: return 5'd27; // (3,5)
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5'h1E: return 5'd30; // (3,6)
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default: return 5'd31; // (3,7)
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endcase
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endfunction
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// Decompose pixel coord into page / block / pixel-in-block.
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logic [11:0] page_x;
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logic [11:0] page_y;
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logic [1:0] by;
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logic [2:0] bx;
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logic [2:0] xb;
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logic [2:0] yb;
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assign page_x = x >> 6; // x / 64
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assign page_y = y >> 5; // y / 32
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assign by = y[4:3]; // (y % 32) / 8
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assign bx = x[5:3]; // (x % 64) / 8
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assign xb = x[2:0]; // x % 8
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assign yb = y[2:0]; // y % 8
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logic [4:0] block_idx;
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assign block_idx = swizzle_psmct32(by, bx);
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// Address composition.
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logic [31:0] page_base;
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logic [31:0] block_base;
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logic [31:0] byte_in_block;
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logic [31:0] page_index;
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assign page_index = ({20'd0, page_y} * {26'd0, fbw}) + {20'd0, page_x};
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assign page_base = ({23'd0, fbp} << 11) + (page_index << 13); // FBP*2048 + page_index*8192
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assign block_base = page_base + ({27'd0, block_idx} << 8); // + block_idx*256
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assign byte_in_block = ({29'd0, yb} << 5) + ({29'd0, xb} << 2); // yb*32 + xb*4
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assign addr = block_base + byte_in_block;
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endmodule : gs_swizzle_psmct32_stub
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