thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
45 lines
1.4 KiB
Markdown
45 lines
1.4 KiB
Markdown
# rtl/debug
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Trace taps, observability modules, and first-class debug infrastructure.
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This directory is intentionally first-class per the debug/validation strategy
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in `docs/contracts/validation.md`. Nothing here is ornamental; stubs and real
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blocks alike depend on it.
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## Wave 1 contents
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- `trace_pkg.sv` — shared types (`subsys_e`, `event_e`) and string renderers
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used by all trace producers and `trace_sink_stub`.
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- `trace_sink_stub.sv` — simulation-only text trace writer. One instance per
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output file; each Wave 1 stub wires its event port to its own sink. See
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`docs/decisions/0000-trace-format.md` for format rationale.
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## Usage pattern for Wave 1 testbenches
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```systemverilog
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trace_sink_stub #(
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.FILENAME ("ee.trace"),
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.SINK_LABEL("ee_fetch")
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) u_trace_ee (
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.clk (clk),
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.rst_n (rst_n),
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.ev_valid (dut_ev_valid),
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.ev_subsys(dut_ev_subsys),
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.ev_event (dut_ev_event),
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.ev_arg0 (dut_ev_arg0),
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.ev_arg1 (dut_ev_arg1),
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.ev_arg2 (dut_ev_arg2),
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.ev_arg3 (dut_ev_arg3),
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.ev_flags (dut_ev_flags)
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);
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```
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## Notes
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- Cycle counter is internal to the sink and advances on `clk` while `rst_n`
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is high. Cross-clock correlation is a later-wave concern.
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- `ev_flags == 0` renders as `-` in the trace line; any non-zero value is
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printed as an 8-hex-digit field.
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- Event/subsystem codes are globally unique in Wave 1 (not per-subsystem).
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Revisit if the namespace gets crowded.
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