thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
97 lines
3.9 KiB
Markdown
97 lines
3.9 KiB
Markdown
# Ch305 closeout — DSUBU; THIRD inflection (+1.46M retires); EE-core reality checkpoint queued
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**Status:** Closed. **Verdict from re-running qbert.elf:**
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`elf_timeout_with_hot_pc (1489428 retires, hot_pc=0x00106154)` —
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qbert advanced 29,417 → **1,489,428 retires (+1,460,011)**, a
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**third inflection**, then hit a new steady-state wait loop in a
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different code region.
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## What landed — `rtl/ee/ee_core_stub.sv` (4 edits)
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R5900 DSUBU (SPECIAL funct 0x2F), the 64-bit-subtract sibling of
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Ch272's DADDU. Modelled as SUBU on the low 32 bits, no overflow
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trap:
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1. `localparam FUNC_DSUBU = 6'h2F`.
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2. `is_dsubu = is_special && (func == FUNC_DSUBU)`.
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3. Added `is_dsubu` to `is_rtype_alu` (which auto-excludes it from
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`is_nop_class` via the SPECIAL clause — no separate nop_class
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edit needed).
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4. Extended the SUBU writeback arm: `is_sub || is_subu || is_dsubu`
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→ `rs_val - rt_val`.
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## Focused TB — `tb_ee_core_dsubu.sv`
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Three cases, all PASS:
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1. Normal: `dsubu $t0, $a0, $a1` (8 - 3 = 5).
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2. **Exact qbert encoding asserted** `0x0062102F` = `dsubu $v0,
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$v1, $v0` (10 - 4 = 6).
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3. Underflow: `dsubu $t3, $0, $a3` (0 - 1 = 0xFFFFFFFF, no trap).
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Result: `$t0=5 $v0=6 $t3=0xFFFFFFFF errors=0 PASS`.
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## qbert progression — third inflection
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| Chapter | retire_count | verdict |
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|---------|--------------|---------|
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| Post-Ch304 (0x6B) | 29,417 | opcode trap (DSUBU) |
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| **Post-Ch305 (DSUBU)** | **1,489,428** | **timeout_with_hot_pc** |
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+1.46M retires. The third time a single opcode/syscall addition
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has unlocked a >1M-retire stretch (after Ch293's syscall 0x7A and
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Ch297's syscall 0x77). DSUBU was the last blocker in a hot
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numeric-init path; clearing it let qbert run deep into a new
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region (hot_pc 0x00106154 — note 0x00106xxx, *lower* than all
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prior blockers, so a different/earlier-linked function).
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The new wait loop at 0x00106154 is a Ch307+ autopsy candidate —
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**deferred** in favor of the Ch306 reality checkpoint per the
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strategic decision below.
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## Strategic pivot — Ch306 = EE core reality checkpoint
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Codex and the project owner have (correctly) called the question:
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**the qbert track is building a behavioral compatibility oracle,
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not a synthesizable R5900.** Before sinking more chapters into
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either track, Ch306 is a recon/design checkpoint that splits the
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roadmap into two explicit tracks:
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- **Track A — EE Behavioral Oracle** (`ee_core_stub`): continue
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qbert only to *discover* required instructions/syscalls/MMIO.
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Output = a living compliance checklist.
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- **Track B — Synthesizable EE Core**: a separate, deliberate RTL
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plan. Must NOT grow accidentally from the stub.
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Ch306's job (a workflow): inventory every `ee_core_stub` feature
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and classify each as:
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1. **architectural instruction** → graduates to real RTL,
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2. **HLE syscall behavior** → BIOS/kernel, lives in ROM or an HLE
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companion, NOT the CPU,
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3. **TB-only / qbert-specific hack** (gate pokes, $a0-aware
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returns, Ch215 shim) → pure scaffolding for missing async
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hardware, NEVER graduates,
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4. **unsynthesizable / sim-only** (trace ports, hierarchical
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peeks) → must be stripped or gated for synthesis.
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Plus: a go/no-go on whether a simple multicycle/interpreter-style
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R5900 subset fits the Agilex 5 and passes the existing ~178 TBs.
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The qbert-focused TBs become the compliance suite for Track B.
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**The validation answer** (the concern that triggered this
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pivot): we *can* validate a real R5900 RTL — the 178 TBs +
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qbert boot path already ARE the harness. We've been writing a
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spec-by-execution for 35 chapters; Ch306 makes it explicit and
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decides the graduation path before, not after, building Track B.
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## Files changed
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- `rtl/ee/ee_core_stub.sv` — 4 DSUBU edits.
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- `sim/tb/integration/tb_ee_core_dsubu.sv` — new focused TB.
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- `sim/Makefile` — target + both regression lists.
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## Regression
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**178/178 PASS** — clean full regression covering both Ch304
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(syscall 0x6B) and Ch305 (DSUBU), with tb_ee_core_dsubu in the
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suite. (Was 177 in Ch304; +1 for the new DSUBU TB.)
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