thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
191 lines
9.5 KiB
Markdown
191 lines
9.5 KiB
Markdown
# Ch263 closeout — kernel-data mutation reaches BIOS but treadmill unchanged
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**Status:** Closed exactly per Codex's Ch263 framing. Routine
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BIOS-long target unchanged. New opt-in target lands the Ch261/Ch262
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responder DMA payload into the BIOS-polled kernel-data scan range,
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verifies the write reaches the EE RAM, and confirms BIOS observes
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the mutation (then scrubs it). **Verdict:
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`kernel_mutation_observed_no_flow_change`.**
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## Codex Ch263 acceptance — line-by-line
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| Codex requirement | Status | Where |
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|---------------------------------------------------------------------------------|--------|--------------------------------------------------|
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| No new RTL if avoidable | ✅ | TB-only change; no RTL touched |
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| Keep Ch261 responder and Ch262 interrupt pulse | ✅ | All Ch262 wiring intact; Ch263 only retargets DMA destination |
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| Change only responder DMA destination/payload | ✅ | `DEST_BASE_ADDR` 0x00080000 → 0x00030200; no payload change |
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| Choose one BIOS-polled kernel-data address | ✅ | `0x80030200` (virt) / `0x00030200` (phys) — mid-range slot in the 16 KiB BIOS scan |
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| Log baseline value at address before DMA | ✅ | `Ch263 baseline = 0x000…000` (all-zero, as expected) |
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| Log responder write value | ✅ | `Ch263 responder wrote 0xcafef00d12345678c0ffee00deadbeef to EE-phys 0x00030200 at t=50001285000` |
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| Log later BIOS reads of same address | ✅ | Trace shows 17 BIOS reads at `0x80030200` across the test |
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| Report whether BIOS observes the mutation | ✅ | **YES** — BIOS reads + actively clears the slot post-write |
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| Report whether treadmill state changes | ✅ | **NO** — retire count, Ch217 passes, Ch218 INTC summary all byte-identical to Ch260 baseline |
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| Avoid Pivot 2 unless this returns clean negative | ✅ | Following the rule; deferring 0x1fa00000 question to Ch264 |
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| Full regression green | ✅ | 157 / 157 with Ch263 off by default |
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## Verdict logic — three-way classification
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Codex framed three possible outcomes:
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- `kernel_mutation_unobserved` — BIOS never reads the slot
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- `kernel_mutation_observed_no_flow_change` — BIOS reads + W1Cs, no progress (← **THIS RUN**)
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- `kernel_mutation_perturbed_flow` — BIOS reads + path changes (= we found a gate)
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The trace evidence + treadmill metrics put this run squarely in the
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middle bucket.
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## What the trace actually showed
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### Step 1 — BIOS scans the 0x80030000–0x80033FF0 range every pass
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From `ee_bios_smoke_map.trace`:
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```
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Total MEM READ in 0x80030xxx range: 1,217,848
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Total MEM WRITE in 0x80030xxx range: 32,768
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```
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That is **4,096 writes per pass × 8 passes** — BIOS clears the
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entire 16 KiB kernel-data table once per pass. Every slot gets
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zeroed every pass. This pattern was visible in the Ch218 v5
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capture but not characterized as a scrub until Ch263.
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### Step 2 — the responder's write lands at our target slot
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```
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cycle 5,000,125 MEM WRITE 0x00030200 data=0xc0ffee00deadbeef region=1 flags=0x01
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```
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(arg1 only carries the low 64 bits of the bridge's 128-bit qword
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write — schema artifact. The qword is `0xcafef00d12345678c0ffee00deadbeef`
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per the Ch263 `responder wrote` diagnostic line.)
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### Step 3 — BIOS observes the value and clears it
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Reads at virt `0x80030200` across the run:
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```
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cycle 770,570 — BIOS init read, slot zero
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cycle 1,287,787 — BIOS init verify
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cycle 5,000,125 — RESPONDER WRITES (between BIOS reads)
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cycle 10,671,220 — BIOS read after responder write (likely sees 0xcafef00d…)
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cycle 11,186,947 — BIOS writes 0 (clears our value)
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cycle 11,188,437 — BIOS reads (sees zero now)
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cycle 20,571,870 — next pass read
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…
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```
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The `arg1=0` in the trace for EV_READ events is hardcoded
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(documented in Ch258), so we can't directly READ the returned
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value from the trace. But the WRITE-ZERO at cycle 11,186,947
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immediately followed by a verify read at 11,188,437 is consistent
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with BIOS reading non-zero data at cycle 10,671,220, deciding to
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scrub, and verifying the clear.
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### Step 4 — treadmill state did not change
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| Metric | Ch260 baseline | Ch262 (responder pulse) | **Ch263 (mutation + pulse)** |
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|-------------------------|------------------|-------------------------|------------------------------|
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| Ch217 caller passes | 8 | 8 | **8 (same)** |
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| Ch217 verdict | static_state | static_state | **static_state (same)** |
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| Ch218 INTC summary | (filtered set) | (same) | **(same)** |
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| Ch218 INTC verdict | intc_quiet | intc_pending_observed | **intc_pending_observed (same)** |
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| Retire count | 24,029,051 | 24,029,051 | **24,029,051 (byte-identical)** |
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## Interpretation
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**BIOS sees mutations in the kernel-data table but is structurally
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defended against them via a periodic-scrub kernel routine.** The
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scrub clears the entire 16 KiB region every Ch217 pass; any value
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we write into a slot lives only until BIOS's next scrub pass, at
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which point it's zeroed. Whatever the longjmp callee is gated on,
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either:
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1. **It isn't in this scanned region** — the scrub means BIOS
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itself doesn't rely on accumulated state in slots `0x80030000-3FF0`.
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The region might be a fresh-init scratchpad that BIOS expects to
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recompute each pass, not a kernel state table.
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2. **It is in this region but BIOS reads the slot's value DURING
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the pass**, not as latched state across passes — and the pass
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timing is such that our write doesn't land in the right window.
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Either way, **single-shot writes into this region are not the gate.**
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## What's next (for Codex's Ch264 call)
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Two distinct candidates given the new "BIOS scrubs every pass"
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finding:
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**(A) Sustained / re-emitted mutation.** If BIOS scrubs every
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pass, a one-shot write loses to the scrub. The Ch263 responder
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could be retriggered EVERY PASS (e.g. driven by a Ch217-pass-edge
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signal) so the slot is re-set after each scrub. This tests
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whether BIOS reads the value MID-PASS before scrubbing — and if
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so, whether sustained value-presence eventually perturbs flow.
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The downside: now we're polluting the very table BIOS is
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managing, which could mask other behavior.
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**(B) Pivot to 0x1fa00000** (the deferred Pivot 2 from the
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Ch263 pre-brief). BIOS writes here 46 times with a sequence of
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values 0x0..0xF. That's a "progress code" or "handshake state
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output" port pattern. Maybe BIOS expects to read back what it
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just wrote — or expects an external observer to see those
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writes and respond. Lower risk than (A) and qualitatively
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different (output, not polled input).
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**(C) Look elsewhere entirely.** The Ch218 v7 capture showed
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the longjmp callee at `0xBFC52984` makes the same JAL with
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identical `$a0/$a1/$v0` every pass. The callee's body reads
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from somewhere — but not from the 0x80030000+ region (per
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Ch263). What does it read? Re-running Ch218 in the Ch263 build
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with the scoping filter widened (or scoped to the callee's PC
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window) could surface the actual polled location.
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## My recommendation
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**(C) first, then (B), then (A) if both negative.**
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Reasoning: Ch263's null result narrows the search significantly.
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BIOS isn't gated on the scrubbed kernel-data table, isn't gated
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on INTC pending alone (Ch262), isn't gated on PCR (Ch258), and
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isn't gated on SMFLG (Ch263 pre-brief). What HASN'T been ruled
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out is **whatever the callee's body actually reads to compute
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its return value**. That's an empirical question Ch264 can
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answer with another scoped Ch218-style observer — narrow the
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capture to PCs inside the callee's body (`0xBFC52984..` + ~16
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instructions) and see what addresses it touches.
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If (C) returns "callee reads from address X" and X is unmapped
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or zero, then THAT becomes the next Ch265 target.
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If (C) is inconclusive (callee uses only register state), then
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(B) — `0x1fa00000` — is the next-best surface to investigate.
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(A) is last-resort: throwing the SAME thing at BIOS but harder
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is unlikely to produce different qualitative behavior.
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## Files changed
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- `sim/tb/integration/tb_ee_core_bios_smoke.sv` — Ch263
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sub-`\`ifdef` inside the Ch262 block: gate the local
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`u_ch262_ee_ram`, override `CH262_EE_LANDING` to phys
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`0x00030200`, add the `ee_map_br_*` priority mux that routes
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responder bridge writes into the BIOS-long shared `u_ee_ram`,
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add Ch263 observer (baseline + responder-write event + BIOS
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reads counter + three-way verdict in `final` block).
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- `sim/Makefile` — new `tb_ee_core_bios_long_kernel_mutate`
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target.
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- `docs/ch263_pre_impl_brief.md` — the recon-first brief that
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surfaced the SIF-mailbox-unobserved finding and proposed
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Pivot 3.
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- `docs/ch263_closeout.md` — this file.
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Caveat: the `final` block summary print didn't fire on this
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run (iverilog 12 quirk with `final` + `$finish` on
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`$error`-triggered timeout). The data was reconstructed from
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the inline `$display` events + trace-file analysis. A future
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chapter could either move the summary into an `always_ff` on
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end-of-test or pre-emptively print at every Ch217 pass.
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Standing by for Codex's Ch264 call.
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