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4e8c3a16b8
Ch444: serialize gradient numerator bank — reclaim ~half the FPGA's DSP
fog-fidelity-timing
thejayman77
2026-07-25 05:28:12 -04:00
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7d68577c75
Ch443f/Ch443e board validation evidence (compact)
thejayman77
2026-07-24 20:11:11 -04:00
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4110846c01
Ch443f timing: preload Z-RMW eviction awaddr at fill (kill cache_dirty->awaddr cone)
thejayman77
2026-07-24 10:19:23 -04:00
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064484c50d
Ch443f: coherent Gray readiness CDC + qualified scanout underflow detector
thejayman77
2026-07-23 23:17:41 -04:00
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2e2c1e9ca6
Ch443e: binomial 4th line buffer + prefetch lead-2 (fix lookahead underflow)
thejayman77
2026-07-23 15:24:37 -04:00
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0c9b2bf5cd
QSF: set fitter placement SEED 3 (bounded sweep winner)
thejayman77
2026-07-23 12:31:31 -04:00
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6319d7ca85
Ch443d: registered AXI R buffer (texcache fill) + drop fill_data_q reset
thejayman77
2026-07-23 10:03:01 -04:00
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846eee06b6
Ch443c: per-frame scanout diagnostic + frame-restart latency fix
thejayman77
2026-07-22 18:10:55 -04:00
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4358bc328b
Ch443b: revert texture 4-bank split; 2-cycle drain (F_SETTLE + multicycle)
thejayman77
2026-07-22 15:11:46 -04:00
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27dfd0b0cf
Ch443: combined timing repair for both Ch442 setup families
thejayman77
2026-07-22 11:19:09 -04:00
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194f45bd05
Ch442 review fixes: fs_edge parity, dest snap_valid, sync attrs + SDC
thejayman77
2026-07-21 23:50:04 -04:00
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6720caee12
Ch442: A+B scanout diagnostic (split LPDDR_STATUS[5] + first-failure snapshot)
thejayman77
2026-07-21 22:40:07 -04:00
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2123e646c8
docs: Ch441 board validation + Ch437 A/B scanout evidence
thejayman77
2026-07-21 20:34:20 -04:00
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96d23ea8ee
Ch441 TB review fixes: complete stall check + full&&d_wready coverage [READY FOR REVIEW]
thejayman77
2026-07-21 14:25:17 -04:00
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dd7ca4fb8e
Ch441: one-entry fully-registered W buffer, Z-RMW master -> wr_arb s2 [READY FOR REVIEW]
thejayman77
2026-07-21 14:11:40 -04:00
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94d6293c43
Ch440 review fixes: 93-bit per-bank test coverage + soften M20K claims [READY FOR REVIEW]
thejayman77
2026-07-21 10:28:31 -04:00
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471c1af9cd
Ch440: gs_async_fifo QUAD_WIDTH4_READ (2 depth x 4 width) for Z-req FIFO [READY FOR REVIEW]
thejayman77
2026-07-21 10:19:09 -04:00
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67aa332928
REVERT REQ_DEPTH to 8192 — 1024 was UNSAFE (Codex audit)
thejayman77
2026-07-21 08:37:39 -04:00
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547811e89b
Z-req FIFO REQ_DEPTH 8192->1024: kill zc_emit EMIF setup path, free 32 M20Ks
thejayman77
2026-07-21 05:43:25 -04:00
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3d27095c2b
QSF: revert to AGGRESSIVE AREA + surgical MAX_FANOUT on Z-req raddr (close EMIF, keep design clk)
thejayman77
2026-07-21 04:36:42 -04:00
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b29fb17a11
QSF: OPTIMIZATION_MODE AGGRESSIVE AREA -> BALANCED (close -0.103ns EMIF path)
thejayman77
2026-07-20 22:04:00 -04:00
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a72aaded22
Add FOG_ENABLE param, prune fog cone on the board profile (fix -6.165ns setup)
thejayman77
2026-07-20 21:31:14 -04:00
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dd75d78491
Fix signoff timing: remove dead bilinear clamp (comb loop) + relax gray skew 2.0->2.5ns
thejayman77
2026-07-20 20:03:42 -04:00
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ba74bbd5aa
Snapshot: fog implementation + fidelity tooling baseline (pre bilinear-clamp fix)
thejayman77
2026-07-20 19:56:46 -04:00
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ec82764bef
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
main
thejayman77
2026-06-29 20:10:50 -04:00