Snapshot: fog implementation + fidelity tooling baseline (pre bilinear-clamp fix)

Per-vertex GS fog end-to-end (gs_stub emit incl. persp_emit5, gs_prim_list_feeder
XYZ2->XYZF2 on PRIM.FGE, gs_make_sh3_scheduler_fixture.py F/FGE packing), new fog
TBs, fidelity attribution tooling. Functional baseline before removing the dead
bilinear lerp8 clamps (Codex: 161-node comb loop -> -0.042ns setup fail).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

sim/data/top_psmct32_raster_demo/sh3_zs640b24_epochs.txt

@@ -0,0 +1,14 @@
+# Ch365 epoch descriptor table (8 epochs, dump order). host/board: preload CLUT table via bootlet;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 8 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse
+0 114590 0 500 sh3_zs640b240_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b240.mem 1843 204 0
+1 115229 0 500 sh3_zs640b241_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b241.mem 1843 204 1
+2 115925 0 500 sh3_zs640b242_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b242.mem 1843 204 1
+3 117599 0 500 sh3_zs640b243_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b243.mem 1843 204 1
+4 118982 0 500 sh3_zs640b244_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b244.mem 1843 204 1
+5 126542 0 500 sh3_zs640b245_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b245.mem 1843 204 1
+6 127394 0 500 sh3_zs640b246_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b246.mem 1843 204 1
+7 128033 0 500 sh3_zs640b247_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640b247.mem 1843 204 1

sim/data/top_psmct32_raster_demo/sh3_zs640c12_epochs.txt

@@ -0,0 +1,10 @@
+# Ch359 epoch descriptor table (4 epochs, dump order). host/board: preload CLUT table via bootlet;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 4 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse
+0 119471 8192 480 sh3_zs640c120_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c120.mem 1843 204 0
+1 120110 8192 480 sh3_zs640c121_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c121.mem 1843 204 1
+2 120749 8192 480 sh3_zs640c122_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c122.mem 1843 204 1
+3 121388 8192 480 sh3_zs640c123_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c123.mem 1843 204 1

sim/data/top_psmct32_raster_demo/sh3_zs640c18_epochs.txt

@@ -0,0 +1,12 @@
+# Ch359 epoch descriptor table (6 epochs, dump order). CLUT=bootlet preload;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 6 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 119471 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c180.mem 565 62 0 - 0x00000000
+1 120110 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c181.mem 520 57 1 - 0x00000000
+2 120749 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c182.mem 718 79 1 - 0x00000000
+3 121388 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c183.mem 538 59 1 - 0x00000000
+4 122027 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c184.mem 520 57 1 - 0x00000000
+5 129389 8192 480 sh3_zs640c180_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c185.mem 412 45 1 - 0x00000000

sim/data/top_psmct32_raster_demo/sh3_zs640c24_epochs.txt

@@ -0,0 +1,14 @@
+# Ch359 epoch descriptor table (8 epochs, dump order). host/board: preload CLUT table via bootlet;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 8 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse
+0 119471 8192 480 sh3_zs640c240_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c240.mem 1843 204 0
+1 120110 8192 480 sh3_zs640c241_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c241.mem 1843 204 1
+2 120749 8192 480 sh3_zs640c242_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c242.mem 1843 204 1
+3 121388 8192 480 sh3_zs640c243_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c243.mem 1843 204 1
+4 122027 8192 480 sh3_zs640c244_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c244.mem 1843 204 1
+5 129389 8192 480 sh3_zs640c245_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c245.mem 1843 204 1
+6 130241 8192 480 sh3_zs640c246_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c246.mem 1843 204 1
+7 130880 8192 480 sh3_zs640c247_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c247.mem 1843 204 1

sim/data/top_psmct32_raster_demo/sh3_zs640c24c_epochs.txt

@@ -0,0 +1,14 @@
+# Ch366 epoch descriptor table (8 epochs, dump order). host/board: preload CLUT table via bootlet;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 8 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse
+0 119471 8192 504 sh3_zs640c24c0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c0.mem 1843 204 0
+1 120110 8192 504 sh3_zs640c24c1_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c1.mem 1843 204 1
+2 120749 8192 504 sh3_zs640c24c2_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c2.mem 1843 204 1
+3 121388 8192 504 sh3_zs640c24c3_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c3.mem 1843 204 1
+4 122027 8192 504 sh3_zs640c24c4_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c4.mem 1843 204 1
+5 129389 8192 504 sh3_zs640c24c5_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c5.mem 1843 204 1
+6 130241 8192 504 sh3_zs640c24c6_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c6.mem 1843 204 1
+7 130880 8192 504 sh3_zs640c24c7_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640c24c7.mem 1843 204 1

sim/data/top_psmct32_raster_demo/sh3_zs640m28_epochs.txt

@@ -0,0 +1,18 @@
+# Ch364 epoch descriptor table (12 epochs, dump order). host/board: preload CLUT table via bootlet;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 12 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse
+0 5328 11264 480 sh3_zs640m280_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zs640m280.mem 493 54 0
+1 11671 10240 484 sh3_zs640m281_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zs640m281.mem 619 68 0
+2 77112 10240 488 sh3_zs640m282_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zs640m282.mem 619 68 0
+3 89164 9216 492 sh3_zs640m283_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zs640m283.mem 619 68 0
+4 119471 8192 496 sh3_zs640m284_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m284.mem 1843 204 0
+5 120110 8192 496 sh3_zs640m285_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m285.mem 1843 204 1
+6 120749 8192 496 sh3_zs640m286_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m286.mem 1843 204 1
+7 121388 8192 496 sh3_zs640m287_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m287.mem 1843 204 1
+8 122027 8192 496 sh3_zs640m288_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m288.mem 1843 204 1
+9 129389 8192 496 sh3_zs640m289_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m289.mem 1843 204 1
+10 130241 8192 496 sh3_zs640m2810_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m2810.mem 1843 204 1
+11 130880 8192 496 sh3_zs640m2811_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640m2811.mem 1843 204 1

sim/data/top_psmct32_raster_demo/sh3_zs640mt5_epochs.txt

@@ -0,0 +1,11 @@
+# Ch357 epoch descriptor table (5 epochs, dump order). host/board: preload CLUT table via bootlet;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 5 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse
+0 5328 11264 480 sh3_zs640mt50_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zs640mt50.mem 493 54 0
+1 11671 10240 484 sh3_zs640mt51_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zs640mt51.mem 619 68 0
+2 77112 10240 488 sh3_zs640mt52_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zs640mt52.mem 619 68 0
+3 89164 9216 492 sh3_zs640mt53_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zs640mt53.mem 619 68 0
+4 119471 8192 496 sh3_zs640mt54_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zs640mt54.mem 619 68 0

sim/data/top_psmct32_raster_demo/sh3_zspxy3_epochs.txt

@@ -0,0 +1,9 @@
+# Ch416 epoch descriptor table (3 epochs, dump order). CLUT=bootlet preload;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 3 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 8634 11264 480 sh3_zspxy30_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zspxy30.mem 259 28 0 - 0x00000000
+1 12757 10240 484 sh3_zspxy31_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zspxy31.mem 97 10 0 - 0x00000000
+2 145742 12288 488 sh3_zspxy32_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zspxy32.mem 97 10 0 - 0x00000000

sim/data/top_psmct32_raster_demo/sh3_zsrt139a1_epochs.txt

@@ -0,0 +1,11 @@
+# Ch395 epoch descriptor table (5 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 5 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 5328 11264 500 sh3_zsrt139a10_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a10.mem 493 54 0 sh3_zsrt139a10_pal.mem 0x32ed74c4
+1 11671 10240 500 sh3_zsrt139a11_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a11.mem 1060 117 0 sh3_zsrt139a11_pal.mem 0x3cd88c98
+2 89548 9216 500 sh3_zsrt139a12_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a12.mem 1231 136 0 sh3_zsrt139a12_pal.mem 0x5dfce0a2
+3 89974 9216 500 sh3_zsrt139a13_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a13.mem 1231 136 1 sh3_zsrt139a13_pal.mem 0x5dfce0a2
+4 90400 9216 500 sh3_zsrt139a14_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a14.mem 1231 136 1 sh3_zsrt139a14_pal.mem 0x5dfce0a2

sim/data/top_psmct32_raster_demo/sh3_zsrt139a2_epochs.txt

@@ -0,0 +1,12 @@
+# Ch396 epoch descriptor table (6 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 6 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 5328 11264 500 sh3_zsrt139a20_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a20.mem 493 54 0 sh3_zsrt139a20_pal.mem 0x32ed74c4
+1 11671 10240 500 sh3_zsrt139a21_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a21.mem 1060 117 0 sh3_zsrt139a21_pal.mem 0x3cd88c98
+2 89164 9216 500 sh3_zsrt139a22_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a22.mem 1105 122 0 sh3_zsrt139a22_pal.mem 0x5dfce0a2
+3 89548 9216 500 sh3_zsrt139a23_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a23.mem 1231 136 1 sh3_zsrt139a23_pal.mem 0x5dfce0a2
+4 89974 9216 500 sh3_zsrt139a24_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a24.mem 1231 136 1 sh3_zsrt139a24_pal.mem 0x5dfce0a2
+5 90400 9216 500 sh3_zsrt139a25_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a25.mem 1231 136 1 sh3_zsrt139a25_pal.mem 0x5dfce0a2

sim/data/top_psmct32_raster_demo/sh3_zsrt139a3_epochs.txt

@@ -0,0 +1,9 @@
+# Ch397 epoch descriptor table (3 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 3 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 5328 11264 480 sh3_zsrt139a30_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a30.mem 493 54 0 sh3_zsrt139a30_pal.mem 0x32ed74c4
+1 11671 10240 484 sh3_zsrt139a31_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a31.mem 619 68 0 sh3_zsrt139a31_pal.mem 0x3cd88c98
+2 32391 13824 488 sh3_zsrt139a32_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a32.mem 97 10 0 sh3_zsrt139a32_pal.mem 0x566e7c38

sim/data/top_psmct32_raster_demo/sh3_zsrt139a4_epochs.txt

@@ -0,0 +1,11 @@
+# Ch398 epoch descriptor table (5 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 5 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 5328 11264 480 sh3_zsrt139a40_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a40.mem 493 54 0 sh3_zsrt139a40_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139a41_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a41.mem 619 68 0 sh3_zsrt139a41_pal.mem 0x3cd88c98
+2 31075 13824 480 sh3_zsrt139a42_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a42.mem 1231 136 0 sh3_zsrt139a42_pal.mem 0x566e7c38
+3 31820 13824 480 sh3_zsrt139a43_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a43.mem 862 95 1 sh3_zsrt139a43_pal.mem 0x566e7c38
+4 32391 13824 480 sh3_zsrt139a44_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a44.mem 709 78 1 sh3_zsrt139a44_pal.mem 0x566e7c38

sim/data/top_psmct32_raster_demo/sh3_zsrt139a5_epochs.txt

@@ -0,0 +1,22 @@
+# Ch399 epoch descriptor table (16 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 16 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 5328 11264 480 sh3_zsrt139a50_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a50.mem 493 54 0 sh3_zsrt139a50_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139a51_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a51.mem 619 68 0 sh3_zsrt139a51_pal.mem 0x3cd88c98
+2 31075 13824 480 sh3_zsrt139a52_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a52.mem 1474 163 0 sh3_zsrt139a52_pal.mem 0x566e7c38
+3 32131 13824 480 sh3_zsrt139a53_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a53.mem 1321 146 1 sh3_zsrt139a53_pal.mem 0x566e7c38
+4 33085 13824 480 sh3_zsrt139a54_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a54.mem 1843 204 1 sh3_zsrt139a54_pal.mem 0x566e7c38
+5 34387 13824 480 sh3_zsrt139a55_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a55.mem 1843 204 1 sh3_zsrt139a55_pal.mem 0x566e7c38
+6 35689 13824 480 sh3_zsrt139a56_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a56.mem 1843 204 1 sh3_zsrt139a56_pal.mem 0x566e7c38
+7 36991 13824 480 sh3_zsrt139a57_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a57.mem 1843 204 1 sh3_zsrt139a57_pal.mem 0x566e7c38
+8 38293 13824 480 sh3_zsrt139a58_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a58.mem 1843 204 1 sh3_zsrt139a58_pal.mem 0x566e7c38
+9 39520 13824 480 sh3_zsrt139a59_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a59.mem 1618 179 1 sh3_zsrt139a59_pal.mem 0x566e7c38
+10 40747 13824 480 sh3_zsrt139a510_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a510.mem 1843 204 1 sh3_zsrt139a510_pal.mem 0x566e7c38
+11 42049 13824 480 sh3_zsrt139a511_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a511.mem 1843 204 1 sh3_zsrt139a511_pal.mem 0x566e7c38
+12 43351 13824 480 sh3_zsrt139a512_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a512.mem 1843 204 1 sh3_zsrt139a512_pal.mem 0x566e7c38
+13 44653 13824 480 sh3_zsrt139a513_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a513.mem 1843 204 1 sh3_zsrt139a513_pal.mem 0x566e7c38
+14 45955 13824 480 sh3_zsrt139a514_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a514.mem 1843 204 1 sh3_zsrt139a514_pal.mem 0x566e7c38
+15 47089 13824 480 sh3_zsrt139a515_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a515.mem 115 12 1 sh3_zsrt139a515_pal.mem 0x566e7c38

sim/data/top_psmct32_raster_demo/sh3_zsrt139a6_epochs.txt

@@ -0,0 +1,26 @@
+# Ch400 epoch descriptor table (20 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 20 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 5328 11264 480 sh3_zsrt139a60_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a60.mem 493 54 0 sh3_zsrt139a60_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139a61_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a61.mem 1060 117 0 sh3_zsrt139a61_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139a62_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a62.mem 529 58 1 sh3_zsrt139a62_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139a63_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139a63.mem 781 86 0 sh3_zsrt139a63_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139a64_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a64.mem 1231 136 0 sh3_zsrt139a64_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139a65_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a65.mem 1231 136 1 sh3_zsrt139a65_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139a66_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a66.mem 763 84 1 sh3_zsrt139a66_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139a67_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a67.mem 1231 136 1 sh3_zsrt139a67_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139a68_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a68.mem 709 78 1 sh3_zsrt139a68_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139a69_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a69.mem 1231 136 1 sh3_zsrt139a69_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139a610_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a610.mem 1231 136 1 sh3_zsrt139a610_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139a611_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a611.mem 952 105 1 sh3_zsrt139a611_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139a612_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a612.mem 1231 136 1 sh3_zsrt139a612_pal.mem 0x5cbf8bb4
+13 21005 11264 480 sh3_zsrt139a613_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a613.mem 1096 121 1 sh3_zsrt139a613_pal.mem 0x5cbf8bb4
+14 21599 11264 480 sh3_zsrt139a614_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a614.mem 169 18 1 sh3_zsrt139a614_pal.mem 0x5cbf8bb4
+15 26066 11264 480 sh3_zsrt139a615_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a615.mem 61 6 0 sh3_zsrt139a615_pal.mem 0x44679578
+16 30859 10240 480 sh3_zsrt139a616_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a616.mem 619 68 0 sh3_zsrt139a616_pal.mem 0x47405cb0
+17 31075 13824 480 sh3_zsrt139a617_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a617.mem 1231 136 0 sh3_zsrt139a617_pal.mem 0x566e7c38
+18 31820 13824 480 sh3_zsrt139a618_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a618.mem 862 95 1 sh3_zsrt139a618_pal.mem 0x566e7c38
+19 32391 13824 480 sh3_zsrt139a619_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a619.mem 709 78 1 sh3_zsrt139a619_pal.mem 0x566e7c38

sim/data/top_psmct32_raster_demo/sh3_zsrt139a7_epochs.txt

@@ -0,0 +1,34 @@
+# Ch401 epoch descriptor table (28 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 28 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 5328 11264 480 sh3_zsrt139a70_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a70.mem 493 54 0 sh3_zsrt139a70_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139a71_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a71.mem 1060 117 0 sh3_zsrt139a71_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139a72_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a72.mem 529 58 1 sh3_zsrt139a72_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139a73_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139a73.mem 781 86 0 sh3_zsrt139a73_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139a74_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a74.mem 1231 136 0 sh3_zsrt139a74_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139a75_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a75.mem 1231 136 1 sh3_zsrt139a75_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139a76_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a76.mem 763 84 1 sh3_zsrt139a76_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139a77_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a77.mem 1231 136 1 sh3_zsrt139a77_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139a78_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a78.mem 709 78 1 sh3_zsrt139a78_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139a79_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a79.mem 1231 136 1 sh3_zsrt139a79_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139a710_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a710.mem 1231 136 1 sh3_zsrt139a710_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139a711_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a711.mem 952 105 1 sh3_zsrt139a711_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139a712_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a712.mem 1231 136 1 sh3_zsrt139a712_pal.mem 0x5cbf8bb4
+13 21005 11264 480 sh3_zsrt139a713_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a713.mem 1096 121 1 sh3_zsrt139a713_pal.mem 0x5cbf8bb4
+14 21599 11264 480 sh3_zsrt139a714_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a714.mem 169 18 1 sh3_zsrt139a714_pal.mem 0x5cbf8bb4
+15 26066 11264 480 sh3_zsrt139a715_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a715.mem 61 6 0 sh3_zsrt139a715_pal.mem 0x44679578
+16 30859 10240 480 sh3_zsrt139a716_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a716.mem 619 68 0 sh3_zsrt139a716_pal.mem 0x47405cb0
+17 31075 13824 480 sh3_zsrt139a717_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a717.mem 619 68 0 sh3_zsrt139a717_pal.mem 0x566e7c38
+18 77112 10240 480 sh3_zsrt139a718_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a718.mem 619 68 0 sh3_zsrt139a718_pal.mem 0x43ece1ae
+19 89164 9216 480 sh3_zsrt139a719_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a719.mem 619 68 0 sh3_zsrt139a719_pal.mem 0x5dfce0a2
+20 119471 8192 480 sh3_zsrt139a720_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a720.mem 1843 204 0 sh3_zsrt139a720_pal.mem 0x47097d4c
+21 120110 8192 480 sh3_zsrt139a721_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a721.mem 1843 204 1 sh3_zsrt139a721_pal.mem 0x47097d4c
+22 120749 8192 480 sh3_zsrt139a722_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a722.mem 1843 204 1 sh3_zsrt139a722_pal.mem 0x47097d4c
+23 121388 8192 480 sh3_zsrt139a723_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a723.mem 1843 204 1 sh3_zsrt139a723_pal.mem 0x47097d4c
+24 122027 8192 480 sh3_zsrt139a724_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a724.mem 1843 204 1 sh3_zsrt139a724_pal.mem 0x47097d4c
+25 129389 8192 480 sh3_zsrt139a725_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a725.mem 1843 204 1 sh3_zsrt139a725_pal.mem 0x47097d4c
+26 130241 8192 480 sh3_zsrt139a726_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a726.mem 1843 204 1 sh3_zsrt139a726_pal.mem 0x47097d4c
+27 130880 8192 480 sh3_zsrt139a727_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a727.mem 1843 204 1 sh3_zsrt139a727_pal.mem 0x47097d4c

sim/data/top_psmct32_raster_demo/sh3_zsrt139a8_epochs.txt

@@ -0,0 +1,46 @@
+# Ch402 epoch descriptor table (40 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 40 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 5328 11264 480 sh3_zsrt139a80_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a80.mem 494 54 0 sh3_zsrt139a80_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139a81_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a81.mem 1061 117 0 sh3_zsrt139a81_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139a82_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a82.mem 530 58 1 sh3_zsrt139a82_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139a83_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139a83.mem 782 86 0 sh3_zsrt139a83_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139a84_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a84.mem 1232 136 0 sh3_zsrt139a84_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139a85_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a85.mem 1232 136 1 sh3_zsrt139a85_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139a86_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a86.mem 764 84 1 sh3_zsrt139a86_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139a87_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a87.mem 1232 136 1 sh3_zsrt139a87_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139a88_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a88.mem 710 78 1 sh3_zsrt139a88_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139a89_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a89.mem 1232 136 1 sh3_zsrt139a89_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139a810_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a810.mem 1232 136 1 sh3_zsrt139a810_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139a811_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a811.mem 953 105 1 sh3_zsrt139a811_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139a812_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a812.mem 1232 136 1 sh3_zsrt139a812_pal.mem 0x5cbf8bb4
+13 21005 11264 480 sh3_zsrt139a813_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a813.mem 1097 121 1 sh3_zsrt139a813_pal.mem 0x5cbf8bb4
+14 21599 11264 480 sh3_zsrt139a814_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a814.mem 170 18 1 sh3_zsrt139a814_pal.mem 0x5cbf8bb4
+15 26066 11264 480 sh3_zsrt139a815_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a815.mem 62 6 0 sh3_zsrt139a815_pal.mem 0x44679578
+16 30859 10240 480 sh3_zsrt139a816_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a816.mem 620 68 0 sh3_zsrt139a816_pal.mem 0x47405cb0
+17 31075 13824 480 sh3_zsrt139a817_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a817.mem 620 68 0 sh3_zsrt139a817_pal.mem 0x566e7c38
+18 77112 10240 480 sh3_zsrt139a818_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a818.mem 620 68 0 sh3_zsrt139a818_pal.mem 0x43ece1ae
+19 89164 9216 480 sh3_zsrt139a819_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a819.mem 620 68 0 sh3_zsrt139a819_pal.mem 0x5dfce0a2
+20 119471 8192 480 sh3_zsrt139a820_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a820.mem 1844 204 0 sh3_zsrt139a820_pal.mem 0x47097d4c
+21 120110 8192 480 sh3_zsrt139a821_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a821.mem 1844 204 1 sh3_zsrt139a821_pal.mem 0x47097d4c
+22 120749 8192 480 sh3_zsrt139a822_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a822.mem 1844 204 1 sh3_zsrt139a822_pal.mem 0x47097d4c
+23 121388 8192 480 sh3_zsrt139a823_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a823.mem 1844 204 1 sh3_zsrt139a823_pal.mem 0x47097d4c
+24 122027 8192 480 sh3_zsrt139a824_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a824.mem 1844 204 1 sh3_zsrt139a824_pal.mem 0x47097d4c
+25 129389 8192 480 sh3_zsrt139a825_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a825.mem 1844 204 1 sh3_zsrt139a825_pal.mem 0x47097d4c
+26 130241 8192 480 sh3_zsrt139a826_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a826.mem 1844 204 1 sh3_zsrt139a826_pal.mem 0x47097d4c
+27 130880 8192 480 sh3_zsrt139a827_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a827.mem 1844 204 1 sh3_zsrt139a827_pal.mem 0x47097d4c
+28 146205 11264 480 sh3_zsrt139a828_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a828.mem 1142 126 0 sh3_zsrt139a828_pal.mem 0xfd978fd9
+29 146630 11264 480 sh3_zsrt139a829_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a829.mem 1178 130 1 sh3_zsrt139a829_pal.mem 0xfd978fd9
+30 147068 11264 480 sh3_zsrt139a830_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a830.mem 1106 122 1 sh3_zsrt139a830_pal.mem 0xfd978fd9
+31 147480 11264 480 sh3_zsrt139a831_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a831.mem 1070 118 0 sh3_zsrt139a831_pal.mem 0xd5ed05ff
+32 147888 11264 480 sh3_zsrt139a832_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a832.mem 998 110 1 sh3_zsrt139a832_pal.mem 0xd5ed05ff
+33 148264 11264 480 sh3_zsrt139a833_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a833.mem 1070 118 1 sh3_zsrt139a833_pal.mem 0xd5ed05ff
+34 148919 11264 480 sh3_zsrt139a834_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a834.mem 782 86 0 sh3_zsrt139a834_pal.mem 0xcdf8a4d8
+35 149214 11264 480 sh3_zsrt139a835_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a835.mem 782 86 1 sh3_zsrt139a835_pal.mem 0xcdf8a4d8
+36 149509 11264 480 sh3_zsrt139a836_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a836.mem 746 82 1 sh3_zsrt139a836_pal.mem 0xcdf8a4d8
+37 152021 11264 480 sh3_zsrt139a837_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a837.mem 1070 118 0 sh3_zsrt139a837_pal.mem 0xc6784386
+38 152420 11264 480 sh3_zsrt139a838_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a838.mem 1034 114 1 sh3_zsrt139a838_pal.mem 0xc6784386
+39 152806 11264 480 sh3_zsrt139a839_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a839.mem 1106 122 1 sh3_zsrt139a839_pal.mem 0xc6784386

sim/data/top_psmct32_raster_demo/sh3_zsrt139a9_epochs.txt

@@ -0,0 +1,46 @@
+# Ch403 epoch descriptor table (40 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 40 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 5328 11264 480 sh3_zsrt139a90_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a90.mem 494 54 0 sh3_zsrt139a90_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139a91_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a91.mem 1061 117 0 sh3_zsrt139a91_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139a92_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a92.mem 530 58 1 sh3_zsrt139a92_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139a93_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139a93.mem 782 86 0 sh3_zsrt139a93_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139a94_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a94.mem 1232 136 0 sh3_zsrt139a94_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139a95_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a95.mem 1232 136 1 sh3_zsrt139a95_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139a96_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a96.mem 764 84 1 sh3_zsrt139a96_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139a97_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a97.mem 1232 136 1 sh3_zsrt139a97_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139a98_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a98.mem 710 78 1 sh3_zsrt139a98_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139a99_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a99.mem 1232 136 1 sh3_zsrt139a99_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139a910_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a910.mem 1232 136 1 sh3_zsrt139a910_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139a911_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a911.mem 953 105 1 sh3_zsrt139a911_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139a912_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a912.mem 1232 136 1 sh3_zsrt139a912_pal.mem 0x5cbf8bb4
+13 21005 11264 480 sh3_zsrt139a913_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a913.mem 1097 121 1 sh3_zsrt139a913_pal.mem 0x5cbf8bb4
+14 21599 11264 480 sh3_zsrt139a914_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a914.mem 170 18 1 sh3_zsrt139a914_pal.mem 0x5cbf8bb4
+15 26066 11264 480 sh3_zsrt139a915_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a915.mem 62 6 0 sh3_zsrt139a915_pal.mem 0x44679578
+16 30859 10240 480 sh3_zsrt139a916_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a916.mem 620 68 0 sh3_zsrt139a916_pal.mem 0x47405cb0
+17 31075 13824 480 sh3_zsrt139a917_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a917.mem 620 68 0 sh3_zsrt139a917_pal.mem 0x566e7c38
+18 77112 10240 480 sh3_zsrt139a918_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a918.mem 620 68 0 sh3_zsrt139a918_pal.mem 0x43ece1ae
+19 89164 9216 480 sh3_zsrt139a919_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a919.mem 620 68 0 sh3_zsrt139a919_pal.mem 0x5dfce0a2
+20 119471 8192 480 sh3_zsrt139a920_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a920.mem 1844 204 0 sh3_zsrt139a920_pal.mem 0x47097d4c
+21 120110 8192 480 sh3_zsrt139a921_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a921.mem 1844 204 1 sh3_zsrt139a921_pal.mem 0x47097d4c
+22 120749 8192 480 sh3_zsrt139a922_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a922.mem 1844 204 1 sh3_zsrt139a922_pal.mem 0x47097d4c
+23 121388 8192 480 sh3_zsrt139a923_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a923.mem 1844 204 1 sh3_zsrt139a923_pal.mem 0x47097d4c
+24 122027 8192 480 sh3_zsrt139a924_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a924.mem 1844 204 1 sh3_zsrt139a924_pal.mem 0x47097d4c
+25 129389 8192 480 sh3_zsrt139a925_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a925.mem 1844 204 1 sh3_zsrt139a925_pal.mem 0x47097d4c
+26 130241 8192 480 sh3_zsrt139a926_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a926.mem 1844 204 1 sh3_zsrt139a926_pal.mem 0x47097d4c
+27 130880 8192 480 sh3_zsrt139a927_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a927.mem 1844 204 1 sh3_zsrt139a927_pal.mem 0x47097d4c
+28 146205 11264 480 sh3_zsrt139a928_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a928.mem 1142 126 0 sh3_zsrt139a928_pal.mem 0xfd978fd9
+29 146630 11264 480 sh3_zsrt139a929_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a929.mem 1178 130 1 sh3_zsrt139a929_pal.mem 0xfd978fd9
+30 147068 11264 480 sh3_zsrt139a930_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a930.mem 1106 122 1 sh3_zsrt139a930_pal.mem 0xfd978fd9
+31 147480 11264 480 sh3_zsrt139a931_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a931.mem 1070 118 0 sh3_zsrt139a931_pal.mem 0xd5ed05ff
+32 147888 11264 480 sh3_zsrt139a932_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a932.mem 998 110 1 sh3_zsrt139a932_pal.mem 0xd5ed05ff
+33 148264 11264 480 sh3_zsrt139a933_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a933.mem 1070 118 1 sh3_zsrt139a933_pal.mem 0xd5ed05ff
+34 148919 11264 480 sh3_zsrt139a934_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a934.mem 782 86 0 sh3_zsrt139a934_pal.mem 0xcdf8a4d8
+35 149214 11264 480 sh3_zsrt139a935_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a935.mem 782 86 1 sh3_zsrt139a935_pal.mem 0xcdf8a4d8
+36 149509 11264 480 sh3_zsrt139a936_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a936.mem 746 82 1 sh3_zsrt139a936_pal.mem 0xcdf8a4d8
+37 152021 11264 480 sh3_zsrt139a937_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a937.mem 1070 118 0 sh3_zsrt139a937_pal.mem 0xc6784386
+38 152420 11264 480 sh3_zsrt139a938_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a938.mem 1034 114 1 sh3_zsrt139a938_pal.mem 0xc6784386
+39 152806 11264 480 sh3_zsrt139a939_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a939.mem 1106 122 1 sh3_zsrt139a939_pal.mem 0xc6784386

sim/data/top_psmct32_raster_demo/sh3_zsrt139b1_epochs.txt

@@ -0,0 +1,41 @@
+# Ch404 epoch descriptor table (35 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 35 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 153218 11264 480 sh3_zsrt139b10_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b10.mem 1142 126 0 sh3_zsrt139b10_pal.mem 0xc6784386
+1 153643 11264 480 sh3_zsrt139b11_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b11.mem 1034 114 1 sh3_zsrt139b11_pal.mem 0xc6784386
+2 154029 11264 480 sh3_zsrt139b12_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b12.mem 1070 118 1 sh3_zsrt139b12_pal.mem 0xc6784386
+3 154428 11264 480 sh3_zsrt139b13_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b13.mem 1142 126 1 sh3_zsrt139b13_pal.mem 0xc6784386
+4 154853 11264 480 sh3_zsrt139b14_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b14.mem 1106 122 1 sh3_zsrt139b14_pal.mem 0xc6784386
+5 155265 11264 480 sh3_zsrt139b15_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b15.mem 1070 118 1 sh3_zsrt139b15_pal.mem 0xc6784386
+6 155664 11264 480 sh3_zsrt139b16_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b16.mem 1070 118 1 sh3_zsrt139b16_pal.mem 0xc6784386
+7 156063 11264 480 sh3_zsrt139b17_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b17.mem 1358 150 1 sh3_zsrt139b17_pal.mem 0xc6784386
+8 156566 10240 480 sh3_zsrt139b18_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b18.mem 998 110 0 sh3_zsrt139b18_pal.mem 0x00fd9028
+9 156939 10240 480 sh3_zsrt139b19_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b19.mem 890 98 1 sh3_zsrt139b19_pal.mem 0x00fd9028
+10 157273 10240 480 sh3_zsrt139b110_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b110.mem 890 98 1 sh3_zsrt139b110_pal.mem 0x00fd9028
+11 157607 10240 480 sh3_zsrt139b111_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b111.mem 962 106 1 sh3_zsrt139b111_pal.mem 0x00fd9028
+12 157967 10240 480 sh3_zsrt139b112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b112.mem 926 102 1 sh3_zsrt139b112_pal.mem 0x00fd9028
+13 158314 10240 480 sh3_zsrt139b113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b113.mem 962 106 1 sh3_zsrt139b113_pal.mem 0x00fd9028
+14 158674 10240 480 sh3_zsrt139b114_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b114.mem 962 106 1 sh3_zsrt139b114_pal.mem 0x00fd9028
+15 159034 10240 480 sh3_zsrt139b115_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b115.mem 1034 114 1 sh3_zsrt139b115_pal.mem 0x00fd9028
+16 159420 10240 480 sh3_zsrt139b116_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b116.mem 890 98 1 sh3_zsrt139b116_pal.mem 0x00fd9028
+17 159754 10240 480 sh3_zsrt139b117_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b117.mem 962 106 1 sh3_zsrt139b117_pal.mem 0x00fd9028
+18 160114 10240 480 sh3_zsrt139b118_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b118.mem 566 62 1 sh3_zsrt139b118_pal.mem 0x00fd9028
+19 160331 10240 480 sh3_zsrt139b119_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b119.mem 1178 130 0 sh3_zsrt139b119_pal.mem 0xd8d19684
+20 160769 10240 480 sh3_zsrt139b120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b120.mem 1070 118 1 sh3_zsrt139b120_pal.mem 0xd8d19684
+21 161168 10240 480 sh3_zsrt139b121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b121.mem 1070 118 1 sh3_zsrt139b121_pal.mem 0xd8d19684
+22 161567 10240 480 sh3_zsrt139b122_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b122.mem 1250 138 1 sh3_zsrt139b122_pal.mem 0xd8d19684
+23 162031 10240 480 sh3_zsrt139b123_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b123.mem 710 78 1 sh3_zsrt139b123_pal.mem 0xd8d19684
+24 162300 10240 480 sh3_zsrt139b124_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b124.mem 1142 126 1 sh3_zsrt139b124_pal.mem 0xd8d19684
+25 162725 10240 480 sh3_zsrt139b125_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b125.mem 1178 130 1 sh3_zsrt139b125_pal.mem 0xd8d19684
+26 163163 10240 480 sh3_zsrt139b126_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b126.mem 1106 122 1 sh3_zsrt139b126_pal.mem 0xd8d19684
+27 163575 10240 480 sh3_zsrt139b127_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b127.mem 1142 126 1 sh3_zsrt139b127_pal.mem 0xd8d19684
+28 164000 10240 480 sh3_zsrt139b128_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b128.mem 530 58 1 sh3_zsrt139b128_pal.mem 0xd8d19684
+29 164204 10240 480 sh3_zsrt139b129_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b129.mem 1322 146 0 sh3_zsrt139b129_pal.mem 0xaa4e7e05
+30 164694 10240 480 sh3_zsrt139b130_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b130.mem 674 74 1 sh3_zsrt139b130_pal.mem 0xaa4e7e05
+31 164950 10240 480 sh3_zsrt139b131_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b131.mem 602 66 1 sh3_zsrt139b131_pal.mem 0xaa4e7e05
+32 165180 10240 480 sh3_zsrt139b132_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b132.mem 458 50 1 sh3_zsrt139b132_pal.mem 0xaa4e7e05
+33 175995 12288 480 sh3_zsrt139b133_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139b133.mem 1214 134 0 sh3_zsrt139b133_pal.mem 0x56ebf1d1
+34 176446 12288 480 sh3_zsrt139b134_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139b134.mem 1376 152 1 sh3_zsrt139b134_pal.mem 0x56ebf1d1

sim/data/top_psmct32_raster_demo/sh3_zsrt139b2_epochs.txt

@@ -0,0 +1,78 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139a9', 'zsrt139b1']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 75 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 5328 11264 480 sh3_zsrt139b20_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139b20.mem 494 54 0 sh3_zsrt139b20_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139b21_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139b21.mem 1061 117 0 sh3_zsrt139b21_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139b22_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139b22.mem 530 58 1 sh3_zsrt139b22_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139b23_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139b23.mem 782 86 0 sh3_zsrt139b23_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139b24_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b24.mem 1232 136 0 sh3_zsrt139b24_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139b25_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b25.mem 1232 136 1 sh3_zsrt139b25_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139b26_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b26.mem 764 84 1 sh3_zsrt139b26_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139b27_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b27.mem 1232 136 1 sh3_zsrt139b27_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139b28_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b28.mem 710 78 1 sh3_zsrt139b28_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139b29_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b29.mem 1232 136 1 sh3_zsrt139b29_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139b210_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b210.mem 1232 136 1 sh3_zsrt139b210_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139b211_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b211.mem 953 105 1 sh3_zsrt139b211_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139b212_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b212.mem 1232 136 1 sh3_zsrt139b212_pal.mem 0x5cbf8bb4
+13 21005 11264 480 sh3_zsrt139b213_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b213.mem 1097 121 1 sh3_zsrt139b213_pal.mem 0x5cbf8bb4
+14 21599 11264 480 sh3_zsrt139b214_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b214.mem 170 18 1 sh3_zsrt139b214_pal.mem 0x5cbf8bb4
+15 26066 11264 480 sh3_zsrt139b215_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139b215.mem 62 6 0 sh3_zsrt139b215_pal.mem 0x44679578
+16 30859 10240 480 sh3_zsrt139b216_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139b216.mem 620 68 0 sh3_zsrt139b216_pal.mem 0x47405cb0
+17 31075 13824 480 sh3_zsrt139b217_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139b217.mem 620 68 0 sh3_zsrt139b217_pal.mem 0x566e7c38
+18 77112 10240 480 sh3_zsrt139b218_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139b218.mem 620 68 0 sh3_zsrt139b218_pal.mem 0x43ece1ae
+19 89164 9216 480 sh3_zsrt139b219_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139b219.mem 620 68 0 sh3_zsrt139b219_pal.mem 0x5dfce0a2
+20 119471 8192 480 sh3_zsrt139b220_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b220.mem 1844 204 0 sh3_zsrt139b220_pal.mem 0x47097d4c
+21 120110 8192 480 sh3_zsrt139b221_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b221.mem 1844 204 1 sh3_zsrt139b221_pal.mem 0x47097d4c
+22 120749 8192 480 sh3_zsrt139b222_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b222.mem 1844 204 1 sh3_zsrt139b222_pal.mem 0x47097d4c
+23 121388 8192 480 sh3_zsrt139b223_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b223.mem 1844 204 1 sh3_zsrt139b223_pal.mem 0x47097d4c
+24 122027 8192 480 sh3_zsrt139b224_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b224.mem 1844 204 1 sh3_zsrt139b224_pal.mem 0x47097d4c
+25 129389 8192 480 sh3_zsrt139b225_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b225.mem 1844 204 1 sh3_zsrt139b225_pal.mem 0x47097d4c
+26 130241 8192 480 sh3_zsrt139b226_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b226.mem 1844 204 1 sh3_zsrt139b226_pal.mem 0x47097d4c
+27 130880 8192 480 sh3_zsrt139b227_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139b227.mem 1844 204 1 sh3_zsrt139b227_pal.mem 0x47097d4c
+28 146205 11264 480 sh3_zsrt139b228_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b228.mem 1142 126 0 sh3_zsrt139b228_pal.mem 0xfd978fd9
+29 146630 11264 480 sh3_zsrt139b229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b229.mem 1178 130 1 sh3_zsrt139b229_pal.mem 0xfd978fd9
+30 147068 11264 480 sh3_zsrt139b230_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b230.mem 1106 122 1 sh3_zsrt139b230_pal.mem 0xfd978fd9
+31 147480 11264 480 sh3_zsrt139b231_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b231.mem 1070 118 0 sh3_zsrt139b231_pal.mem 0xd5ed05ff
+32 147888 11264 480 sh3_zsrt139b232_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b232.mem 998 110 1 sh3_zsrt139b232_pal.mem 0xd5ed05ff
+33 148264 11264 480 sh3_zsrt139b233_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b233.mem 1070 118 1 sh3_zsrt139b233_pal.mem 0xd5ed05ff
+34 148919 11264 480 sh3_zsrt139b234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b234.mem 782 86 0 sh3_zsrt139b234_pal.mem 0xcdf8a4d8
+35 149214 11264 480 sh3_zsrt139b235_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b235.mem 782 86 1 sh3_zsrt139b235_pal.mem 0xcdf8a4d8
+36 149509 11264 480 sh3_zsrt139b236_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b236.mem 746 82 1 sh3_zsrt139b236_pal.mem 0xcdf8a4d8
+37 152021 11264 480 sh3_zsrt139b237_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b237.mem 1070 118 0 sh3_zsrt139b237_pal.mem 0xc6784386
+38 152420 11264 480 sh3_zsrt139b238_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b238.mem 1034 114 1 sh3_zsrt139b238_pal.mem 0xc6784386
+39 152806 11264 480 sh3_zsrt139b239_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b239.mem 1106 122 1 sh3_zsrt139b239_pal.mem 0xc6784386
+40 153218 11264 480 sh3_zsrt139b240_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b240.mem 1142 126 0 sh3_zsrt139b240_pal.mem 0xc6784386
+41 153643 11264 480 sh3_zsrt139b241_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b241.mem 1034 114 1 sh3_zsrt139b241_pal.mem 0xc6784386
+42 154029 11264 480 sh3_zsrt139b242_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b242.mem 1070 118 1 sh3_zsrt139b242_pal.mem 0xc6784386
+43 154428 11264 480 sh3_zsrt139b243_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b243.mem 1142 126 1 sh3_zsrt139b243_pal.mem 0xc6784386
+44 154853 11264 480 sh3_zsrt139b244_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b244.mem 1106 122 1 sh3_zsrt139b244_pal.mem 0xc6784386
+45 155265 11264 480 sh3_zsrt139b245_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b245.mem 1070 118 1 sh3_zsrt139b245_pal.mem 0xc6784386
+46 155664 11264 480 sh3_zsrt139b246_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b246.mem 1070 118 1 sh3_zsrt139b246_pal.mem 0xc6784386
+47 156063 11264 480 sh3_zsrt139b247_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139b247.mem 1358 150 1 sh3_zsrt139b247_pal.mem 0xc6784386
+48 156566 10240 480 sh3_zsrt139b248_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b248.mem 998 110 0 sh3_zsrt139b248_pal.mem 0x00fd9028
+49 156939 10240 480 sh3_zsrt139b249_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b249.mem 890 98 1 sh3_zsrt139b249_pal.mem 0x00fd9028
+50 157273 10240 480 sh3_zsrt139b250_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b250.mem 890 98 1 sh3_zsrt139b250_pal.mem 0x00fd9028
+51 157607 10240 480 sh3_zsrt139b251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b251.mem 962 106 1 sh3_zsrt139b251_pal.mem 0x00fd9028
+52 157967 10240 480 sh3_zsrt139b252_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b252.mem 926 102 1 sh3_zsrt139b252_pal.mem 0x00fd9028
+53 158314 10240 480 sh3_zsrt139b253_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b253.mem 962 106 1 sh3_zsrt139b253_pal.mem 0x00fd9028
+54 158674 10240 480 sh3_zsrt139b254_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b254.mem 962 106 1 sh3_zsrt139b254_pal.mem 0x00fd9028
+55 159034 10240 480 sh3_zsrt139b255_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b255.mem 1034 114 1 sh3_zsrt139b255_pal.mem 0x00fd9028
+56 159420 10240 480 sh3_zsrt139b256_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b256.mem 890 98 1 sh3_zsrt139b256_pal.mem 0x00fd9028
+57 159754 10240 480 sh3_zsrt139b257_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b257.mem 962 106 1 sh3_zsrt139b257_pal.mem 0x00fd9028
+58 160114 10240 480 sh3_zsrt139b258_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b258.mem 566 62 1 sh3_zsrt139b258_pal.mem 0x00fd9028
+59 160331 10240 480 sh3_zsrt139b259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b259.mem 1178 130 0 sh3_zsrt139b259_pal.mem 0xd8d19684
+60 160769 10240 480 sh3_zsrt139b260_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b260.mem 1070 118 1 sh3_zsrt139b260_pal.mem 0xd8d19684
+61 161168 10240 480 sh3_zsrt139b261_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b261.mem 1070 118 1 sh3_zsrt139b261_pal.mem 0xd8d19684
+62 161567 10240 480 sh3_zsrt139b262_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b262.mem 1250 138 1 sh3_zsrt139b262_pal.mem 0xd8d19684
+63 162031 10240 480 sh3_zsrt139b263_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b263.mem 710 78 1 sh3_zsrt139b263_pal.mem 0xd8d19684
+64 162300 10240 480 sh3_zsrt139b264_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b264.mem 1142 126 1 sh3_zsrt139b264_pal.mem 0xd8d19684
+65 162725 10240 480 sh3_zsrt139b265_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b265.mem 1178 130 1 sh3_zsrt139b265_pal.mem 0xd8d19684
+66 163163 10240 480 sh3_zsrt139b266_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b266.mem 1106 122 1 sh3_zsrt139b266_pal.mem 0xd8d19684
+67 163575 10240 480 sh3_zsrt139b267_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b267.mem 1142 126 1 sh3_zsrt139b267_pal.mem 0xd8d19684
+68 164000 10240 480 sh3_zsrt139b268_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b268.mem 530 58 1 sh3_zsrt139b268_pal.mem 0xd8d19684
+69 164204 10240 480 sh3_zsrt139b269_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b269.mem 1322 146 0 sh3_zsrt139b269_pal.mem 0xaa4e7e05
+70 164694 10240 480 sh3_zsrt139b270_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b270.mem 674 74 1 sh3_zsrt139b270_pal.mem 0xaa4e7e05
+71 164950 10240 480 sh3_zsrt139b271_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b271.mem 602 66 1 sh3_zsrt139b271_pal.mem 0xaa4e7e05
+72 165180 10240 480 sh3_zsrt139b272_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139b272.mem 458 50 1 sh3_zsrt139b272_pal.mem 0xaa4e7e05
+73 175995 12288 480 sh3_zsrt139b273_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139b273.mem 1214 134 0 sh3_zsrt139b273_pal.mem 0x56ebf1d1
+74 176446 12288 480 sh3_zsrt139b274_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139b274.mem 1376 152 1 sh3_zsrt139b274_pal.mem 0x56ebf1d1

sim/data/top_psmct32_raster_demo/sh3_zsrt139c1_epochs.txt

@@ -0,0 +1,9 @@
+# Ch405 epoch descriptor table (3 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 3 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 196494 10240 480 sh3_zsrt139c10_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c10.mem 656 72 0 sh3_zsrt139c10_pal.mem 0x158afe76
+1 196868 10240 480 sh3_zsrt139c11_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c11.mem 656 72 1 sh3_zsrt139c11_pal.mem 0x158afe76
+2 197327 10240 480 sh3_zsrt139c12_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c12.mem 620 68 1 sh3_zsrt139c12_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139c2_epochs.txt

@@ -0,0 +1,81 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139a9', 'zsrt139b1', 'zsrt139c1']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 78 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 5328 11264 480 sh3_zsrt139c20_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139c20.mem 494 54 0 sh3_zsrt139c20_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139c21_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139c21.mem 1061 117 0 sh3_zsrt139c21_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139c22_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139c22.mem 530 58 1 sh3_zsrt139c22_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139c23_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139c23.mem 782 86 0 sh3_zsrt139c23_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139c24_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c24.mem 1232 136 0 sh3_zsrt139c24_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139c25_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c25.mem 1232 136 1 sh3_zsrt139c25_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139c26_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c26.mem 764 84 1 sh3_zsrt139c26_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139c27_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c27.mem 1232 136 1 sh3_zsrt139c27_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139c28_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c28.mem 710 78 1 sh3_zsrt139c28_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139c29_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c29.mem 1232 136 1 sh3_zsrt139c29_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139c210_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c210.mem 1232 136 1 sh3_zsrt139c210_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139c211_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c211.mem 953 105 1 sh3_zsrt139c211_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139c212_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c212.mem 1232 136 1 sh3_zsrt139c212_pal.mem 0x5cbf8bb4
+13 21005 11264 480 sh3_zsrt139c213_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c213.mem 1097 121 1 sh3_zsrt139c213_pal.mem 0x5cbf8bb4
+14 21599 11264 480 sh3_zsrt139c214_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c214.mem 170 18 1 sh3_zsrt139c214_pal.mem 0x5cbf8bb4
+15 26066 11264 480 sh3_zsrt139c215_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c215.mem 62 6 0 sh3_zsrt139c215_pal.mem 0x44679578
+16 30859 10240 480 sh3_zsrt139c216_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139c216.mem 620 68 0 sh3_zsrt139c216_pal.mem 0x47405cb0
+17 31075 13824 480 sh3_zsrt139c217_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139c217.mem 620 68 0 sh3_zsrt139c217_pal.mem 0x566e7c38
+18 77112 10240 480 sh3_zsrt139c218_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139c218.mem 620 68 0 sh3_zsrt139c218_pal.mem 0x43ece1ae
+19 89164 9216 480 sh3_zsrt139c219_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139c219.mem 620 68 0 sh3_zsrt139c219_pal.mem 0x5dfce0a2
+20 119471 8192 480 sh3_zsrt139c220_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c220.mem 1844 204 0 sh3_zsrt139c220_pal.mem 0x47097d4c
+21 120110 8192 480 sh3_zsrt139c221_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c221.mem 1844 204 1 sh3_zsrt139c221_pal.mem 0x47097d4c
+22 120749 8192 480 sh3_zsrt139c222_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c222.mem 1844 204 1 sh3_zsrt139c222_pal.mem 0x47097d4c
+23 121388 8192 480 sh3_zsrt139c223_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c223.mem 1844 204 1 sh3_zsrt139c223_pal.mem 0x47097d4c
+24 122027 8192 480 sh3_zsrt139c224_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c224.mem 1844 204 1 sh3_zsrt139c224_pal.mem 0x47097d4c
+25 129389 8192 480 sh3_zsrt139c225_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c225.mem 1844 204 1 sh3_zsrt139c225_pal.mem 0x47097d4c
+26 130241 8192 480 sh3_zsrt139c226_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c226.mem 1844 204 1 sh3_zsrt139c226_pal.mem 0x47097d4c
+27 130880 8192 480 sh3_zsrt139c227_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c227.mem 1844 204 1 sh3_zsrt139c227_pal.mem 0x47097d4c
+28 146205 11264 480 sh3_zsrt139c228_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c228.mem 1142 126 0 sh3_zsrt139c228_pal.mem 0xfd978fd9
+29 146630 11264 480 sh3_zsrt139c229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c229.mem 1178 130 1 sh3_zsrt139c229_pal.mem 0xfd978fd9
+30 147068 11264 480 sh3_zsrt139c230_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c230.mem 1106 122 1 sh3_zsrt139c230_pal.mem 0xfd978fd9
+31 147480 11264 480 sh3_zsrt139c231_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c231.mem 1070 118 0 sh3_zsrt139c231_pal.mem 0xd5ed05ff
+32 147888 11264 480 sh3_zsrt139c232_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c232.mem 998 110 1 sh3_zsrt139c232_pal.mem 0xd5ed05ff
+33 148264 11264 480 sh3_zsrt139c233_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c233.mem 1070 118 1 sh3_zsrt139c233_pal.mem 0xd5ed05ff
+34 148919 11264 480 sh3_zsrt139c234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c234.mem 782 86 0 sh3_zsrt139c234_pal.mem 0xcdf8a4d8
+35 149214 11264 480 sh3_zsrt139c235_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c235.mem 782 86 1 sh3_zsrt139c235_pal.mem 0xcdf8a4d8
+36 149509 11264 480 sh3_zsrt139c236_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c236.mem 746 82 1 sh3_zsrt139c236_pal.mem 0xcdf8a4d8
+37 152021 11264 480 sh3_zsrt139c237_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c237.mem 1070 118 0 sh3_zsrt139c237_pal.mem 0xc6784386
+38 152420 11264 480 sh3_zsrt139c238_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c238.mem 1034 114 1 sh3_zsrt139c238_pal.mem 0xc6784386
+39 152806 11264 480 sh3_zsrt139c239_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c239.mem 1106 122 1 sh3_zsrt139c239_pal.mem 0xc6784386
+40 153218 11264 480 sh3_zsrt139c240_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c240.mem 1142 126 0 sh3_zsrt139c240_pal.mem 0xc6784386
+41 153643 11264 480 sh3_zsrt139c241_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c241.mem 1034 114 1 sh3_zsrt139c241_pal.mem 0xc6784386
+42 154029 11264 480 sh3_zsrt139c242_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c242.mem 1070 118 1 sh3_zsrt139c242_pal.mem 0xc6784386
+43 154428 11264 480 sh3_zsrt139c243_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c243.mem 1142 126 1 sh3_zsrt139c243_pal.mem 0xc6784386
+44 154853 11264 480 sh3_zsrt139c244_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c244.mem 1106 122 1 sh3_zsrt139c244_pal.mem 0xc6784386
+45 155265 11264 480 sh3_zsrt139c245_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c245.mem 1070 118 1 sh3_zsrt139c245_pal.mem 0xc6784386
+46 155664 11264 480 sh3_zsrt139c246_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c246.mem 1070 118 1 sh3_zsrt139c246_pal.mem 0xc6784386
+47 156063 11264 480 sh3_zsrt139c247_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c247.mem 1358 150 1 sh3_zsrt139c247_pal.mem 0xc6784386
+48 156566 10240 480 sh3_zsrt139c248_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c248.mem 998 110 0 sh3_zsrt139c248_pal.mem 0x00fd9028
+49 156939 10240 480 sh3_zsrt139c249_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c249.mem 890 98 1 sh3_zsrt139c249_pal.mem 0x00fd9028
+50 157273 10240 480 sh3_zsrt139c250_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c250.mem 890 98 1 sh3_zsrt139c250_pal.mem 0x00fd9028
+51 157607 10240 480 sh3_zsrt139c251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c251.mem 962 106 1 sh3_zsrt139c251_pal.mem 0x00fd9028
+52 157967 10240 480 sh3_zsrt139c252_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c252.mem 926 102 1 sh3_zsrt139c252_pal.mem 0x00fd9028
+53 158314 10240 480 sh3_zsrt139c253_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c253.mem 962 106 1 sh3_zsrt139c253_pal.mem 0x00fd9028
+54 158674 10240 480 sh3_zsrt139c254_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c254.mem 962 106 1 sh3_zsrt139c254_pal.mem 0x00fd9028
+55 159034 10240 480 sh3_zsrt139c255_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c255.mem 1034 114 1 sh3_zsrt139c255_pal.mem 0x00fd9028
+56 159420 10240 480 sh3_zsrt139c256_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c256.mem 890 98 1 sh3_zsrt139c256_pal.mem 0x00fd9028
+57 159754 10240 480 sh3_zsrt139c257_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c257.mem 962 106 1 sh3_zsrt139c257_pal.mem 0x00fd9028
+58 160114 10240 480 sh3_zsrt139c258_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c258.mem 566 62 1 sh3_zsrt139c258_pal.mem 0x00fd9028
+59 160331 10240 480 sh3_zsrt139c259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c259.mem 1178 130 0 sh3_zsrt139c259_pal.mem 0xd8d19684
+60 160769 10240 480 sh3_zsrt139c260_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c260.mem 1070 118 1 sh3_zsrt139c260_pal.mem 0xd8d19684
+61 161168 10240 480 sh3_zsrt139c261_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c261.mem 1070 118 1 sh3_zsrt139c261_pal.mem 0xd8d19684
+62 161567 10240 480 sh3_zsrt139c262_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c262.mem 1250 138 1 sh3_zsrt139c262_pal.mem 0xd8d19684
+63 162031 10240 480 sh3_zsrt139c263_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c263.mem 710 78 1 sh3_zsrt139c263_pal.mem 0xd8d19684
+64 162300 10240 480 sh3_zsrt139c264_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c264.mem 1142 126 1 sh3_zsrt139c264_pal.mem 0xd8d19684
+65 162725 10240 480 sh3_zsrt139c265_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c265.mem 1178 130 1 sh3_zsrt139c265_pal.mem 0xd8d19684
+66 163163 10240 480 sh3_zsrt139c266_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c266.mem 1106 122 1 sh3_zsrt139c266_pal.mem 0xd8d19684
+67 163575 10240 480 sh3_zsrt139c267_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c267.mem 1142 126 1 sh3_zsrt139c267_pal.mem 0xd8d19684
+68 164000 10240 480 sh3_zsrt139c268_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c268.mem 530 58 1 sh3_zsrt139c268_pal.mem 0xd8d19684
+69 164204 10240 480 sh3_zsrt139c269_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c269.mem 1322 146 0 sh3_zsrt139c269_pal.mem 0xaa4e7e05
+70 164694 10240 480 sh3_zsrt139c270_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c270.mem 674 74 1 sh3_zsrt139c270_pal.mem 0xaa4e7e05
+71 164950 10240 480 sh3_zsrt139c271_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c271.mem 602 66 1 sh3_zsrt139c271_pal.mem 0xaa4e7e05
+72 165180 10240 480 sh3_zsrt139c272_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c272.mem 458 50 1 sh3_zsrt139c272_pal.mem 0xaa4e7e05
+73 175995 12288 480 sh3_zsrt139c273_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139c273.mem 1214 134 0 sh3_zsrt139c273_pal.mem 0x56ebf1d1
+74 176446 12288 480 sh3_zsrt139c274_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139c274.mem 1376 152 1 sh3_zsrt139c274_pal.mem 0x56ebf1d1
+75 196494 10240 480 sh3_zsrt139c275_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c275.mem 656 72 0 sh3_zsrt139c275_pal.mem 0x158afe76
+76 196868 10240 480 sh3_zsrt139c276_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c276.mem 656 72 1 sh3_zsrt139c276_pal.mem 0x158afe76
+77 197327 10240 480 sh3_zsrt139c277_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c277.mem 620 68 1 sh3_zsrt139c277_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139c3_epochs.txt

@@ -0,0 +1,218 @@
+# Ch405 epoch descriptor table (212 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 212 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 196494 10240 480 sh3_zsrt139c30_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c30.mem 17 1 0 sh3_zsrt139c30_pal.mem 0x158afe76
+1 196494 10240 480 sh3_zsrt139c31_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c31.mem 17 1 1 sh3_zsrt139c31_pal.mem 0x158afe76
+2 196494 10240 480 sh3_zsrt139c32_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c32.mem 17 1 1 sh3_zsrt139c32_pal.mem 0x158afe76
+3 196494 10240 480 sh3_zsrt139c33_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c33.mem 17 1 1 sh3_zsrt139c33_pal.mem 0x158afe76
+4 196494 10240 480 sh3_zsrt139c34_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c34.mem 17 1 1 sh3_zsrt139c34_pal.mem 0x158afe76
+5 196494 10240 480 sh3_zsrt139c35_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c35.mem 17 1 1 sh3_zsrt139c35_pal.mem 0x158afe76
+6 196494 10240 480 sh3_zsrt139c36_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c36.mem 17 1 1 sh3_zsrt139c36_pal.mem 0x158afe76
+7 196494 10240 480 sh3_zsrt139c37_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c37.mem 17 1 1 sh3_zsrt139c37_pal.mem 0x158afe76
+8 196494 10240 480 sh3_zsrt139c38_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c38.mem 17 1 1 sh3_zsrt139c38_pal.mem 0x158afe76
+9 196494 10240 480 sh3_zsrt139c39_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c39.mem 17 1 1 sh3_zsrt139c39_pal.mem 0x158afe76
+10 196494 10240 480 sh3_zsrt139c310_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c310.mem 17 1 1 sh3_zsrt139c310_pal.mem 0x158afe76
+11 196494 10240 480 sh3_zsrt139c311_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c311.mem 17 1 1 sh3_zsrt139c311_pal.mem 0x158afe76
+12 196494 10240 480 sh3_zsrt139c312_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c312.mem 17 1 1 sh3_zsrt139c312_pal.mem 0x158afe76
+13 196494 10240 480 sh3_zsrt139c313_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c313.mem 17 1 1 sh3_zsrt139c313_pal.mem 0x158afe76
+14 196494 10240 480 sh3_zsrt139c314_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c314.mem 17 1 1 sh3_zsrt139c314_pal.mem 0x158afe76
+15 196494 10240 480 sh3_zsrt139c315_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c315.mem 17 1 1 sh3_zsrt139c315_pal.mem 0x158afe76
+16 196494 10240 480 sh3_zsrt139c316_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c316.mem 17 1 1 sh3_zsrt139c316_pal.mem 0x158afe76
+17 196494 10240 480 sh3_zsrt139c317_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c317.mem 17 1 1 sh3_zsrt139c317_pal.mem 0x158afe76
+18 196494 10240 480 sh3_zsrt139c318_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c318.mem 17 1 1 sh3_zsrt139c318_pal.mem 0x158afe76
+19 196494 10240 480 sh3_zsrt139c319_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c319.mem 17 1 1 sh3_zsrt139c319_pal.mem 0x158afe76
+20 196494 10240 480 sh3_zsrt139c320_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c320.mem 17 1 1 sh3_zsrt139c320_pal.mem 0x158afe76
+21 196494 10240 480 sh3_zsrt139c321_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c321.mem 17 1 1 sh3_zsrt139c321_pal.mem 0x158afe76
+22 196494 10240 480 sh3_zsrt139c322_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c322.mem 17 1 1 sh3_zsrt139c322_pal.mem 0x158afe76
+23 196494 10240 480 sh3_zsrt139c323_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c323.mem 17 1 1 sh3_zsrt139c323_pal.mem 0x158afe76
+24 196494 10240 480 sh3_zsrt139c324_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c324.mem 17 1 1 sh3_zsrt139c324_pal.mem 0x158afe76
+25 196494 10240 480 sh3_zsrt139c325_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c325.mem 17 1 1 sh3_zsrt139c325_pal.mem 0x158afe76
+26 196494 10240 480 sh3_zsrt139c326_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c326.mem 17 1 1 sh3_zsrt139c326_pal.mem 0x158afe76
+27 196494 10240 480 sh3_zsrt139c327_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c327.mem 17 1 1 sh3_zsrt139c327_pal.mem 0x158afe76
+28 196494 10240 480 sh3_zsrt139c328_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c328.mem 17 1 1 sh3_zsrt139c328_pal.mem 0x158afe76
+29 196494 10240 480 sh3_zsrt139c329_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c329.mem 17 1 1 sh3_zsrt139c329_pal.mem 0x158afe76
+30 196494 10240 480 sh3_zsrt139c330_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c330.mem 17 1 1 sh3_zsrt139c330_pal.mem 0x158afe76
+31 196494 10240 480 sh3_zsrt139c331_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c331.mem 17 1 1 sh3_zsrt139c331_pal.mem 0x158afe76
+32 196494 10240 480 sh3_zsrt139c332_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c332.mem 17 1 1 sh3_zsrt139c332_pal.mem 0x158afe76
+33 196494 10240 480 sh3_zsrt139c333_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c333.mem 17 1 1 sh3_zsrt139c333_pal.mem 0x158afe76
+34 196494 10240 480 sh3_zsrt139c334_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c334.mem 17 1 1 sh3_zsrt139c334_pal.mem 0x158afe76
+35 196494 10240 480 sh3_zsrt139c335_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c335.mem 17 1 1 sh3_zsrt139c335_pal.mem 0x158afe76
+36 196494 10240 480 sh3_zsrt139c336_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c336.mem 17 1 1 sh3_zsrt139c336_pal.mem 0x158afe76
+37 196494 10240 480 sh3_zsrt139c337_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c337.mem 17 1 1 sh3_zsrt139c337_pal.mem 0x158afe76
+38 196494 10240 480 sh3_zsrt139c338_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c338.mem 17 1 1 sh3_zsrt139c338_pal.mem 0x158afe76
+39 196494 10240 480 sh3_zsrt139c339_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c339.mem 17 1 1 sh3_zsrt139c339_pal.mem 0x158afe76
+40 196494 10240 480 sh3_zsrt139c340_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c340.mem 17 1 1 sh3_zsrt139c340_pal.mem 0x158afe76
+41 196494 10240 480 sh3_zsrt139c341_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c341.mem 17 1 1 sh3_zsrt139c341_pal.mem 0x158afe76
+42 196494 10240 480 sh3_zsrt139c342_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c342.mem 17 1 1 sh3_zsrt139c342_pal.mem 0x158afe76
+43 196494 10240 480 sh3_zsrt139c343_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c343.mem 17 1 1 sh3_zsrt139c343_pal.mem 0x158afe76
+44 196494 10240 480 sh3_zsrt139c344_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c344.mem 17 1 1 sh3_zsrt139c344_pal.mem 0x158afe76
+45 196494 10240 480 sh3_zsrt139c345_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c345.mem 17 1 1 sh3_zsrt139c345_pal.mem 0x158afe76
+46 196494 10240 480 sh3_zsrt139c346_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c346.mem 17 1 1 sh3_zsrt139c346_pal.mem 0x158afe76
+47 196494 10240 480 sh3_zsrt139c347_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c347.mem 17 1 1 sh3_zsrt139c347_pal.mem 0x158afe76
+48 196494 10240 480 sh3_zsrt139c348_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c348.mem 17 1 1 sh3_zsrt139c348_pal.mem 0x158afe76
+49 196494 10240 480 sh3_zsrt139c349_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c349.mem 17 1 1 sh3_zsrt139c349_pal.mem 0x158afe76
+50 196494 10240 480 sh3_zsrt139c350_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c350.mem 17 1 1 sh3_zsrt139c350_pal.mem 0x158afe76
+51 196494 10240 480 sh3_zsrt139c351_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c351.mem 17 1 1 sh3_zsrt139c351_pal.mem 0x158afe76
+52 196494 10240 480 sh3_zsrt139c352_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c352.mem 17 1 1 sh3_zsrt139c352_pal.mem 0x158afe76
+53 196494 10240 480 sh3_zsrt139c353_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c353.mem 17 1 1 sh3_zsrt139c353_pal.mem 0x158afe76
+54 196494 10240 480 sh3_zsrt139c354_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c354.mem 17 1 1 sh3_zsrt139c354_pal.mem 0x158afe76
+55 196494 10240 480 sh3_zsrt139c355_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c355.mem 17 1 1 sh3_zsrt139c355_pal.mem 0x158afe76
+56 196494 10240 480 sh3_zsrt139c356_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c356.mem 17 1 1 sh3_zsrt139c356_pal.mem 0x158afe76
+57 196494 10240 480 sh3_zsrt139c357_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c357.mem 17 1 1 sh3_zsrt139c357_pal.mem 0x158afe76
+58 196494 10240 480 sh3_zsrt139c358_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c358.mem 17 1 1 sh3_zsrt139c358_pal.mem 0x158afe76
+59 196494 10240 480 sh3_zsrt139c359_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c359.mem 17 1 1 sh3_zsrt139c359_pal.mem 0x158afe76
+60 196494 10240 480 sh3_zsrt139c360_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c360.mem 17 1 1 sh3_zsrt139c360_pal.mem 0x158afe76
+61 196494 10240 480 sh3_zsrt139c361_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c361.mem 17 1 1 sh3_zsrt139c361_pal.mem 0x158afe76
+62 196494 10240 480 sh3_zsrt139c362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c362.mem 17 1 1 sh3_zsrt139c362_pal.mem 0x158afe76
+63 196494 10240 480 sh3_zsrt139c363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c363.mem 17 1 1 sh3_zsrt139c363_pal.mem 0x158afe76
+64 196494 10240 480 sh3_zsrt139c364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c364.mem 17 1 1 sh3_zsrt139c364_pal.mem 0x158afe76
+65 196494 10240 480 sh3_zsrt139c365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c365.mem 17 1 1 sh3_zsrt139c365_pal.mem 0x158afe76
+66 196494 10240 480 sh3_zsrt139c366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c366.mem 17 1 1 sh3_zsrt139c366_pal.mem 0x158afe76
+67 196494 10240 480 sh3_zsrt139c367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c367.mem 17 1 1 sh3_zsrt139c367_pal.mem 0x158afe76
+68 196494 10240 480 sh3_zsrt139c368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c368.mem 17 1 1 sh3_zsrt139c368_pal.mem 0x158afe76
+69 196494 10240 480 sh3_zsrt139c369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c369.mem 17 1 1 sh3_zsrt139c369_pal.mem 0x158afe76
+70 196494 10240 480 sh3_zsrt139c370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c370.mem 17 1 1 sh3_zsrt139c370_pal.mem 0x158afe76
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+181 197327 10240 480 sh3_zsrt139c3181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3181.mem 17 1 1 sh3_zsrt139c3181_pal.mem 0x158afe76
+182 197327 10240 480 sh3_zsrt139c3182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3182.mem 17 1 1 sh3_zsrt139c3182_pal.mem 0x158afe76
+183 197327 10240 480 sh3_zsrt139c3183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3183.mem 17 1 1 sh3_zsrt139c3183_pal.mem 0x158afe76
+184 197327 10240 480 sh3_zsrt139c3184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3184.mem 17 1 1 sh3_zsrt139c3184_pal.mem 0x158afe76
+185 197327 10240 480 sh3_zsrt139c3185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3185.mem 17 1 1 sh3_zsrt139c3185_pal.mem 0x158afe76
+186 197327 10240 480 sh3_zsrt139c3186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3186.mem 17 1 1 sh3_zsrt139c3186_pal.mem 0x158afe76
+187 197327 10240 480 sh3_zsrt139c3187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3187.mem 17 1 1 sh3_zsrt139c3187_pal.mem 0x158afe76
+188 197327 10240 480 sh3_zsrt139c3188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3188.mem 17 1 1 sh3_zsrt139c3188_pal.mem 0x158afe76
+189 197327 10240 480 sh3_zsrt139c3189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3189.mem 17 1 1 sh3_zsrt139c3189_pal.mem 0x158afe76
+190 197327 10240 480 sh3_zsrt139c3190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3190.mem 17 1 1 sh3_zsrt139c3190_pal.mem 0x158afe76
+191 197327 10240 480 sh3_zsrt139c3191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3191.mem 17 1 1 sh3_zsrt139c3191_pal.mem 0x158afe76
+192 197327 10240 480 sh3_zsrt139c3192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3192.mem 17 1 1 sh3_zsrt139c3192_pal.mem 0x158afe76
+193 197327 10240 480 sh3_zsrt139c3193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3193.mem 17 1 1 sh3_zsrt139c3193_pal.mem 0x158afe76
+194 197327 10240 480 sh3_zsrt139c3194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3194.mem 17 1 1 sh3_zsrt139c3194_pal.mem 0x158afe76
+195 197327 10240 480 sh3_zsrt139c3195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3195.mem 17 1 1 sh3_zsrt139c3195_pal.mem 0x158afe76
+196 197327 10240 480 sh3_zsrt139c3196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3196.mem 17 1 1 sh3_zsrt139c3196_pal.mem 0x158afe76
+197 197327 10240 480 sh3_zsrt139c3197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3197.mem 17 1 1 sh3_zsrt139c3197_pal.mem 0x158afe76
+198 197327 10240 480 sh3_zsrt139c3198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3198.mem 17 1 1 sh3_zsrt139c3198_pal.mem 0x158afe76
+199 197327 10240 480 sh3_zsrt139c3199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3199.mem 17 1 1 sh3_zsrt139c3199_pal.mem 0x158afe76
+200 197327 10240 480 sh3_zsrt139c3200_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3200.mem 17 1 1 sh3_zsrt139c3200_pal.mem 0x158afe76
+201 197327 10240 480 sh3_zsrt139c3201_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3201.mem 17 1 1 sh3_zsrt139c3201_pal.mem 0x158afe76
+202 197327 10240 480 sh3_zsrt139c3202_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3202.mem 17 1 1 sh3_zsrt139c3202_pal.mem 0x158afe76
+203 197327 10240 480 sh3_zsrt139c3203_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3203.mem 17 1 1 sh3_zsrt139c3203_pal.mem 0x158afe76
+204 197327 10240 480 sh3_zsrt139c3204_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3204.mem 17 1 1 sh3_zsrt139c3204_pal.mem 0x158afe76
+205 197327 10240 480 sh3_zsrt139c3205_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3205.mem 17 1 1 sh3_zsrt139c3205_pal.mem 0x158afe76
+206 197327 10240 480 sh3_zsrt139c3206_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3206.mem 17 1 1 sh3_zsrt139c3206_pal.mem 0x158afe76
+207 197327 10240 480 sh3_zsrt139c3207_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3207.mem 17 1 1 sh3_zsrt139c3207_pal.mem 0x158afe76
+208 197327 10240 480 sh3_zsrt139c3208_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3208.mem 17 1 1 sh3_zsrt139c3208_pal.mem 0x158afe76
+209 197327 10240 480 sh3_zsrt139c3209_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3209.mem 17 1 1 sh3_zsrt139c3209_pal.mem 0x158afe76
+210 197327 10240 480 sh3_zsrt139c3210_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3210.mem 17 1 1 sh3_zsrt139c3210_pal.mem 0x158afe76
+211 197327 10240 480 sh3_zsrt139c3211_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3211.mem 17 1 1 sh3_zsrt139c3211_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139c4_epochs.txt

@@ -0,0 +1,290 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139a9', 'zsrt139b1', 'zsrt139c3']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 287 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 5328 11264 480 sh3_zsrt139c40_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139c40.mem 494 54 0 sh3_zsrt139c40_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139c41_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139c41.mem 1061 117 0 sh3_zsrt139c41_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139c42_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139c42.mem 530 58 1 sh3_zsrt139c42_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139c43_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139c43.mem 782 86 0 sh3_zsrt139c43_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139c44_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c44.mem 1232 136 0 sh3_zsrt139c44_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139c45_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c45.mem 1232 136 1 sh3_zsrt139c45_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139c46_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c46.mem 764 84 1 sh3_zsrt139c46_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139c47_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c47.mem 1232 136 1 sh3_zsrt139c47_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139c48_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c48.mem 710 78 1 sh3_zsrt139c48_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139c49_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c49.mem 1232 136 1 sh3_zsrt139c49_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139c410_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c410.mem 1232 136 1 sh3_zsrt139c410_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139c411_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c411.mem 953 105 1 sh3_zsrt139c411_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139c412_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c412.mem 1232 136 1 sh3_zsrt139c412_pal.mem 0x5cbf8bb4
+13 21005 11264 480 sh3_zsrt139c413_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c413.mem 1097 121 1 sh3_zsrt139c413_pal.mem 0x5cbf8bb4
+14 21599 11264 480 sh3_zsrt139c414_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c414.mem 170 18 1 sh3_zsrt139c414_pal.mem 0x5cbf8bb4
+15 26066 11264 480 sh3_zsrt139c415_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139c415.mem 62 6 0 sh3_zsrt139c415_pal.mem 0x44679578
+16 30859 10240 480 sh3_zsrt139c416_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139c416.mem 620 68 0 sh3_zsrt139c416_pal.mem 0x47405cb0
+17 31075 13824 480 sh3_zsrt139c417_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139c417.mem 620 68 0 sh3_zsrt139c417_pal.mem 0x566e7c38
+18 77112 10240 480 sh3_zsrt139c418_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139c418.mem 620 68 0 sh3_zsrt139c418_pal.mem 0x43ece1ae
+19 89164 9216 480 sh3_zsrt139c419_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139c419.mem 620 68 0 sh3_zsrt139c419_pal.mem 0x5dfce0a2
+20 119471 8192 480 sh3_zsrt139c420_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c420.mem 1844 204 0 sh3_zsrt139c420_pal.mem 0x47097d4c
+21 120110 8192 480 sh3_zsrt139c421_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c421.mem 1844 204 1 sh3_zsrt139c421_pal.mem 0x47097d4c
+22 120749 8192 480 sh3_zsrt139c422_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c422.mem 1844 204 1 sh3_zsrt139c422_pal.mem 0x47097d4c
+23 121388 8192 480 sh3_zsrt139c423_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c423.mem 1844 204 1 sh3_zsrt139c423_pal.mem 0x47097d4c
+24 122027 8192 480 sh3_zsrt139c424_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c424.mem 1844 204 1 sh3_zsrt139c424_pal.mem 0x47097d4c
+25 129389 8192 480 sh3_zsrt139c425_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c425.mem 1844 204 1 sh3_zsrt139c425_pal.mem 0x47097d4c
+26 130241 8192 480 sh3_zsrt139c426_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c426.mem 1844 204 1 sh3_zsrt139c426_pal.mem 0x47097d4c
+27 130880 8192 480 sh3_zsrt139c427_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139c427.mem 1844 204 1 sh3_zsrt139c427_pal.mem 0x47097d4c
+28 146205 11264 480 sh3_zsrt139c428_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c428.mem 1142 126 0 sh3_zsrt139c428_pal.mem 0xfd978fd9
+29 146630 11264 480 sh3_zsrt139c429_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c429.mem 1178 130 1 sh3_zsrt139c429_pal.mem 0xfd978fd9
+30 147068 11264 480 sh3_zsrt139c430_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c430.mem 1106 122 1 sh3_zsrt139c430_pal.mem 0xfd978fd9
+31 147480 11264 480 sh3_zsrt139c431_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c431.mem 1070 118 0 sh3_zsrt139c431_pal.mem 0xd5ed05ff
+32 147888 11264 480 sh3_zsrt139c432_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c432.mem 998 110 1 sh3_zsrt139c432_pal.mem 0xd5ed05ff
+33 148264 11264 480 sh3_zsrt139c433_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c433.mem 1070 118 1 sh3_zsrt139c433_pal.mem 0xd5ed05ff
+34 148919 11264 480 sh3_zsrt139c434_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c434.mem 782 86 0 sh3_zsrt139c434_pal.mem 0xcdf8a4d8
+35 149214 11264 480 sh3_zsrt139c435_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c435.mem 782 86 1 sh3_zsrt139c435_pal.mem 0xcdf8a4d8
+36 149509 11264 480 sh3_zsrt139c436_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c436.mem 746 82 1 sh3_zsrt139c436_pal.mem 0xcdf8a4d8
+37 152021 11264 480 sh3_zsrt139c437_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c437.mem 1070 118 0 sh3_zsrt139c437_pal.mem 0xc6784386
+38 152420 11264 480 sh3_zsrt139c438_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c438.mem 1034 114 1 sh3_zsrt139c438_pal.mem 0xc6784386
+39 152806 11264 480 sh3_zsrt139c439_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c439.mem 1106 122 1 sh3_zsrt139c439_pal.mem 0xc6784386
+40 153218 11264 480 sh3_zsrt139c440_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c440.mem 1142 126 0 sh3_zsrt139c440_pal.mem 0xc6784386
+41 153643 11264 480 sh3_zsrt139c441_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c441.mem 1034 114 1 sh3_zsrt139c441_pal.mem 0xc6784386
+42 154029 11264 480 sh3_zsrt139c442_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c442.mem 1070 118 1 sh3_zsrt139c442_pal.mem 0xc6784386
+43 154428 11264 480 sh3_zsrt139c443_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c443.mem 1142 126 1 sh3_zsrt139c443_pal.mem 0xc6784386
+44 154853 11264 480 sh3_zsrt139c444_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c444.mem 1106 122 1 sh3_zsrt139c444_pal.mem 0xc6784386
+45 155265 11264 480 sh3_zsrt139c445_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c445.mem 1070 118 1 sh3_zsrt139c445_pal.mem 0xc6784386
+46 155664 11264 480 sh3_zsrt139c446_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c446.mem 1070 118 1 sh3_zsrt139c446_pal.mem 0xc6784386
+47 156063 11264 480 sh3_zsrt139c447_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139c447.mem 1358 150 1 sh3_zsrt139c447_pal.mem 0xc6784386
+48 156566 10240 480 sh3_zsrt139c448_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c448.mem 998 110 0 sh3_zsrt139c448_pal.mem 0x00fd9028
+49 156939 10240 480 sh3_zsrt139c449_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c449.mem 890 98 1 sh3_zsrt139c449_pal.mem 0x00fd9028
+50 157273 10240 480 sh3_zsrt139c450_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c450.mem 890 98 1 sh3_zsrt139c450_pal.mem 0x00fd9028
+51 157607 10240 480 sh3_zsrt139c451_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c451.mem 962 106 1 sh3_zsrt139c451_pal.mem 0x00fd9028
+52 157967 10240 480 sh3_zsrt139c452_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c452.mem 926 102 1 sh3_zsrt139c452_pal.mem 0x00fd9028
+53 158314 10240 480 sh3_zsrt139c453_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c453.mem 962 106 1 sh3_zsrt139c453_pal.mem 0x00fd9028
+54 158674 10240 480 sh3_zsrt139c454_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c454.mem 962 106 1 sh3_zsrt139c454_pal.mem 0x00fd9028
+55 159034 10240 480 sh3_zsrt139c455_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c455.mem 1034 114 1 sh3_zsrt139c455_pal.mem 0x00fd9028
+56 159420 10240 480 sh3_zsrt139c456_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c456.mem 890 98 1 sh3_zsrt139c456_pal.mem 0x00fd9028
+57 159754 10240 480 sh3_zsrt139c457_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c457.mem 962 106 1 sh3_zsrt139c457_pal.mem 0x00fd9028
+58 160114 10240 480 sh3_zsrt139c458_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c458.mem 566 62 1 sh3_zsrt139c458_pal.mem 0x00fd9028
+59 160331 10240 480 sh3_zsrt139c459_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c459.mem 1178 130 0 sh3_zsrt139c459_pal.mem 0xd8d19684
+60 160769 10240 480 sh3_zsrt139c460_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c460.mem 1070 118 1 sh3_zsrt139c460_pal.mem 0xd8d19684
+61 161168 10240 480 sh3_zsrt139c461_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c461.mem 1070 118 1 sh3_zsrt139c461_pal.mem 0xd8d19684
+62 161567 10240 480 sh3_zsrt139c462_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c462.mem 1250 138 1 sh3_zsrt139c462_pal.mem 0xd8d19684
+63 162031 10240 480 sh3_zsrt139c463_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c463.mem 710 78 1 sh3_zsrt139c463_pal.mem 0xd8d19684
+64 162300 10240 480 sh3_zsrt139c464_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c464.mem 1142 126 1 sh3_zsrt139c464_pal.mem 0xd8d19684
+65 162725 10240 480 sh3_zsrt139c465_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c465.mem 1178 130 1 sh3_zsrt139c465_pal.mem 0xd8d19684
+66 163163 10240 480 sh3_zsrt139c466_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c466.mem 1106 122 1 sh3_zsrt139c466_pal.mem 0xd8d19684
+67 163575 10240 480 sh3_zsrt139c467_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c467.mem 1142 126 1 sh3_zsrt139c467_pal.mem 0xd8d19684
+68 164000 10240 480 sh3_zsrt139c468_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c468.mem 530 58 1 sh3_zsrt139c468_pal.mem 0xd8d19684
+69 164204 10240 480 sh3_zsrt139c469_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c469.mem 1322 146 0 sh3_zsrt139c469_pal.mem 0xaa4e7e05
+70 164694 10240 480 sh3_zsrt139c470_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c470.mem 674 74 1 sh3_zsrt139c470_pal.mem 0xaa4e7e05
+71 164950 10240 480 sh3_zsrt139c471_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139c471.mem 602 66 1 sh3_zsrt139c471_pal.mem 0xaa4e7e05
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+73 175995 12288 480 sh3_zsrt139c473_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139c473.mem 1214 134 0 sh3_zsrt139c473_pal.mem 0x56ebf1d1
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sim/data/top_psmct32_raster_demo/sh3_zsrt139d195957_epochs.txt

@@ -0,0 +1,17 @@
+# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959570.mem 35 3 0 sh3_zsrt139d1959570_pal.mem 0x00000000
+1 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959571.mem 44 4 1 sh3_zsrt139d1959570_pal.mem 0x00000000
+2 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959572.mem 44 4 1 sh3_zsrt139d1959570_pal.mem 0x00000000
+3 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959573.mem 62 6 1 sh3_zsrt139d1959570_pal.mem 0x00000000
+4 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959574.mem 116 12 1 sh3_zsrt139d1959570_pal.mem 0x00000000
+5 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959575.mem 143 15 1 sh3_zsrt139d1959570_pal.mem 0x00000000
+6 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959576.mem 62 6 1 sh3_zsrt139d1959570_pal.mem 0x00000000
+7 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959577.mem 44 4 1 sh3_zsrt139d1959570_pal.mem 0x00000000
+8 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959578.mem 44 4 1 sh3_zsrt139d1959570_pal.mem 0x00000000
+9 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d1959579.mem 35 3 1 sh3_zsrt139d1959570_pal.mem 0x00000000
+10 195957 8192 480 sh3_zsrt139d1959570_tex_lpddr.mem 0x200000 262144 0x6a4755a5 feeder_sh3_zsrt139d19595710.mem 17 1 1 sh3_zsrt139d1959570_pal.mem 0x00000000

sim/data/top_psmct32_raster_demo/sh3_zsrt139d195973_epochs.txt

@@ -0,0 +1,17 @@
+# Ch434 epoch descriptor table (11 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 11 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959730.mem 35 3 0 sh3_zsrt139d1959730_pal.mem 0x00000000
+1 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959731.mem 44 4 1 sh3_zsrt139d1959730_pal.mem 0x00000000
+2 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959732.mem 44 4 1 sh3_zsrt139d1959730_pal.mem 0x00000000
+3 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959733.mem 62 6 1 sh3_zsrt139d1959730_pal.mem 0x00000000
+4 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959734.mem 116 12 1 sh3_zsrt139d1959730_pal.mem 0x00000000
+5 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959735.mem 143 15 1 sh3_zsrt139d1959730_pal.mem 0x00000000
+6 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959736.mem 62 6 1 sh3_zsrt139d1959730_pal.mem 0x00000000
+7 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959737.mem 44 4 1 sh3_zsrt139d1959730_pal.mem 0x00000000
+8 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959738.mem 44 4 1 sh3_zsrt139d1959730_pal.mem 0x00000000
+9 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d1959739.mem 35 3 1 sh3_zsrt139d1959730_pal.mem 0x00000000
+10 195973 8192 480 sh3_zsrt139d1959730_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139d19597310.mem 17 1 1 sh3_zsrt139d1959730_pal.mem 0x00000000

sim/data/top_psmct32_raster_demo/sh3_zsrt139d1_epochs.txt

@@ -0,0 +1,173 @@
+# Ch407 epoch descriptor table (167 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 167 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 198075 10240 480 sh3_zsrt139d10_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d10.mem 17 1 0 sh3_zsrt139d10_pal.mem 0x158afe76
+1 198075 10240 480 sh3_zsrt139d11_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d11.mem 17 1 1 sh3_zsrt139d11_pal.mem 0x158afe76
+2 198075 10240 480 sh3_zsrt139d12_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d12.mem 17 1 1 sh3_zsrt139d12_pal.mem 0x158afe76
+3 198075 10240 480 sh3_zsrt139d13_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d13.mem 17 1 1 sh3_zsrt139d13_pal.mem 0x158afe76
+4 198075 10240 480 sh3_zsrt139d14_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d14.mem 17 1 1 sh3_zsrt139d14_pal.mem 0x158afe76
+5 198075 10240 480 sh3_zsrt139d15_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d15.mem 17 1 1 sh3_zsrt139d15_pal.mem 0x158afe76
+6 198075 10240 480 sh3_zsrt139d16_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d16.mem 17 1 1 sh3_zsrt139d16_pal.mem 0x158afe76
+7 198092 10240 480 sh3_zsrt139d17_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d17.mem 17 1 1 sh3_zsrt139d17_pal.mem 0x158afe76
+8 198092 10240 480 sh3_zsrt139d18_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d18.mem 17 1 1 sh3_zsrt139d18_pal.mem 0x158afe76
+9 198092 10240 480 sh3_zsrt139d19_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d19.mem 17 1 1 sh3_zsrt139d19_pal.mem 0x158afe76
+10 198092 10240 480 sh3_zsrt139d110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d110.mem 17 1 1 sh3_zsrt139d110_pal.mem 0x158afe76
+11 198092 10240 480 sh3_zsrt139d111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d111.mem 17 1 1 sh3_zsrt139d111_pal.mem 0x158afe76
+12 198092 10240 480 sh3_zsrt139d112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d112.mem 17 1 1 sh3_zsrt139d112_pal.mem 0x158afe76
+13 198092 10240 480 sh3_zsrt139d113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d113.mem 17 1 1 sh3_zsrt139d113_pal.mem 0x158afe76
+14 198092 10240 480 sh3_zsrt139d114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d114.mem 17 1 1 sh3_zsrt139d114_pal.mem 0x158afe76
+15 198092 10240 480 sh3_zsrt139d115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d115.mem 17 1 1 sh3_zsrt139d115_pal.mem 0x158afe76
+16 198092 10240 480 sh3_zsrt139d116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d116.mem 17 1 1 sh3_zsrt139d116_pal.mem 0x158afe76
+17 198092 10240 480 sh3_zsrt139d117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d117.mem 17 1 1 sh3_zsrt139d117_pal.mem 0x158afe76
+18 198092 10240 480 sh3_zsrt139d118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d118.mem 17 1 1 sh3_zsrt139d118_pal.mem 0x158afe76
+19 198092 10240 480 sh3_zsrt139d119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d119.mem 17 1 1 sh3_zsrt139d119_pal.mem 0x158afe76
+20 198092 10240 480 sh3_zsrt139d120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d120.mem 17 1 1 sh3_zsrt139d120_pal.mem 0x158afe76
+21 198092 10240 480 sh3_zsrt139d121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d121.mem 17 1 1 sh3_zsrt139d121_pal.mem 0x158afe76
+22 198092 10240 480 sh3_zsrt139d122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d122.mem 17 1 1 sh3_zsrt139d122_pal.mem 0x158afe76
+23 198092 10240 480 sh3_zsrt139d123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d123.mem 17 1 1 sh3_zsrt139d123_pal.mem 0x158afe76
+24 198092 10240 480 sh3_zsrt139d124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d124.mem 17 1 1 sh3_zsrt139d124_pal.mem 0x158afe76
+25 198092 10240 480 sh3_zsrt139d125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d125.mem 17 1 1 sh3_zsrt139d125_pal.mem 0x158afe76
+26 198092 10240 480 sh3_zsrt139d126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d126.mem 17 1 1 sh3_zsrt139d126_pal.mem 0x158afe76
+27 198092 10240 480 sh3_zsrt139d127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d127.mem 17 1 1 sh3_zsrt139d127_pal.mem 0x158afe76
+28 198092 10240 480 sh3_zsrt139d128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d128.mem 17 1 1 sh3_zsrt139d128_pal.mem 0x158afe76
+29 198092 10240 480 sh3_zsrt139d129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d129.mem 17 1 1 sh3_zsrt139d129_pal.mem 0x158afe76
+30 198092 10240 480 sh3_zsrt139d130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d130.mem 17 1 1 sh3_zsrt139d130_pal.mem 0x158afe76
+31 198092 10240 480 sh3_zsrt139d131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d131.mem 17 1 1 sh3_zsrt139d131_pal.mem 0x158afe76
+32 198092 10240 480 sh3_zsrt139d132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d132.mem 17 1 1 sh3_zsrt139d132_pal.mem 0x158afe76
+33 198092 10240 480 sh3_zsrt139d133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d133.mem 17 1 1 sh3_zsrt139d133_pal.mem 0x158afe76
+34 198092 10240 480 sh3_zsrt139d134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d134.mem 17 1 1 sh3_zsrt139d134_pal.mem 0x158afe76
+35 198092 10240 480 sh3_zsrt139d135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d135.mem 17 1 1 sh3_zsrt139d135_pal.mem 0x158afe76
+36 198092 10240 480 sh3_zsrt139d136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d136.mem 17 1 1 sh3_zsrt139d136_pal.mem 0x158afe76
+37 198092 10240 480 sh3_zsrt139d137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d137.mem 17 1 1 sh3_zsrt139d137_pal.mem 0x158afe76
+38 198092 10240 480 sh3_zsrt139d138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d138.mem 17 1 1 sh3_zsrt139d138_pal.mem 0x158afe76
+39 198092 10240 480 sh3_zsrt139d139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d139.mem 17 1 1 sh3_zsrt139d139_pal.mem 0x158afe76
+40 198092 10240 480 sh3_zsrt139d140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d140.mem 17 1 1 sh3_zsrt139d140_pal.mem 0x158afe76
+41 198092 10240 480 sh3_zsrt139d141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d141.mem 17 1 1 sh3_zsrt139d141_pal.mem 0x158afe76
+42 198092 10240 480 sh3_zsrt139d142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d142.mem 17 1 1 sh3_zsrt139d142_pal.mem 0x158afe76
+43 198092 10240 480 sh3_zsrt139d143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d143.mem 17 1 1 sh3_zsrt139d143_pal.mem 0x158afe76
+44 198092 10240 480 sh3_zsrt139d144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d144.mem 17 1 1 sh3_zsrt139d144_pal.mem 0x158afe76
+45 198092 10240 480 sh3_zsrt139d145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d145.mem 17 1 1 sh3_zsrt139d145_pal.mem 0x158afe76
+46 198092 10240 480 sh3_zsrt139d146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d146.mem 17 1 1 sh3_zsrt139d146_pal.mem 0x158afe76
+47 198092 10240 480 sh3_zsrt139d147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d147.mem 17 1 1 sh3_zsrt139d147_pal.mem 0x158afe76
+48 198092 10240 480 sh3_zsrt139d148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d148.mem 17 1 1 sh3_zsrt139d148_pal.mem 0x158afe76
+49 198092 10240 480 sh3_zsrt139d149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d149.mem 17 1 1 sh3_zsrt139d149_pal.mem 0x158afe76
+50 198092 10240 480 sh3_zsrt139d150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d150.mem 17 1 1 sh3_zsrt139d150_pal.mem 0x158afe76
+51 198092 10240 480 sh3_zsrt139d151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d151.mem 17 1 1 sh3_zsrt139d151_pal.mem 0x158afe76
+52 198092 10240 480 sh3_zsrt139d152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d152.mem 17 1 1 sh3_zsrt139d152_pal.mem 0x158afe76
+53 198092 10240 480 sh3_zsrt139d153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d153.mem 17 1 1 sh3_zsrt139d153_pal.mem 0x158afe76
+54 198092 10240 480 sh3_zsrt139d154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d154.mem 17 1 1 sh3_zsrt139d154_pal.mem 0x158afe76
+55 198092 10240 480 sh3_zsrt139d155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d155.mem 17 1 1 sh3_zsrt139d155_pal.mem 0x158afe76
+56 198092 10240 480 sh3_zsrt139d156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d156.mem 17 1 1 sh3_zsrt139d156_pal.mem 0x158afe76
+57 198092 10240 480 sh3_zsrt139d157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d157.mem 17 1 1 sh3_zsrt139d157_pal.mem 0x158afe76
+58 198092 10240 480 sh3_zsrt139d158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d158.mem 17 1 1 sh3_zsrt139d158_pal.mem 0x158afe76
+59 198092 10240 480 sh3_zsrt139d159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d159.mem 17 1 1 sh3_zsrt139d159_pal.mem 0x158afe76
+60 198092 10240 480 sh3_zsrt139d160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d160.mem 17 1 1 sh3_zsrt139d160_pal.mem 0x158afe76
+61 198092 10240 480 sh3_zsrt139d161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d161.mem 17 1 1 sh3_zsrt139d161_pal.mem 0x158afe76
+62 198092 10240 480 sh3_zsrt139d162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d162.mem 17 1 1 sh3_zsrt139d162_pal.mem 0x158afe76
+63 198092 10240 480 sh3_zsrt139d163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d163.mem 17 1 1 sh3_zsrt139d163_pal.mem 0x158afe76
+64 198092 10240 480 sh3_zsrt139d164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d164.mem 17 1 1 sh3_zsrt139d164_pal.mem 0x158afe76
+65 198092 10240 480 sh3_zsrt139d165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d165.mem 17 1 1 sh3_zsrt139d165_pal.mem 0x158afe76
+66 198092 10240 480 sh3_zsrt139d166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d166.mem 17 1 1 sh3_zsrt139d166_pal.mem 0x158afe76
+67 198092 10240 480 sh3_zsrt139d167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d167.mem 17 1 1 sh3_zsrt139d167_pal.mem 0x158afe76
+68 198092 10240 480 sh3_zsrt139d168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d168.mem 17 1 1 sh3_zsrt139d168_pal.mem 0x158afe76
+69 198092 10240 480 sh3_zsrt139d169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d169.mem 17 1 1 sh3_zsrt139d169_pal.mem 0x158afe76
+70 198092 10240 480 sh3_zsrt139d170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d170.mem 17 1 1 sh3_zsrt139d170_pal.mem 0x158afe76
+71 198092 10240 480 sh3_zsrt139d171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d171.mem 17 1 1 sh3_zsrt139d171_pal.mem 0x158afe76
+72 198092 10240 480 sh3_zsrt139d172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d172.mem 17 1 1 sh3_zsrt139d172_pal.mem 0x158afe76
+73 198092 10240 480 sh3_zsrt139d173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d173.mem 17 1 1 sh3_zsrt139d173_pal.mem 0x158afe76
+74 198092 10240 480 sh3_zsrt139d174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d174.mem 17 1 1 sh3_zsrt139d174_pal.mem 0x158afe76
+75 198092 10240 480 sh3_zsrt139d175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d175.mem 17 1 1 sh3_zsrt139d175_pal.mem 0x158afe76
+76 198092 10240 480 sh3_zsrt139d176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d176.mem 17 1 1 sh3_zsrt139d176_pal.mem 0x158afe76
+77 198092 10240 480 sh3_zsrt139d177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d177.mem 17 1 1 sh3_zsrt139d177_pal.mem 0x158afe76
+78 198092 10240 480 sh3_zsrt139d178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d178.mem 17 1 1 sh3_zsrt139d178_pal.mem 0x158afe76
+79 198092 10240 480 sh3_zsrt139d179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d179.mem 17 1 1 sh3_zsrt139d179_pal.mem 0x158afe76
+80 198092 10240 480 sh3_zsrt139d180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d180.mem 17 1 1 sh3_zsrt139d180_pal.mem 0x158afe76
+81 198092 10240 480 sh3_zsrt139d181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d181.mem 17 1 1 sh3_zsrt139d181_pal.mem 0x158afe76
+82 198092 10240 480 sh3_zsrt139d182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d182.mem 17 1 1 sh3_zsrt139d182_pal.mem 0x158afe76
+83 198092 10240 480 sh3_zsrt139d183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d183.mem 17 1 1 sh3_zsrt139d183_pal.mem 0x158afe76
+84 198092 10240 480 sh3_zsrt139d184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d184.mem 17 1 1 sh3_zsrt139d184_pal.mem 0x158afe76
+85 198092 10240 480 sh3_zsrt139d185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d185.mem 17 1 1 sh3_zsrt139d185_pal.mem 0x158afe76
+86 198092 10240 480 sh3_zsrt139d186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d186.mem 17 1 1 sh3_zsrt139d186_pal.mem 0x158afe76
+87 198092 10240 480 sh3_zsrt139d187_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d187.mem 17 1 1 sh3_zsrt139d187_pal.mem 0x158afe76
+88 198092 10240 480 sh3_zsrt139d188_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d188.mem 17 1 1 sh3_zsrt139d188_pal.mem 0x158afe76
+89 198092 10240 480 sh3_zsrt139d189_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d189.mem 17 1 1 sh3_zsrt139d189_pal.mem 0x158afe76
+90 198092 10240 480 sh3_zsrt139d190_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d190.mem 17 1 1 sh3_zsrt139d190_pal.mem 0x158afe76
+91 198092 10240 480 sh3_zsrt139d191_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d191.mem 17 1 1 sh3_zsrt139d191_pal.mem 0x158afe76
+92 198092 10240 480 sh3_zsrt139d192_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d192.mem 17 1 1 sh3_zsrt139d192_pal.mem 0x158afe76
+93 198092 10240 480 sh3_zsrt139d193_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d193.mem 17 1 1 sh3_zsrt139d193_pal.mem 0x158afe76
+94 198092 10240 480 sh3_zsrt139d194_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d194.mem 17 1 1 sh3_zsrt139d194_pal.mem 0x158afe76
+95 198092 10240 480 sh3_zsrt139d195_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d195.mem 17 1 1 sh3_zsrt139d195_pal.mem 0x158afe76
+96 198092 10240 480 sh3_zsrt139d196_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d196.mem 17 1 1 sh3_zsrt139d196_pal.mem 0x158afe76
+97 198092 10240 480 sh3_zsrt139d197_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d197.mem 17 1 1 sh3_zsrt139d197_pal.mem 0x158afe76
+98 198092 10240 480 sh3_zsrt139d198_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d198.mem 17 1 1 sh3_zsrt139d198_pal.mem 0x158afe76
+99 198092 10240 480 sh3_zsrt139d199_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d199.mem 17 1 1 sh3_zsrt139d199_pal.mem 0x158afe76
+100 198092 10240 480 sh3_zsrt139d1100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1100.mem 17 1 1 sh3_zsrt139d1100_pal.mem 0x158afe76
+101 198092 10240 480 sh3_zsrt139d1101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1101.mem 17 1 1 sh3_zsrt139d1101_pal.mem 0x158afe76
+102 198092 10240 480 sh3_zsrt139d1102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1102.mem 17 1 1 sh3_zsrt139d1102_pal.mem 0x158afe76
+103 198092 10240 480 sh3_zsrt139d1103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1103.mem 17 1 1 sh3_zsrt139d1103_pal.mem 0x158afe76
+104 198092 10240 480 sh3_zsrt139d1104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1104.mem 17 1 1 sh3_zsrt139d1104_pal.mem 0x158afe76
+105 198092 10240 480 sh3_zsrt139d1105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1105.mem 17 1 1 sh3_zsrt139d1105_pal.mem 0x158afe76
+106 198092 10240 480 sh3_zsrt139d1106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1106.mem 17 1 1 sh3_zsrt139d1106_pal.mem 0x158afe76
+107 198092 10240 480 sh3_zsrt139d1107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1107.mem 17 1 1 sh3_zsrt139d1107_pal.mem 0x158afe76
+108 198092 10240 480 sh3_zsrt139d1108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1108.mem 17 1 1 sh3_zsrt139d1108_pal.mem 0x158afe76
+109 198092 10240 480 sh3_zsrt139d1109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1109.mem 17 1 1 sh3_zsrt139d1109_pal.mem 0x158afe76
+110 198092 10240 480 sh3_zsrt139d1110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1110.mem 17 1 1 sh3_zsrt139d1110_pal.mem 0x158afe76
+111 198092 10240 480 sh3_zsrt139d1111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1111.mem 17 1 1 sh3_zsrt139d1111_pal.mem 0x158afe76
+112 198092 10240 480 sh3_zsrt139d1112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1112.mem 17 1 1 sh3_zsrt139d1112_pal.mem 0x158afe76
+113 198092 10240 480 sh3_zsrt139d1113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1113.mem 17 1 1 sh3_zsrt139d1113_pal.mem 0x158afe76
+114 198092 10240 480 sh3_zsrt139d1114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1114.mem 17 1 1 sh3_zsrt139d1114_pal.mem 0x158afe76
+115 198092 10240 480 sh3_zsrt139d1115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1115.mem 17 1 1 sh3_zsrt139d1115_pal.mem 0x158afe76
+116 198092 10240 480 sh3_zsrt139d1116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1116.mem 17 1 1 sh3_zsrt139d1116_pal.mem 0x158afe76
+117 198092 10240 480 sh3_zsrt139d1117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1117.mem 17 1 1 sh3_zsrt139d1117_pal.mem 0x158afe76
+118 198092 10240 480 sh3_zsrt139d1118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1118.mem 17 1 1 sh3_zsrt139d1118_pal.mem 0x158afe76
+119 198092 10240 480 sh3_zsrt139d1119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1119.mem 17 1 1 sh3_zsrt139d1119_pal.mem 0x158afe76
+120 198092 10240 480 sh3_zsrt139d1120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1120.mem 17 1 1 sh3_zsrt139d1120_pal.mem 0x158afe76
+121 198092 10240 480 sh3_zsrt139d1121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1121.mem 17 1 1 sh3_zsrt139d1121_pal.mem 0x158afe76
+122 198092 10240 480 sh3_zsrt139d1122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1122.mem 17 1 1 sh3_zsrt139d1122_pal.mem 0x158afe76
+123 198092 10240 480 sh3_zsrt139d1123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1123.mem 17 1 1 sh3_zsrt139d1123_pal.mem 0x158afe76
+124 198092 10240 480 sh3_zsrt139d1124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1124.mem 17 1 1 sh3_zsrt139d1124_pal.mem 0x158afe76
+125 198092 10240 480 sh3_zsrt139d1125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1125.mem 17 1 1 sh3_zsrt139d1125_pal.mem 0x158afe76
+126 198092 10240 480 sh3_zsrt139d1126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1126.mem 17 1 1 sh3_zsrt139d1126_pal.mem 0x158afe76
+127 198092 10240 480 sh3_zsrt139d1127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1127.mem 17 1 1 sh3_zsrt139d1127_pal.mem 0x158afe76
+128 198092 10240 480 sh3_zsrt139d1128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1128.mem 17 1 1 sh3_zsrt139d1128_pal.mem 0x158afe76
+129 198092 10240 480 sh3_zsrt139d1129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1129.mem 17 1 1 sh3_zsrt139d1129_pal.mem 0x158afe76
+130 198092 10240 480 sh3_zsrt139d1130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1130.mem 17 1 1 sh3_zsrt139d1130_pal.mem 0x158afe76
+131 198092 10240 480 sh3_zsrt139d1131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1131.mem 17 1 1 sh3_zsrt139d1131_pal.mem 0x158afe76
+132 198092 10240 480 sh3_zsrt139d1132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1132.mem 17 1 1 sh3_zsrt139d1132_pal.mem 0x158afe76
+133 198092 10240 480 sh3_zsrt139d1133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1133.mem 17 1 1 sh3_zsrt139d1133_pal.mem 0x158afe76
+134 198092 10240 480 sh3_zsrt139d1134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1134.mem 17 1 1 sh3_zsrt139d1134_pal.mem 0x158afe76
+135 198092 10240 480 sh3_zsrt139d1135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1135.mem 17 1 1 sh3_zsrt139d1135_pal.mem 0x158afe76
+136 198092 10240 480 sh3_zsrt139d1136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1136.mem 17 1 1 sh3_zsrt139d1136_pal.mem 0x158afe76
+137 198092 10240 480 sh3_zsrt139d1137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1137.mem 17 1 1 sh3_zsrt139d1137_pal.mem 0x158afe76
+138 198092 10240 480 sh3_zsrt139d1138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1138.mem 17 1 1 sh3_zsrt139d1138_pal.mem 0x158afe76
+139 198092 10240 480 sh3_zsrt139d1139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1139.mem 17 1 1 sh3_zsrt139d1139_pal.mem 0x158afe76
+140 198092 10240 480 sh3_zsrt139d1140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1140.mem 17 1 1 sh3_zsrt139d1140_pal.mem 0x158afe76
+141 198092 10240 480 sh3_zsrt139d1141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1141.mem 17 1 1 sh3_zsrt139d1141_pal.mem 0x158afe76
+142 198092 10240 480 sh3_zsrt139d1142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1142.mem 17 1 1 sh3_zsrt139d1142_pal.mem 0x158afe76
+143 198092 10240 480 sh3_zsrt139d1143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1143.mem 17 1 1 sh3_zsrt139d1143_pal.mem 0x158afe76
+144 198092 10240 480 sh3_zsrt139d1144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1144.mem 17 1 1 sh3_zsrt139d1144_pal.mem 0x158afe76
+145 198092 10240 480 sh3_zsrt139d1145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1145.mem 17 1 1 sh3_zsrt139d1145_pal.mem 0x158afe76
+146 198092 10240 480 sh3_zsrt139d1146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1146.mem 17 1 1 sh3_zsrt139d1146_pal.mem 0x158afe76
+147 198092 10240 480 sh3_zsrt139d1147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1147.mem 17 1 1 sh3_zsrt139d1147_pal.mem 0x158afe76
+148 198092 10240 480 sh3_zsrt139d1148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1148.mem 17 1 1 sh3_zsrt139d1148_pal.mem 0x158afe76
+149 198092 10240 480 sh3_zsrt139d1149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1149.mem 17 1 1 sh3_zsrt139d1149_pal.mem 0x158afe76
+150 198092 10240 480 sh3_zsrt139d1150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1150.mem 17 1 1 sh3_zsrt139d1150_pal.mem 0x158afe76
+151 198092 10240 480 sh3_zsrt139d1151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1151.mem 17 1 1 sh3_zsrt139d1151_pal.mem 0x158afe76
+152 198092 10240 480 sh3_zsrt139d1152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1152.mem 17 1 1 sh3_zsrt139d1152_pal.mem 0x158afe76
+153 198092 10240 480 sh3_zsrt139d1153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1153.mem 17 1 1 sh3_zsrt139d1153_pal.mem 0x158afe76
+154 198092 10240 480 sh3_zsrt139d1154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1154.mem 17 1 1 sh3_zsrt139d1154_pal.mem 0x158afe76
+155 198092 10240 480 sh3_zsrt139d1155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1155.mem 17 1 1 sh3_zsrt139d1155_pal.mem 0x158afe76
+156 198092 10240 480 sh3_zsrt139d1156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1156.mem 17 1 1 sh3_zsrt139d1156_pal.mem 0x158afe76
+157 198092 10240 480 sh3_zsrt139d1157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1157.mem 17 1 1 sh3_zsrt139d1157_pal.mem 0x158afe76
+158 198092 10240 480 sh3_zsrt139d1158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1158.mem 17 1 1 sh3_zsrt139d1158_pal.mem 0x158afe76
+159 198092 10240 480 sh3_zsrt139d1159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1159.mem 17 1 1 sh3_zsrt139d1159_pal.mem 0x158afe76
+160 198092 10240 480 sh3_zsrt139d1160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1160.mem 17 1 1 sh3_zsrt139d1160_pal.mem 0x158afe76
+161 198092 10240 480 sh3_zsrt139d1161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1161.mem 17 1 1 sh3_zsrt139d1161_pal.mem 0x158afe76
+162 198092 10240 480 sh3_zsrt139d1162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1162.mem 17 1 1 sh3_zsrt139d1162_pal.mem 0x158afe76
+163 198092 10240 480 sh3_zsrt139d1163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1163.mem 17 1 1 sh3_zsrt139d1163_pal.mem 0x158afe76
+164 198092 10240 480 sh3_zsrt139d1164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1164.mem 17 1 1 sh3_zsrt139d1164_pal.mem 0x158afe76
+165 198092 10240 480 sh3_zsrt139d1165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1165.mem 17 1 1 sh3_zsrt139d1165_pal.mem 0x158afe76
+166 198092 10240 480 sh3_zsrt139d1166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d1166.mem 17 1 1 sh3_zsrt139d1166_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139d2_epochs.txt

@@ -0,0 +1,457 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139c4', 'zsrt139d1']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 454 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 5328 11264 480 sh3_zsrt139d20_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139d20.mem 494 54 0 sh3_zsrt139d20_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139d21_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d21.mem 1061 117 0 sh3_zsrt139d21_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139d22_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d22.mem 530 58 1 sh3_zsrt139d22_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139d23_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139d23.mem 782 86 0 sh3_zsrt139d23_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139d24_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d24.mem 1232 136 0 sh3_zsrt139d24_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139d25_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d25.mem 1232 136 1 sh3_zsrt139d25_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139d26_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d26.mem 764 84 1 sh3_zsrt139d26_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139d27_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d27.mem 1232 136 1 sh3_zsrt139d27_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139d28_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d28.mem 710 78 1 sh3_zsrt139d28_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139d29_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d29.mem 1232 136 1 sh3_zsrt139d29_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139d210_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d210.mem 1232 136 1 sh3_zsrt139d210_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139d211_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d211.mem 953 105 1 sh3_zsrt139d211_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139d212_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d212.mem 1232 136 1 sh3_zsrt139d212_pal.mem 0x5cbf8bb4
+13 21005 11264 480 sh3_zsrt139d213_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d213.mem 1097 121 1 sh3_zsrt139d213_pal.mem 0x5cbf8bb4
+14 21599 11264 480 sh3_zsrt139d214_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d214.mem 170 18 1 sh3_zsrt139d214_pal.mem 0x5cbf8bb4
+15 26066 11264 480 sh3_zsrt139d215_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d215.mem 62 6 0 sh3_zsrt139d215_pal.mem 0x44679578
+16 30859 10240 480 sh3_zsrt139d216_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d216.mem 620 68 0 sh3_zsrt139d216_pal.mem 0x47405cb0
+17 31075 13824 480 sh3_zsrt139d217_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139d217.mem 620 68 0 sh3_zsrt139d217_pal.mem 0x566e7c38
+18 77112 10240 480 sh3_zsrt139d218_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d218.mem 620 68 0 sh3_zsrt139d218_pal.mem 0x43ece1ae
+19 89164 9216 480 sh3_zsrt139d219_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139d219.mem 620 68 0 sh3_zsrt139d219_pal.mem 0x5dfce0a2
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+447 198092 10240 480 sh3_zsrt139d2447_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2447.mem 17 1 1 sh3_zsrt139d2447_pal.mem 0x158afe76
+448 198092 10240 480 sh3_zsrt139d2448_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2448.mem 17 1 1 sh3_zsrt139d2448_pal.mem 0x158afe76
+449 198092 10240 480 sh3_zsrt139d2449_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2449.mem 17 1 1 sh3_zsrt139d2449_pal.mem 0x158afe76
+450 198092 10240 480 sh3_zsrt139d2450_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2450.mem 17 1 1 sh3_zsrt139d2450_pal.mem 0x158afe76
+451 198092 10240 480 sh3_zsrt139d2451_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2451.mem 17 1 1 sh3_zsrt139d2451_pal.mem 0x158afe76
+452 198092 10240 480 sh3_zsrt139d2452_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2452.mem 17 1 1 sh3_zsrt139d2452_pal.mem 0x158afe76
+453 198092 10240 480 sh3_zsrt139d2453_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d2453.mem 17 1 1 sh3_zsrt139d2453_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139d3_epochs.txt

@@ -0,0 +1,193 @@
+# Ch407 epoch descriptor table (187 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 187 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 198075 10240 480 sh3_zsrt139d30_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d30.mem 557 61 0 sh3_zsrt139d30_pal.mem 0x158afe76
+1 198075 10240 480 sh3_zsrt139d31_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d31.mem 323 35 1 sh3_zsrt139d31_pal.mem 0x158afe76
+2 198075 10240 480 sh3_zsrt139d32_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d32.mem 53 5 1 sh3_zsrt139d32_pal.mem 0x158afe76
+3 198092 10240 480 sh3_zsrt139d33_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d33.mem 665 73 1 sh3_zsrt139d33_pal.mem 0x158afe76
+4 198092 10240 480 sh3_zsrt139d34_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d34.mem 215 23 1 sh3_zsrt139d34_pal.mem 0x158afe76
+5 198092 10240 480 sh3_zsrt139d35_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d35.mem 458 50 1 sh3_zsrt139d35_pal.mem 0x158afe76
+6 198092 10240 480 sh3_zsrt139d36_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d36.mem 431 47 1 sh3_zsrt139d36_pal.mem 0x158afe76
+7 198092 10240 480 sh3_zsrt139d37_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d37.mem 395 43 1 sh3_zsrt139d37_pal.mem 0x158afe76
+8 198092 10240 480 sh3_zsrt139d38_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d38.mem 206 22 1 sh3_zsrt139d38_pal.mem 0x158afe76
+9 198092 10240 480 sh3_zsrt139d39_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d39.mem 170 18 1 sh3_zsrt139d39_pal.mem 0x158afe76
+10 198092 10240 480 sh3_zsrt139d310_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d310.mem 242 26 1 sh3_zsrt139d310_pal.mem 0x158afe76
+11 198092 10240 480 sh3_zsrt139d311_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d311.mem 359 39 1 sh3_zsrt139d311_pal.mem 0x158afe76
+12 198092 10240 480 sh3_zsrt139d312_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d312.mem 323 35 1 sh3_zsrt139d312_pal.mem 0x158afe76
+13 198092 10240 480 sh3_zsrt139d313_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d313.mem 215 23 1 sh3_zsrt139d313_pal.mem 0x158afe76
+14 198092 10240 480 sh3_zsrt139d314_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d314.mem 314 34 1 sh3_zsrt139d314_pal.mem 0x158afe76
+15 198092 10240 480 sh3_zsrt139d315_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d315.mem 278 30 1 sh3_zsrt139d315_pal.mem 0x158afe76
+16 198092 10240 480 sh3_zsrt139d316_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d316.mem 116 12 1 sh3_zsrt139d316_pal.mem 0x158afe76
+17 198092 10240 480 sh3_zsrt139d317_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d317.mem 197 21 1 sh3_zsrt139d317_pal.mem 0x158afe76
+18 198092 10240 480 sh3_zsrt139d318_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d318.mem 458 50 1 sh3_zsrt139d318_pal.mem 0x158afe76
+19 198092 10240 480 sh3_zsrt139d319_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d319.mem 269 29 1 sh3_zsrt139d319_pal.mem 0x158afe76
+20 198092 10240 480 sh3_zsrt139d320_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d320.mem 206 22 1 sh3_zsrt139d320_pal.mem 0x158afe76
+21 198092 10240 480 sh3_zsrt139d321_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d321.mem 323 35 1 sh3_zsrt139d321_pal.mem 0x158afe76
+22 198092 10240 480 sh3_zsrt139d322_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d322.mem 494 54 1 sh3_zsrt139d322_pal.mem 0x158afe76
+23 198092 10240 480 sh3_zsrt139d323_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d323.mem 566 62 1 sh3_zsrt139d323_pal.mem 0x158afe76
+24 198092 10240 480 sh3_zsrt139d324_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d324.mem 287 31 1 sh3_zsrt139d324_pal.mem 0x158afe76
+25 198092 10240 480 sh3_zsrt139d325_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d325.mem 260 28 1 sh3_zsrt139d325_pal.mem 0x158afe76
+26 198092 10240 480 sh3_zsrt139d326_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d326.mem 89 9 1 sh3_zsrt139d326_pal.mem 0x158afe76
+27 198092 10240 480 sh3_zsrt139d327_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d327.mem 359 39 1 sh3_zsrt139d327_pal.mem 0x158afe76
+28 198092 10240 480 sh3_zsrt139d328_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d328.mem 539 59 1 sh3_zsrt139d328_pal.mem 0x158afe76
+29 198092 10240 480 sh3_zsrt139d329_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d329.mem 323 35 1 sh3_zsrt139d329_pal.mem 0x158afe76
+30 198092 10240 480 sh3_zsrt139d330_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d330.mem 179 19 1 sh3_zsrt139d330_pal.mem 0x158afe76
+31 198092 10240 480 sh3_zsrt139d331_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d331.mem 494 54 1 sh3_zsrt139d331_pal.mem 0x158afe76
+32 198092 10240 480 sh3_zsrt139d332_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d332.mem 251 27 1 sh3_zsrt139d332_pal.mem 0x158afe76
+33 198092 10240 480 sh3_zsrt139d333_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d333.mem 116 12 1 sh3_zsrt139d333_pal.mem 0x158afe76
+34 198092 10240 480 sh3_zsrt139d334_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d334.mem 251 27 1 sh3_zsrt139d334_pal.mem 0x158afe76
+35 198092 10240 480 sh3_zsrt139d335_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d335.mem 251 27 1 sh3_zsrt139d335_pal.mem 0x158afe76
+36 198092 10240 480 sh3_zsrt139d336_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d336.mem 170 18 1 sh3_zsrt139d336_pal.mem 0x158afe76
+37 198092 10240 480 sh3_zsrt139d337_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d337.mem 188 20 1 sh3_zsrt139d337_pal.mem 0x158afe76
+38 198092 10240 480 sh3_zsrt139d338_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d338.mem 170 18 1 sh3_zsrt139d338_pal.mem 0x158afe76
+39 198092 10240 480 sh3_zsrt139d339_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d339.mem 71 7 1 sh3_zsrt139d339_pal.mem 0x158afe76
+40 198092 10240 480 sh3_zsrt139d340_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d340.mem 224 24 1 sh3_zsrt139d340_pal.mem 0x158afe76
+41 198092 10240 480 sh3_zsrt139d341_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d341.mem 143 15 1 sh3_zsrt139d341_pal.mem 0x158afe76
+42 198092 10240 480 sh3_zsrt139d342_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d342.mem 305 33 1 sh3_zsrt139d342_pal.mem 0x158afe76
+43 198092 10240 480 sh3_zsrt139d343_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d343.mem 143 15 1 sh3_zsrt139d343_pal.mem 0x158afe76
+44 198092 10240 480 sh3_zsrt139d344_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d344.mem 71 7 1 sh3_zsrt139d344_pal.mem 0x158afe76
+45 198092 10240 480 sh3_zsrt139d345_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d345.mem 233 25 1 sh3_zsrt139d345_pal.mem 0x158afe76
+46 198092 10240 480 sh3_zsrt139d346_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d346.mem 260 28 1 sh3_zsrt139d346_pal.mem 0x158afe76
+47 198092 10240 480 sh3_zsrt139d347_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d347.mem 350 38 1 sh3_zsrt139d347_pal.mem 0x158afe76
+48 198092 10240 480 sh3_zsrt139d348_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d348.mem 188 20 1 sh3_zsrt139d348_pal.mem 0x158afe76
+49 198092 10240 480 sh3_zsrt139d349_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d349.mem 80 8 1 sh3_zsrt139d349_pal.mem 0x158afe76
+50 198092 10240 480 sh3_zsrt139d350_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d350.mem 251 27 1 sh3_zsrt139d350_pal.mem 0x158afe76
+51 198092 10240 480 sh3_zsrt139d351_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d351.mem 125 13 1 sh3_zsrt139d351_pal.mem 0x158afe76
+52 198092 10240 480 sh3_zsrt139d352_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d352.mem 269 29 1 sh3_zsrt139d352_pal.mem 0x158afe76
+53 198092 10240 480 sh3_zsrt139d353_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d353.mem 179 19 1 sh3_zsrt139d353_pal.mem 0x158afe76
+54 198092 10240 480 sh3_zsrt139d354_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d354.mem 341 37 1 sh3_zsrt139d354_pal.mem 0x158afe76
+55 198092 10240 480 sh3_zsrt139d355_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d355.mem 206 22 1 sh3_zsrt139d355_pal.mem 0x158afe76
+56 198092 10240 480 sh3_zsrt139d356_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d356.mem 179 19 1 sh3_zsrt139d356_pal.mem 0x158afe76
+57 198092 10240 480 sh3_zsrt139d357_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d357.mem 98 10 1 sh3_zsrt139d357_pal.mem 0x158afe76
+58 198092 10240 480 sh3_zsrt139d358_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d358.mem 242 26 1 sh3_zsrt139d358_pal.mem 0x158afe76
+59 198092 10240 480 sh3_zsrt139d359_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d359.mem 80 8 1 sh3_zsrt139d359_pal.mem 0x158afe76
+60 198092 10240 480 sh3_zsrt139d360_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d360.mem 53 5 1 sh3_zsrt139d360_pal.mem 0x158afe76
+61 198092 10240 480 sh3_zsrt139d361_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d361.mem 44 4 1 sh3_zsrt139d361_pal.mem 0x158afe76
+62 198092 10240 480 sh3_zsrt139d362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d362.mem 116 12 1 sh3_zsrt139d362_pal.mem 0x158afe76
+63 198092 10240 480 sh3_zsrt139d363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d363.mem 107 11 1 sh3_zsrt139d363_pal.mem 0x158afe76
+64 198092 10240 480 sh3_zsrt139d364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d364.mem 224 24 1 sh3_zsrt139d364_pal.mem 0x158afe76
+65 198092 10240 480 sh3_zsrt139d365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d365.mem 107 11 1 sh3_zsrt139d365_pal.mem 0x158afe76
+66 198092 10240 480 sh3_zsrt139d366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d366.mem 629 69 1 sh3_zsrt139d366_pal.mem 0x158afe76
+67 198092 10240 480 sh3_zsrt139d367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d367.mem 287 31 1 sh3_zsrt139d367_pal.mem 0x158afe76
+68 198092 10240 480 sh3_zsrt139d368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d368.mem 116 12 1 sh3_zsrt139d368_pal.mem 0x158afe76
+69 198092 10240 480 sh3_zsrt139d369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d369.mem 134 14 1 sh3_zsrt139d369_pal.mem 0x158afe76
+70 198092 10240 480 sh3_zsrt139d370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d370.mem 287 31 1 sh3_zsrt139d370_pal.mem 0x158afe76
+71 198092 10240 480 sh3_zsrt139d371_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d371.mem 224 24 1 sh3_zsrt139d371_pal.mem 0x158afe76
+72 198092 10240 480 sh3_zsrt139d372_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d372.mem 431 47 1 sh3_zsrt139d372_pal.mem 0x158afe76
+73 198092 10240 480 sh3_zsrt139d373_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d373.mem 53 5 1 sh3_zsrt139d373_pal.mem 0x158afe76
+74 198092 10240 480 sh3_zsrt139d374_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d374.mem 53 5 1 sh3_zsrt139d374_pal.mem 0x158afe76
+75 198092 10240 480 sh3_zsrt139d375_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d375.mem 71 7 1 sh3_zsrt139d375_pal.mem 0x158afe76
+76 198092 10240 480 sh3_zsrt139d376_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d376.mem 161 17 1 sh3_zsrt139d376_pal.mem 0x158afe76
+77 198092 10240 480 sh3_zsrt139d377_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d377.mem 206 22 1 sh3_zsrt139d377_pal.mem 0x158afe76
+78 198092 10240 480 sh3_zsrt139d378_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d378.mem 89 9 1 sh3_zsrt139d378_pal.mem 0x158afe76
+79 198092 10240 480 sh3_zsrt139d379_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d379.mem 89 9 1 sh3_zsrt139d379_pal.mem 0x158afe76
+80 198092 10240 480 sh3_zsrt139d380_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d380.mem 143 15 1 sh3_zsrt139d380_pal.mem 0x158afe76
+81 198092 10240 480 sh3_zsrt139d381_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d381.mem 368 40 1 sh3_zsrt139d381_pal.mem 0x158afe76
+82 198092 10240 480 sh3_zsrt139d382_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d382.mem 80 8 1 sh3_zsrt139d382_pal.mem 0x158afe76
+83 198092 10240 480 sh3_zsrt139d383_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d383.mem 152 16 1 sh3_zsrt139d383_pal.mem 0x158afe76
+84 198092 10240 480 sh3_zsrt139d384_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d384.mem 314 34 1 sh3_zsrt139d384_pal.mem 0x158afe76
+85 198092 10240 480 sh3_zsrt139d385_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d385.mem 116 12 1 sh3_zsrt139d385_pal.mem 0x158afe76
+86 198092 10240 480 sh3_zsrt139d386_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d386.mem 179 19 1 sh3_zsrt139d386_pal.mem 0x158afe76
+87 198092 10240 480 sh3_zsrt139d387_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d387.mem 62 6 1 sh3_zsrt139d387_pal.mem 0x158afe76
+88 198092 10240 480 sh3_zsrt139d388_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d388.mem 89 9 1 sh3_zsrt139d388_pal.mem 0x158afe76
+89 198092 10240 480 sh3_zsrt139d389_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d389.mem 278 30 1 sh3_zsrt139d389_pal.mem 0x158afe76
+90 198092 10240 480 sh3_zsrt139d390_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d390.mem 350 38 1 sh3_zsrt139d390_pal.mem 0x158afe76
+91 198092 10240 480 sh3_zsrt139d391_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d391.mem 134 14 1 sh3_zsrt139d391_pal.mem 0x158afe76
+92 198092 10240 480 sh3_zsrt139d392_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d392.mem 332 36 1 sh3_zsrt139d392_pal.mem 0x158afe76
+93 198092 10240 480 sh3_zsrt139d393_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d393.mem 404 44 1 sh3_zsrt139d393_pal.mem 0x158afe76
+94 198092 10240 480 sh3_zsrt139d394_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d394.mem 179 19 1 sh3_zsrt139d394_pal.mem 0x158afe76
+95 198092 10240 480 sh3_zsrt139d395_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d395.mem 107 11 1 sh3_zsrt139d395_pal.mem 0x158afe76
+96 198092 10240 480 sh3_zsrt139d396_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d396.mem 161 17 1 sh3_zsrt139d396_pal.mem 0x158afe76
+97 198092 10240 480 sh3_zsrt139d397_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d397.mem 539 59 1 sh3_zsrt139d397_pal.mem 0x158afe76
+98 198092 10240 480 sh3_zsrt139d398_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d398.mem 143 15 1 sh3_zsrt139d398_pal.mem 0x158afe76
+99 198092 10240 480 sh3_zsrt139d399_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d399.mem 332 36 1 sh3_zsrt139d399_pal.mem 0x158afe76
+100 198092 10240 480 sh3_zsrt139d3100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3100.mem 161 17 1 sh3_zsrt139d3100_pal.mem 0x158afe76
+101 198092 10240 480 sh3_zsrt139d3101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3101.mem 107 11 1 sh3_zsrt139d3101_pal.mem 0x158afe76
+102 198092 10240 480 sh3_zsrt139d3102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3102.mem 368 40 1 sh3_zsrt139d3102_pal.mem 0x158afe76
+103 198092 10240 480 sh3_zsrt139d3103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3103.mem 368 40 1 sh3_zsrt139d3103_pal.mem 0x158afe76
+104 198092 10240 480 sh3_zsrt139d3104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3104.mem 80 8 1 sh3_zsrt139d3104_pal.mem 0x158afe76
+105 198092 10240 480 sh3_zsrt139d3105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3105.mem 62 6 1 sh3_zsrt139d3105_pal.mem 0x158afe76
+106 198092 10240 480 sh3_zsrt139d3106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3106.mem 53 5 1 sh3_zsrt139d3106_pal.mem 0x158afe76
+107 198092 10240 480 sh3_zsrt139d3107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3107.mem 143 15 1 sh3_zsrt139d3107_pal.mem 0x158afe76
+108 198092 10240 480 sh3_zsrt139d3108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3108.mem 107 11 1 sh3_zsrt139d3108_pal.mem 0x158afe76
+109 198092 10240 480 sh3_zsrt139d3109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3109.mem 89 9 1 sh3_zsrt139d3109_pal.mem 0x158afe76
+110 198092 10240 480 sh3_zsrt139d3110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3110.mem 152 16 1 sh3_zsrt139d3110_pal.mem 0x158afe76
+111 198092 10240 480 sh3_zsrt139d3111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3111.mem 314 34 1 sh3_zsrt139d3111_pal.mem 0x158afe76
+112 198092 10240 480 sh3_zsrt139d3112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3112.mem 44 4 1 sh3_zsrt139d3112_pal.mem 0x158afe76
+113 198092 10240 480 sh3_zsrt139d3113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3113.mem 44 4 1 sh3_zsrt139d3113_pal.mem 0x158afe76
+114 198092 10240 480 sh3_zsrt139d3114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3114.mem 62 6 1 sh3_zsrt139d3114_pal.mem 0x158afe76
+115 198092 10240 480 sh3_zsrt139d3115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3115.mem 206 22 1 sh3_zsrt139d3115_pal.mem 0x158afe76
+116 198092 10240 480 sh3_zsrt139d3116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3116.mem 359 39 1 sh3_zsrt139d3116_pal.mem 0x158afe76
+117 198092 10240 480 sh3_zsrt139d3117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3117.mem 215 23 1 sh3_zsrt139d3117_pal.mem 0x158afe76
+118 198092 10240 480 sh3_zsrt139d3118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3118.mem 206 22 1 sh3_zsrt139d3118_pal.mem 0x158afe76
+119 198092 10240 480 sh3_zsrt139d3119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3119.mem 116 12 1 sh3_zsrt139d3119_pal.mem 0x158afe76
+120 198092 10240 480 sh3_zsrt139d3120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3120.mem 638 70 1 sh3_zsrt139d3120_pal.mem 0x158afe76
+121 198092 10240 480 sh3_zsrt139d3121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3121.mem 179 19 1 sh3_zsrt139d3121_pal.mem 0x158afe76
+122 198092 10240 480 sh3_zsrt139d3122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3122.mem 152 16 1 sh3_zsrt139d3122_pal.mem 0x158afe76
+123 198092 10240 480 sh3_zsrt139d3123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3123.mem 368 40 1 sh3_zsrt139d3123_pal.mem 0x158afe76
+124 198092 10240 480 sh3_zsrt139d3124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3124.mem 125 13 1 sh3_zsrt139d3124_pal.mem 0x158afe76
+125 198092 10240 480 sh3_zsrt139d3125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3125.mem 53 5 1 sh3_zsrt139d3125_pal.mem 0x158afe76
+126 198092 10240 480 sh3_zsrt139d3126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3126.mem 71 7 1 sh3_zsrt139d3126_pal.mem 0x158afe76
+127 198092 10240 480 sh3_zsrt139d3127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3127.mem 431 47 1 sh3_zsrt139d3127_pal.mem 0x158afe76
+128 198092 10240 480 sh3_zsrt139d3128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3128.mem 143 15 1 sh3_zsrt139d3128_pal.mem 0x158afe76
+129 198092 10240 480 sh3_zsrt139d3129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3129.mem 125 13 1 sh3_zsrt139d3129_pal.mem 0x158afe76
+130 198092 10240 480 sh3_zsrt139d3130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3130.mem 503 55 1 sh3_zsrt139d3130_pal.mem 0x158afe76
+131 198092 10240 480 sh3_zsrt139d3131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3131.mem 116 12 1 sh3_zsrt139d3131_pal.mem 0x158afe76
+132 198092 10240 480 sh3_zsrt139d3132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3132.mem 62 6 1 sh3_zsrt139d3132_pal.mem 0x158afe76
+133 198092 10240 480 sh3_zsrt139d3133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3133.mem 53 5 1 sh3_zsrt139d3133_pal.mem 0x158afe76
+134 198092 10240 480 sh3_zsrt139d3134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3134.mem 188 20 1 sh3_zsrt139d3134_pal.mem 0x158afe76
+135 198092 10240 480 sh3_zsrt139d3135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3135.mem 251 27 1 sh3_zsrt139d3135_pal.mem 0x158afe76
+136 198092 10240 480 sh3_zsrt139d3136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3136.mem 89 9 1 sh3_zsrt139d3136_pal.mem 0x158afe76
+137 198092 10240 480 sh3_zsrt139d3137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3137.mem 71 7 1 sh3_zsrt139d3137_pal.mem 0x158afe76
+138 198092 10240 480 sh3_zsrt139d3138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3138.mem 71 7 1 sh3_zsrt139d3138_pal.mem 0x158afe76
+139 198092 10240 480 sh3_zsrt139d3139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3139.mem 80 8 1 sh3_zsrt139d3139_pal.mem 0x158afe76
+140 198092 10240 480 sh3_zsrt139d3140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3140.mem 179 19 1 sh3_zsrt139d3140_pal.mem 0x158afe76
+141 198092 10240 480 sh3_zsrt139d3141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3141.mem 251 27 1 sh3_zsrt139d3141_pal.mem 0x158afe76
+142 198092 10240 480 sh3_zsrt139d3142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3142.mem 161 17 1 sh3_zsrt139d3142_pal.mem 0x158afe76
+143 198092 10240 480 sh3_zsrt139d3143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3143.mem 161 17 1 sh3_zsrt139d3143_pal.mem 0x158afe76
+144 198092 10240 480 sh3_zsrt139d3144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3144.mem 71 7 1 sh3_zsrt139d3144_pal.mem 0x158afe76
+145 198092 10240 480 sh3_zsrt139d3145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3145.mem 71 7 1 sh3_zsrt139d3145_pal.mem 0x158afe76
+146 198092 10240 480 sh3_zsrt139d3146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3146.mem 80 8 1 sh3_zsrt139d3146_pal.mem 0x158afe76
+147 198092 10240 480 sh3_zsrt139d3147_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3147.mem 125 13 1 sh3_zsrt139d3147_pal.mem 0x158afe76
+148 198092 10240 480 sh3_zsrt139d3148_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3148.mem 251 27 1 sh3_zsrt139d3148_pal.mem 0x158afe76
+149 198092 10240 480 sh3_zsrt139d3149_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3149.mem 80 8 1 sh3_zsrt139d3149_pal.mem 0x158afe76
+150 198092 10240 480 sh3_zsrt139d3150_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3150.mem 62 6 1 sh3_zsrt139d3150_pal.mem 0x158afe76
+151 198092 10240 480 sh3_zsrt139d3151_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3151.mem 44 4 1 sh3_zsrt139d3151_pal.mem 0x158afe76
+152 198092 10240 480 sh3_zsrt139d3152_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3152.mem 44 4 1 sh3_zsrt139d3152_pal.mem 0x158afe76
+153 198092 10240 480 sh3_zsrt139d3153_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3153.mem 35 3 1 sh3_zsrt139d3153_pal.mem 0x158afe76
+154 198092 10240 480 sh3_zsrt139d3154_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3154.mem 35 3 1 sh3_zsrt139d3154_pal.mem 0x158afe76
+155 198092 10240 480 sh3_zsrt139d3155_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3155.mem 35 3 1 sh3_zsrt139d3155_pal.mem 0x158afe76
+156 198092 10240 480 sh3_zsrt139d3156_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3156.mem 53 5 1 sh3_zsrt139d3156_pal.mem 0x158afe76
+157 198092 10240 480 sh3_zsrt139d3157_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3157.mem 107 11 1 sh3_zsrt139d3157_pal.mem 0x158afe76
+158 198092 10240 480 sh3_zsrt139d3158_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3158.mem 71 7 1 sh3_zsrt139d3158_pal.mem 0x158afe76
+159 198092 10240 480 sh3_zsrt139d3159_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3159.mem 71 7 1 sh3_zsrt139d3159_pal.mem 0x158afe76
+160 198092 10240 480 sh3_zsrt139d3160_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3160.mem 98 10 1 sh3_zsrt139d3160_pal.mem 0x158afe76
+161 198092 10240 480 sh3_zsrt139d3161_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3161.mem 215 23 1 sh3_zsrt139d3161_pal.mem 0x158afe76
+162 198092 10240 480 sh3_zsrt139d3162_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3162.mem 521 57 1 sh3_zsrt139d3162_pal.mem 0x158afe76
+163 198092 10240 480 sh3_zsrt139d3163_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3163.mem 701 77 1 sh3_zsrt139d3163_pal.mem 0x158afe76
+164 198092 10240 480 sh3_zsrt139d3164_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3164.mem 80 8 1 sh3_zsrt139d3164_pal.mem 0x158afe76
+165 198092 10240 480 sh3_zsrt139d3165_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3165.mem 125 13 1 sh3_zsrt139d3165_pal.mem 0x158afe76
+166 198092 10240 480 sh3_zsrt139d3166_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3166.mem 287 31 1 sh3_zsrt139d3166_pal.mem 0x158afe76
+167 198092 10240 480 sh3_zsrt139d3167_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3167.mem 107 11 1 sh3_zsrt139d3167_pal.mem 0x158afe76
+168 198092 10240 480 sh3_zsrt139d3168_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3168.mem 89 9 1 sh3_zsrt139d3168_pal.mem 0x158afe76
+169 198092 10240 480 sh3_zsrt139d3169_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3169.mem 161 17 1 sh3_zsrt139d3169_pal.mem 0x158afe76
+170 198092 10240 480 sh3_zsrt139d3170_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3170.mem 125 13 1 sh3_zsrt139d3170_pal.mem 0x158afe76
+171 198092 10240 480 sh3_zsrt139d3171_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3171.mem 80 8 1 sh3_zsrt139d3171_pal.mem 0x158afe76
+172 198092 10240 480 sh3_zsrt139d3172_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3172.mem 53 5 1 sh3_zsrt139d3172_pal.mem 0x158afe76
+173 198092 10240 480 sh3_zsrt139d3173_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3173.mem 53 5 1 sh3_zsrt139d3173_pal.mem 0x158afe76
+174 198092 10240 480 sh3_zsrt139d3174_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3174.mem 62 6 1 sh3_zsrt139d3174_pal.mem 0x158afe76
+175 198092 10240 480 sh3_zsrt139d3175_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3175.mem 98 10 1 sh3_zsrt139d3175_pal.mem 0x158afe76
+176 198092 10240 480 sh3_zsrt139d3176_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3176.mem 170 18 1 sh3_zsrt139d3176_pal.mem 0x158afe76
+177 198092 10240 480 sh3_zsrt139d3177_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3177.mem 341 37 1 sh3_zsrt139d3177_pal.mem 0x158afe76
+178 198092 10240 480 sh3_zsrt139d3178_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3178.mem 242 26 1 sh3_zsrt139d3178_pal.mem 0x158afe76
+179 198092 10240 480 sh3_zsrt139d3179_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3179.mem 53 5 1 sh3_zsrt139d3179_pal.mem 0x158afe76
+180 198092 10240 480 sh3_zsrt139d3180_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3180.mem 35 3 1 sh3_zsrt139d3180_pal.mem 0x158afe76
+181 198092 10240 480 sh3_zsrt139d3181_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3181.mem 35 3 1 sh3_zsrt139d3181_pal.mem 0x158afe76
+182 198092 10240 480 sh3_zsrt139d3182_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3182.mem 35 3 1 sh3_zsrt139d3182_pal.mem 0x158afe76
+183 198092 10240 480 sh3_zsrt139d3183_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3183.mem 35 3 1 sh3_zsrt139d3183_pal.mem 0x158afe76
+184 198092 10240 480 sh3_zsrt139d3184_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3184.mem 44 4 1 sh3_zsrt139d3184_pal.mem 0x158afe76
+185 198092 10240 480 sh3_zsrt139d3185_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3185.mem 62 6 1 sh3_zsrt139d3185_pal.mem 0x158afe76
+186 198092 10240 480 sh3_zsrt139d3186_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d3186.mem 98 10 1 sh3_zsrt139d3186_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139d4_epochs.txt

@@ -0,0 +1,477 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139c4', 'zsrt139d3']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 474 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 5328 11264 480 sh3_zsrt139d40_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139d40.mem 494 54 0 sh3_zsrt139d40_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139d41_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d41.mem 1061 117 0 sh3_zsrt139d41_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139d42_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d42.mem 530 58 1 sh3_zsrt139d42_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139d43_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139d43.mem 782 86 0 sh3_zsrt139d43_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139d44_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d44.mem 1232 136 0 sh3_zsrt139d44_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139d45_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d45.mem 1232 136 1 sh3_zsrt139d45_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139d46_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d46.mem 764 84 1 sh3_zsrt139d46_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139d47_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d47.mem 1232 136 1 sh3_zsrt139d47_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139d48_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d48.mem 710 78 1 sh3_zsrt139d48_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139d49_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d49.mem 1232 136 1 sh3_zsrt139d49_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139d410_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d410.mem 1232 136 1 sh3_zsrt139d410_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139d411_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d411.mem 953 105 1 sh3_zsrt139d411_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139d412_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d412.mem 1232 136 1 sh3_zsrt139d412_pal.mem 0x5cbf8bb4
+13 21005 11264 480 sh3_zsrt139d413_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d413.mem 1097 121 1 sh3_zsrt139d413_pal.mem 0x5cbf8bb4
+14 21599 11264 480 sh3_zsrt139d414_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d414.mem 170 18 1 sh3_zsrt139d414_pal.mem 0x5cbf8bb4
+15 26066 11264 480 sh3_zsrt139d415_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d415.mem 62 6 0 sh3_zsrt139d415_pal.mem 0x44679578
+16 30859 10240 480 sh3_zsrt139d416_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d416.mem 620 68 0 sh3_zsrt139d416_pal.mem 0x47405cb0
+17 31075 13824 480 sh3_zsrt139d417_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139d417.mem 620 68 0 sh3_zsrt139d417_pal.mem 0x566e7c38
+18 77112 10240 480 sh3_zsrt139d418_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d418.mem 620 68 0 sh3_zsrt139d418_pal.mem 0x43ece1ae
+19 89164 9216 480 sh3_zsrt139d419_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139d419.mem 620 68 0 sh3_zsrt139d419_pal.mem 0x5dfce0a2
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+447 198092 10240 480 sh3_zsrt139d4447_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4447.mem 98 10 1 sh3_zsrt139d4447_pal.mem 0x158afe76
+448 198092 10240 480 sh3_zsrt139d4448_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4448.mem 215 23 1 sh3_zsrt139d4448_pal.mem 0x158afe76
+449 198092 10240 480 sh3_zsrt139d4449_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4449.mem 521 57 1 sh3_zsrt139d4449_pal.mem 0x158afe76
+450 198092 10240 480 sh3_zsrt139d4450_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4450.mem 701 77 1 sh3_zsrt139d4450_pal.mem 0x158afe76
+451 198092 10240 480 sh3_zsrt139d4451_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4451.mem 80 8 1 sh3_zsrt139d4451_pal.mem 0x158afe76
+452 198092 10240 480 sh3_zsrt139d4452_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4452.mem 125 13 1 sh3_zsrt139d4452_pal.mem 0x158afe76
+453 198092 10240 480 sh3_zsrt139d4453_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4453.mem 287 31 1 sh3_zsrt139d4453_pal.mem 0x158afe76
+454 198092 10240 480 sh3_zsrt139d4454_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4454.mem 107 11 1 sh3_zsrt139d4454_pal.mem 0x158afe76
+455 198092 10240 480 sh3_zsrt139d4455_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4455.mem 89 9 1 sh3_zsrt139d4455_pal.mem 0x158afe76
+456 198092 10240 480 sh3_zsrt139d4456_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4456.mem 161 17 1 sh3_zsrt139d4456_pal.mem 0x158afe76
+457 198092 10240 480 sh3_zsrt139d4457_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4457.mem 125 13 1 sh3_zsrt139d4457_pal.mem 0x158afe76
+458 198092 10240 480 sh3_zsrt139d4458_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4458.mem 80 8 1 sh3_zsrt139d4458_pal.mem 0x158afe76
+459 198092 10240 480 sh3_zsrt139d4459_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4459.mem 53 5 1 sh3_zsrt139d4459_pal.mem 0x158afe76
+460 198092 10240 480 sh3_zsrt139d4460_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4460.mem 53 5 1 sh3_zsrt139d4460_pal.mem 0x158afe76
+461 198092 10240 480 sh3_zsrt139d4461_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4461.mem 62 6 1 sh3_zsrt139d4461_pal.mem 0x158afe76
+462 198092 10240 480 sh3_zsrt139d4462_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4462.mem 98 10 1 sh3_zsrt139d4462_pal.mem 0x158afe76
+463 198092 10240 480 sh3_zsrt139d4463_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4463.mem 170 18 1 sh3_zsrt139d4463_pal.mem 0x158afe76
+464 198092 10240 480 sh3_zsrt139d4464_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4464.mem 341 37 1 sh3_zsrt139d4464_pal.mem 0x158afe76
+465 198092 10240 480 sh3_zsrt139d4465_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4465.mem 242 26 1 sh3_zsrt139d4465_pal.mem 0x158afe76
+466 198092 10240 480 sh3_zsrt139d4466_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4466.mem 53 5 1 sh3_zsrt139d4466_pal.mem 0x158afe76
+467 198092 10240 480 sh3_zsrt139d4467_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4467.mem 35 3 1 sh3_zsrt139d4467_pal.mem 0x158afe76
+468 198092 10240 480 sh3_zsrt139d4468_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4468.mem 35 3 1 sh3_zsrt139d4468_pal.mem 0x158afe76
+469 198092 10240 480 sh3_zsrt139d4469_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4469.mem 35 3 1 sh3_zsrt139d4469_pal.mem 0x158afe76
+470 198092 10240 480 sh3_zsrt139d4470_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4470.mem 35 3 1 sh3_zsrt139d4470_pal.mem 0x158afe76
+471 198092 10240 480 sh3_zsrt139d4471_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4471.mem 44 4 1 sh3_zsrt139d4471_pal.mem 0x158afe76
+472 198092 10240 480 sh3_zsrt139d4472_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4472.mem 62 6 1 sh3_zsrt139d4472_pal.mem 0x158afe76
+473 198092 10240 480 sh3_zsrt139d4473_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d4473.mem 98 10 1 sh3_zsrt139d4473_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139d5_epochs.txt

@@ -0,0 +1,153 @@
+# Ch407 epoch descriptor table (147 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 147 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 198075 10240 480 sh3_zsrt139d50_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d50.mem 485 53 0 sh3_zsrt139d50_pal.mem 0x158afe76
+1 198092 10240 480 sh3_zsrt139d51_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d51.mem 665 73 1 sh3_zsrt139d51_pal.mem 0x158afe76
+2 198092 10240 480 sh3_zsrt139d52_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d52.mem 215 23 1 sh3_zsrt139d52_pal.mem 0x158afe76
+3 198092 10240 480 sh3_zsrt139d53_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d53.mem 458 50 1 sh3_zsrt139d53_pal.mem 0x158afe76
+4 198092 10240 480 sh3_zsrt139d54_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d54.mem 431 47 1 sh3_zsrt139d54_pal.mem 0x158afe76
+5 198092 10240 480 sh3_zsrt139d55_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d55.mem 395 43 1 sh3_zsrt139d55_pal.mem 0x158afe76
+6 198092 10240 480 sh3_zsrt139d56_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d56.mem 206 22 1 sh3_zsrt139d56_pal.mem 0x158afe76
+7 198092 10240 480 sh3_zsrt139d57_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d57.mem 170 18 1 sh3_zsrt139d57_pal.mem 0x158afe76
+8 198092 10240 480 sh3_zsrt139d58_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d58.mem 242 26 1 sh3_zsrt139d58_pal.mem 0x158afe76
+9 198092 10240 480 sh3_zsrt139d59_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d59.mem 359 39 1 sh3_zsrt139d59_pal.mem 0x158afe76
+10 198092 10240 480 sh3_zsrt139d510_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d510.mem 323 35 1 sh3_zsrt139d510_pal.mem 0x158afe76
+11 198092 10240 480 sh3_zsrt139d511_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d511.mem 215 23 1 sh3_zsrt139d511_pal.mem 0x158afe76
+12 198092 10240 480 sh3_zsrt139d512_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d512.mem 314 34 1 sh3_zsrt139d512_pal.mem 0x158afe76
+13 198092 10240 480 sh3_zsrt139d513_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d513.mem 278 30 1 sh3_zsrt139d513_pal.mem 0x158afe76
+14 198092 10240 480 sh3_zsrt139d514_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d514.mem 116 12 1 sh3_zsrt139d514_pal.mem 0x158afe76
+15 198092 10240 480 sh3_zsrt139d515_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d515.mem 197 21 1 sh3_zsrt139d515_pal.mem 0x158afe76
+16 198092 10240 480 sh3_zsrt139d516_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d516.mem 458 50 1 sh3_zsrt139d516_pal.mem 0x158afe76
+17 198092 10240 480 sh3_zsrt139d517_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d517.mem 269 29 1 sh3_zsrt139d517_pal.mem 0x158afe76
+18 198092 10240 480 sh3_zsrt139d518_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d518.mem 206 22 1 sh3_zsrt139d518_pal.mem 0x158afe76
+19 198092 10240 480 sh3_zsrt139d519_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d519.mem 323 35 1 sh3_zsrt139d519_pal.mem 0x158afe76
+20 198092 10240 480 sh3_zsrt139d520_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d520.mem 494 54 1 sh3_zsrt139d520_pal.mem 0x158afe76
+21 198092 10240 480 sh3_zsrt139d521_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d521.mem 566 62 1 sh3_zsrt139d521_pal.mem 0x158afe76
+22 198092 10240 480 sh3_zsrt139d522_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d522.mem 287 31 1 sh3_zsrt139d522_pal.mem 0x158afe76
+23 198092 10240 480 sh3_zsrt139d523_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d523.mem 260 28 1 sh3_zsrt139d523_pal.mem 0x158afe76
+24 198092 10240 480 sh3_zsrt139d524_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d524.mem 89 9 1 sh3_zsrt139d524_pal.mem 0x158afe76
+25 198092 10240 480 sh3_zsrt139d525_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d525.mem 359 39 1 sh3_zsrt139d525_pal.mem 0x158afe76
+26 198092 10240 480 sh3_zsrt139d526_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d526.mem 539 59 1 sh3_zsrt139d526_pal.mem 0x158afe76
+27 198092 10240 480 sh3_zsrt139d527_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d527.mem 323 35 1 sh3_zsrt139d527_pal.mem 0x158afe76
+28 198092 10240 480 sh3_zsrt139d528_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d528.mem 179 19 1 sh3_zsrt139d528_pal.mem 0x158afe76
+29 198092 10240 480 sh3_zsrt139d529_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d529.mem 494 54 1 sh3_zsrt139d529_pal.mem 0x158afe76
+30 198092 10240 480 sh3_zsrt139d530_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d530.mem 431 47 1 sh3_zsrt139d530_pal.mem 0x158afe76
+31 198092 10240 480 sh3_zsrt139d531_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d531.mem 107 11 1 sh3_zsrt139d531_pal.mem 0x158afe76
+32 198092 10240 480 sh3_zsrt139d532_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d532.mem 278 30 1 sh3_zsrt139d532_pal.mem 0x158afe76
+33 198092 10240 480 sh3_zsrt139d533_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d533.mem 413 45 1 sh3_zsrt139d533_pal.mem 0x158afe76
+34 198092 10240 480 sh3_zsrt139d534_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d534.mem 98 10 1 sh3_zsrt139d534_pal.mem 0x158afe76
+35 198092 10240 480 sh3_zsrt139d535_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d535.mem 278 30 1 sh3_zsrt139d535_pal.mem 0x158afe76
+36 198092 10240 480 sh3_zsrt139d536_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d536.mem 62 6 1 sh3_zsrt139d536_pal.mem 0x158afe76
+37 198092 10240 480 sh3_zsrt139d537_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d537.mem 98 10 1 sh3_zsrt139d537_pal.mem 0x158afe76
+38 198092 10240 480 sh3_zsrt139d538_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d538.mem 251 27 1 sh3_zsrt139d538_pal.mem 0x158afe76
+39 198092 10240 480 sh3_zsrt139d539_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d539.mem 215 23 1 sh3_zsrt139d539_pal.mem 0x158afe76
+40 198092 10240 480 sh3_zsrt139d540_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d540.mem 215 23 1 sh3_zsrt139d540_pal.mem 0x158afe76
+41 198092 10240 480 sh3_zsrt139d541_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d541.mem 107 11 1 sh3_zsrt139d541_pal.mem 0x158afe76
+42 198092 10240 480 sh3_zsrt139d542_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d542.mem 152 16 1 sh3_zsrt139d542_pal.mem 0x158afe76
+43 198092 10240 480 sh3_zsrt139d543_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d543.mem 278 30 1 sh3_zsrt139d543_pal.mem 0x158afe76
+44 198092 10240 480 sh3_zsrt139d544_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d544.mem 503 55 1 sh3_zsrt139d544_pal.mem 0x158afe76
+45 198092 10240 480 sh3_zsrt139d545_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d545.mem 62 6 1 sh3_zsrt139d545_pal.mem 0x158afe76
+46 198092 10240 480 sh3_zsrt139d546_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d546.mem 98 10 1 sh3_zsrt139d546_pal.mem 0x158afe76
+47 198092 10240 480 sh3_zsrt139d547_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d547.mem 260 28 1 sh3_zsrt139d547_pal.mem 0x158afe76
+48 198092 10240 480 sh3_zsrt139d548_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d548.mem 116 12 1 sh3_zsrt139d548_pal.mem 0x158afe76
+49 198092 10240 480 sh3_zsrt139d549_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d549.mem 323 35 1 sh3_zsrt139d549_pal.mem 0x158afe76
+50 198092 10240 480 sh3_zsrt139d550_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d550.mem 242 26 1 sh3_zsrt139d550_pal.mem 0x158afe76
+51 198092 10240 480 sh3_zsrt139d551_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d551.mem 233 25 1 sh3_zsrt139d551_pal.mem 0x158afe76
+52 198092 10240 480 sh3_zsrt139d552_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d552.mem 233 25 1 sh3_zsrt139d552_pal.mem 0x158afe76
+53 198092 10240 480 sh3_zsrt139d553_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d553.mem 152 16 1 sh3_zsrt139d553_pal.mem 0x158afe76
+54 198092 10240 480 sh3_zsrt139d554_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d554.mem 449 49 1 sh3_zsrt139d554_pal.mem 0x158afe76
+55 198092 10240 480 sh3_zsrt139d555_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d555.mem 125 13 1 sh3_zsrt139d555_pal.mem 0x158afe76
+56 198092 10240 480 sh3_zsrt139d556_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d556.mem 62 6 1 sh3_zsrt139d556_pal.mem 0x158afe76
+57 198092 10240 480 sh3_zsrt139d557_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d557.mem 53 5 1 sh3_zsrt139d557_pal.mem 0x158afe76
+58 198092 10240 480 sh3_zsrt139d558_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d558.mem 125 13 1 sh3_zsrt139d558_pal.mem 0x158afe76
+59 198092 10240 480 sh3_zsrt139d559_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d559.mem 125 13 1 sh3_zsrt139d559_pal.mem 0x158afe76
+60 198092 10240 480 sh3_zsrt139d560_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d560.mem 377 41 1 sh3_zsrt139d560_pal.mem 0x158afe76
+61 198092 10240 480 sh3_zsrt139d561_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d561.mem 512 56 1 sh3_zsrt139d561_pal.mem 0x158afe76
+62 198092 10240 480 sh3_zsrt139d562_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d562.mem 539 59 1 sh3_zsrt139d562_pal.mem 0x158afe76
+63 198092 10240 480 sh3_zsrt139d563_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d563.mem 53 5 1 sh3_zsrt139d563_pal.mem 0x158afe76
+64 198092 10240 480 sh3_zsrt139d564_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d564.mem 53 5 1 sh3_zsrt139d564_pal.mem 0x158afe76
+65 198092 10240 480 sh3_zsrt139d565_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d565.mem 71 7 1 sh3_zsrt139d565_pal.mem 0x158afe76
+66 198092 10240 480 sh3_zsrt139d566_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d566.mem 161 17 1 sh3_zsrt139d566_pal.mem 0x158afe76
+67 198092 10240 480 sh3_zsrt139d567_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d567.mem 206 22 1 sh3_zsrt139d567_pal.mem 0x158afe76
+68 198092 10240 480 sh3_zsrt139d568_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d568.mem 89 9 1 sh3_zsrt139d568_pal.mem 0x158afe76
+69 198092 10240 480 sh3_zsrt139d569_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d569.mem 89 9 1 sh3_zsrt139d569_pal.mem 0x158afe76
+70 198092 10240 480 sh3_zsrt139d570_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d570.mem 143 15 1 sh3_zsrt139d570_pal.mem 0x158afe76
+71 198092 10240 480 sh3_zsrt139d571_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d571.mem 368 40 1 sh3_zsrt139d571_pal.mem 0x158afe76
+72 198092 10240 480 sh3_zsrt139d572_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d572.mem 80 8 1 sh3_zsrt139d572_pal.mem 0x158afe76
+73 198092 10240 480 sh3_zsrt139d573_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d573.mem 152 16 1 sh3_zsrt139d573_pal.mem 0x158afe76
+74 198092 10240 480 sh3_zsrt139d574_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d574.mem 314 34 1 sh3_zsrt139d574_pal.mem 0x158afe76
+75 198092 10240 480 sh3_zsrt139d575_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d575.mem 116 12 1 sh3_zsrt139d575_pal.mem 0x158afe76
+76 198092 10240 480 sh3_zsrt139d576_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d576.mem 197 21 1 sh3_zsrt139d576_pal.mem 0x158afe76
+77 198092 10240 480 sh3_zsrt139d577_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d577.mem 143 15 1 sh3_zsrt139d577_pal.mem 0x158afe76
+78 198092 10240 480 sh3_zsrt139d578_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d578.mem 503 55 1 sh3_zsrt139d578_pal.mem 0x158afe76
+79 198092 10240 480 sh3_zsrt139d579_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d579.mem 449 49 1 sh3_zsrt139d579_pal.mem 0x158afe76
+80 198092 10240 480 sh3_zsrt139d580_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d580.mem 395 43 1 sh3_zsrt139d580_pal.mem 0x158afe76
+81 198092 10240 480 sh3_zsrt139d581_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d581.mem 413 45 1 sh3_zsrt139d581_pal.mem 0x158afe76
+82 198092 10240 480 sh3_zsrt139d582_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d582.mem 449 49 1 sh3_zsrt139d582_pal.mem 0x158afe76
+83 198092 10240 480 sh3_zsrt139d583_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d583.mem 584 64 1 sh3_zsrt139d583_pal.mem 0x158afe76
+84 198092 10240 480 sh3_zsrt139d584_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d584.mem 125 13 1 sh3_zsrt139d584_pal.mem 0x158afe76
+85 198092 10240 480 sh3_zsrt139d585_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d585.mem 80 8 1 sh3_zsrt139d585_pal.mem 0x158afe76
+86 198092 10240 480 sh3_zsrt139d586_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d586.mem 152 16 1 sh3_zsrt139d586_pal.mem 0x158afe76
+87 198092 10240 480 sh3_zsrt139d587_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d587.mem 107 11 1 sh3_zsrt139d587_pal.mem 0x158afe76
+88 198092 10240 480 sh3_zsrt139d588_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d588.mem 98 10 1 sh3_zsrt139d588_pal.mem 0x158afe76
+89 198092 10240 480 sh3_zsrt139d589_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d589.mem 152 16 1 sh3_zsrt139d589_pal.mem 0x158afe76
+90 198092 10240 480 sh3_zsrt139d590_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d590.mem 314 34 1 sh3_zsrt139d590_pal.mem 0x158afe76
+91 198092 10240 480 sh3_zsrt139d591_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d591.mem 53 5 1 sh3_zsrt139d591_pal.mem 0x158afe76
+92 198092 10240 480 sh3_zsrt139d592_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d592.mem 62 6 1 sh3_zsrt139d592_pal.mem 0x158afe76
+93 198092 10240 480 sh3_zsrt139d593_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d593.mem 152 16 1 sh3_zsrt139d593_pal.mem 0x158afe76
+94 198092 10240 480 sh3_zsrt139d594_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d594.mem 197 21 1 sh3_zsrt139d594_pal.mem 0x158afe76
+95 198092 10240 480 sh3_zsrt139d595_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d595.mem 287 31 1 sh3_zsrt139d595_pal.mem 0x158afe76
+96 198092 10240 480 sh3_zsrt139d596_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d596.mem 566 62 1 sh3_zsrt139d596_pal.mem 0x158afe76
+97 198092 10240 480 sh3_zsrt139d597_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d597.mem 980 108 1 sh3_zsrt139d597_pal.mem 0x158afe76
+98 198092 10240 480 sh3_zsrt139d598_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d598.mem 107 11 1 sh3_zsrt139d598_pal.mem 0x158afe76
+99 198092 10240 480 sh3_zsrt139d599_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d599.mem 602 66 1 sh3_zsrt139d599_pal.mem 0x158afe76
+100 198092 10240 480 sh3_zsrt139d5100_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5100.mem 377 41 1 sh3_zsrt139d5100_pal.mem 0x158afe76
+101 198092 10240 480 sh3_zsrt139d5101_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5101.mem 89 9 1 sh3_zsrt139d5101_pal.mem 0x158afe76
+102 198092 10240 480 sh3_zsrt139d5102_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5102.mem 152 16 1 sh3_zsrt139d5102_pal.mem 0x158afe76
+103 198092 10240 480 sh3_zsrt139d5103_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5103.mem 305 33 1 sh3_zsrt139d5103_pal.mem 0x158afe76
+104 198092 10240 480 sh3_zsrt139d5104_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5104.mem 98 10 1 sh3_zsrt139d5104_pal.mem 0x158afe76
+105 198092 10240 480 sh3_zsrt139d5105_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5105.mem 71 7 1 sh3_zsrt139d5105_pal.mem 0x158afe76
+106 198092 10240 480 sh3_zsrt139d5106_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5106.mem 71 7 1 sh3_zsrt139d5106_pal.mem 0x158afe76
+107 198092 10240 480 sh3_zsrt139d5107_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5107.mem 80 8 1 sh3_zsrt139d5107_pal.mem 0x158afe76
+108 198092 10240 480 sh3_zsrt139d5108_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5108.mem 179 19 1 sh3_zsrt139d5108_pal.mem 0x158afe76
+109 198092 10240 480 sh3_zsrt139d5109_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5109.mem 251 27 1 sh3_zsrt139d5109_pal.mem 0x158afe76
+110 198092 10240 480 sh3_zsrt139d5110_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5110.mem 278 30 1 sh3_zsrt139d5110_pal.mem 0x158afe76
+111 198092 10240 480 sh3_zsrt139d5111_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5111.mem 125 13 1 sh3_zsrt139d5111_pal.mem 0x158afe76
+112 198092 10240 480 sh3_zsrt139d5112_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5112.mem 251 27 1 sh3_zsrt139d5112_pal.mem 0x158afe76
+113 198092 10240 480 sh3_zsrt139d5113_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5113.mem 449 49 1 sh3_zsrt139d5113_pal.mem 0x158afe76
+114 198092 10240 480 sh3_zsrt139d5114_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5114.mem 125 13 1 sh3_zsrt139d5114_pal.mem 0x158afe76
+115 198092 10240 480 sh3_zsrt139d5115_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5115.mem 71 7 1 sh3_zsrt139d5115_pal.mem 0x158afe76
+116 198092 10240 480 sh3_zsrt139d5116_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5116.mem 53 5 1 sh3_zsrt139d5116_pal.mem 0x158afe76
+117 198092 10240 480 sh3_zsrt139d5117_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5117.mem 53 5 1 sh3_zsrt139d5117_pal.mem 0x158afe76
+118 198092 10240 480 sh3_zsrt139d5118_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5118.mem 44 4 1 sh3_zsrt139d5118_pal.mem 0x158afe76
+119 198092 10240 480 sh3_zsrt139d5119_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5119.mem 44 4 1 sh3_zsrt139d5119_pal.mem 0x158afe76
+120 198092 10240 480 sh3_zsrt139d5120_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5120.mem 98 10 1 sh3_zsrt139d5120_pal.mem 0x158afe76
+121 198092 10240 480 sh3_zsrt139d5121_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5121.mem 80 8 1 sh3_zsrt139d5121_pal.mem 0x158afe76
+122 198092 10240 480 sh3_zsrt139d5122_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5122.mem 62 6 1 sh3_zsrt139d5122_pal.mem 0x158afe76
+123 198092 10240 480 sh3_zsrt139d5123_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5123.mem 80 8 1 sh3_zsrt139d5123_pal.mem 0x158afe76
+124 198092 10240 480 sh3_zsrt139d5124_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5124.mem 107 11 1 sh3_zsrt139d5124_pal.mem 0x158afe76
+125 198092 10240 480 sh3_zsrt139d5125_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5125.mem 206 22 1 sh3_zsrt139d5125_pal.mem 0x158afe76
+126 198092 10240 480 sh3_zsrt139d5126_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5126.mem 719 79 1 sh3_zsrt139d5126_pal.mem 0x158afe76
+127 198092 10240 480 sh3_zsrt139d5127_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5127.mem 494 54 1 sh3_zsrt139d5127_pal.mem 0x158afe76
+128 198092 10240 480 sh3_zsrt139d5128_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5128.mem 89 9 1 sh3_zsrt139d5128_pal.mem 0x158afe76
+129 198092 10240 480 sh3_zsrt139d5129_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5129.mem 179 19 1 sh3_zsrt139d5129_pal.mem 0x158afe76
+130 198092 10240 480 sh3_zsrt139d5130_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5130.mem 242 26 1 sh3_zsrt139d5130_pal.mem 0x158afe76
+131 198092 10240 480 sh3_zsrt139d5131_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5131.mem 89 9 1 sh3_zsrt139d5131_pal.mem 0x158afe76
+132 198092 10240 480 sh3_zsrt139d5132_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5132.mem 80 8 1 sh3_zsrt139d5132_pal.mem 0x158afe76
+133 198092 10240 480 sh3_zsrt139d5133_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5133.mem 170 18 1 sh3_zsrt139d5133_pal.mem 0x158afe76
+134 198092 10240 480 sh3_zsrt139d5134_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5134.mem 143 15 1 sh3_zsrt139d5134_pal.mem 0x158afe76
+135 198092 10240 480 sh3_zsrt139d5135_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5135.mem 80 8 1 sh3_zsrt139d5135_pal.mem 0x158afe76
+136 198092 10240 480 sh3_zsrt139d5136_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5136.mem 62 6 1 sh3_zsrt139d5136_pal.mem 0x158afe76
+137 198092 10240 480 sh3_zsrt139d5137_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5137.mem 125 13 1 sh3_zsrt139d5137_pal.mem 0x158afe76
+138 198092 10240 480 sh3_zsrt139d5138_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5138.mem 197 21 1 sh3_zsrt139d5138_pal.mem 0x158afe76
+139 198092 10240 480 sh3_zsrt139d5139_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5139.mem 188 20 1 sh3_zsrt139d5139_pal.mem 0x158afe76
+140 198092 10240 480 sh3_zsrt139d5140_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5140.mem 62 6 1 sh3_zsrt139d5140_pal.mem 0x158afe76
+141 198092 10240 480 sh3_zsrt139d5141_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5141.mem 44 4 1 sh3_zsrt139d5141_pal.mem 0x158afe76
+142 198092 10240 480 sh3_zsrt139d5142_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5142.mem 44 4 1 sh3_zsrt139d5142_pal.mem 0x158afe76
+143 198092 10240 480 sh3_zsrt139d5143_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5143.mem 35 3 1 sh3_zsrt139d5143_pal.mem 0x158afe76
+144 198092 10240 480 sh3_zsrt139d5144_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5144.mem 44 4 1 sh3_zsrt139d5144_pal.mem 0x158afe76
+145 198092 10240 480 sh3_zsrt139d5145_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5145.mem 62 6 1 sh3_zsrt139d5145_pal.mem 0x158afe76
+146 198092 10240 480 sh3_zsrt139d5146_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d5146.mem 98 10 1 sh3_zsrt139d5146_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139d6_epochs.txt

@@ -0,0 +1,437 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139c4', 'zsrt139d5']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 434 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 5328 11264 480 sh3_zsrt139d60_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139d60.mem 494 54 0 sh3_zsrt139d60_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139d61_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d61.mem 1061 117 0 sh3_zsrt139d61_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139d62_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d62.mem 530 58 1 sh3_zsrt139d62_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139d63_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139d63.mem 782 86 0 sh3_zsrt139d63_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139d64_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d64.mem 1232 136 0 sh3_zsrt139d64_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139d65_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d65.mem 1232 136 1 sh3_zsrt139d65_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139d66_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d66.mem 764 84 1 sh3_zsrt139d66_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139d67_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d67.mem 1232 136 1 sh3_zsrt139d67_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139d68_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d68.mem 710 78 1 sh3_zsrt139d68_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139d69_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d69.mem 1232 136 1 sh3_zsrt139d69_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139d610_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d610.mem 1232 136 1 sh3_zsrt139d610_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139d611_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d611.mem 953 105 1 sh3_zsrt139d611_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139d612_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d612.mem 1232 136 1 sh3_zsrt139d612_pal.mem 0x5cbf8bb4
+13 21005 11264 480 sh3_zsrt139d613_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d613.mem 1097 121 1 sh3_zsrt139d613_pal.mem 0x5cbf8bb4
+14 21599 11264 480 sh3_zsrt139d614_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d614.mem 170 18 1 sh3_zsrt139d614_pal.mem 0x5cbf8bb4
+15 26066 11264 480 sh3_zsrt139d615_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d615.mem 62 6 0 sh3_zsrt139d615_pal.mem 0x44679578
+16 30859 10240 480 sh3_zsrt139d616_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d616.mem 620 68 0 sh3_zsrt139d616_pal.mem 0x47405cb0
+17 31075 13824 480 sh3_zsrt139d617_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139d617.mem 620 68 0 sh3_zsrt139d617_pal.mem 0x566e7c38
+18 77112 10240 480 sh3_zsrt139d618_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d618.mem 620 68 0 sh3_zsrt139d618_pal.mem 0x43ece1ae
+19 89164 9216 480 sh3_zsrt139d619_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139d619.mem 620 68 0 sh3_zsrt139d619_pal.mem 0x5dfce0a2
+20 119471 8192 480 sh3_zsrt139d620_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d620.mem 1844 204 0 sh3_zsrt139d620_pal.mem 0x47097d4c
+21 120110 8192 480 sh3_zsrt139d621_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d621.mem 1844 204 1 sh3_zsrt139d621_pal.mem 0x47097d4c
+22 120749 8192 480 sh3_zsrt139d622_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d622.mem 1844 204 1 sh3_zsrt139d622_pal.mem 0x47097d4c
+23 121388 8192 480 sh3_zsrt139d623_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d623.mem 1844 204 1 sh3_zsrt139d623_pal.mem 0x47097d4c
+24 122027 8192 480 sh3_zsrt139d624_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d624.mem 1844 204 1 sh3_zsrt139d624_pal.mem 0x47097d4c
+25 129389 8192 480 sh3_zsrt139d625_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d625.mem 1844 204 1 sh3_zsrt139d625_pal.mem 0x47097d4c
+26 130241 8192 480 sh3_zsrt139d626_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d626.mem 1844 204 1 sh3_zsrt139d626_pal.mem 0x47097d4c
+27 130880 8192 480 sh3_zsrt139d627_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d627.mem 1844 204 1 sh3_zsrt139d627_pal.mem 0x47097d4c
+28 146205 11264 480 sh3_zsrt139d628_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d628.mem 1142 126 0 sh3_zsrt139d628_pal.mem 0xfd978fd9
+29 146630 11264 480 sh3_zsrt139d629_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d629.mem 1178 130 1 sh3_zsrt139d629_pal.mem 0xfd978fd9
+30 147068 11264 480 sh3_zsrt139d630_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d630.mem 1106 122 1 sh3_zsrt139d630_pal.mem 0xfd978fd9
+31 147480 11264 480 sh3_zsrt139d631_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d631.mem 1070 118 0 sh3_zsrt139d631_pal.mem 0xd5ed05ff
+32 147888 11264 480 sh3_zsrt139d632_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d632.mem 998 110 1 sh3_zsrt139d632_pal.mem 0xd5ed05ff
+33 148264 11264 480 sh3_zsrt139d633_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d633.mem 1070 118 1 sh3_zsrt139d633_pal.mem 0xd5ed05ff
+34 148919 11264 480 sh3_zsrt139d634_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d634.mem 782 86 0 sh3_zsrt139d634_pal.mem 0xcdf8a4d8
+35 149214 11264 480 sh3_zsrt139d635_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d635.mem 782 86 1 sh3_zsrt139d635_pal.mem 0xcdf8a4d8
+36 149509 11264 480 sh3_zsrt139d636_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d636.mem 746 82 1 sh3_zsrt139d636_pal.mem 0xcdf8a4d8
+37 152021 11264 480 sh3_zsrt139d637_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d637.mem 1070 118 0 sh3_zsrt139d637_pal.mem 0xc6784386
+38 152420 11264 480 sh3_zsrt139d638_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d638.mem 1034 114 1 sh3_zsrt139d638_pal.mem 0xc6784386
+39 152806 11264 480 sh3_zsrt139d639_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d639.mem 1106 122 1 sh3_zsrt139d639_pal.mem 0xc6784386
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+362 198092 10240 480 sh3_zsrt139d6362_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6362.mem 116 12 1 sh3_zsrt139d6362_pal.mem 0x158afe76
+363 198092 10240 480 sh3_zsrt139d6363_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6363.mem 197 21 1 sh3_zsrt139d6363_pal.mem 0x158afe76
+364 198092 10240 480 sh3_zsrt139d6364_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6364.mem 143 15 1 sh3_zsrt139d6364_pal.mem 0x158afe76
+365 198092 10240 480 sh3_zsrt139d6365_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6365.mem 503 55 1 sh3_zsrt139d6365_pal.mem 0x158afe76
+366 198092 10240 480 sh3_zsrt139d6366_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6366.mem 449 49 1 sh3_zsrt139d6366_pal.mem 0x158afe76
+367 198092 10240 480 sh3_zsrt139d6367_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6367.mem 395 43 1 sh3_zsrt139d6367_pal.mem 0x158afe76
+368 198092 10240 480 sh3_zsrt139d6368_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6368.mem 413 45 1 sh3_zsrt139d6368_pal.mem 0x158afe76
+369 198092 10240 480 sh3_zsrt139d6369_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6369.mem 449 49 1 sh3_zsrt139d6369_pal.mem 0x158afe76
+370 198092 10240 480 sh3_zsrt139d6370_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6370.mem 584 64 1 sh3_zsrt139d6370_pal.mem 0x158afe76
+371 198092 10240 480 sh3_zsrt139d6371_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6371.mem 125 13 1 sh3_zsrt139d6371_pal.mem 0x158afe76
+372 198092 10240 480 sh3_zsrt139d6372_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6372.mem 80 8 1 sh3_zsrt139d6372_pal.mem 0x158afe76
+373 198092 10240 480 sh3_zsrt139d6373_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6373.mem 152 16 1 sh3_zsrt139d6373_pal.mem 0x158afe76
+374 198092 10240 480 sh3_zsrt139d6374_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6374.mem 107 11 1 sh3_zsrt139d6374_pal.mem 0x158afe76
+375 198092 10240 480 sh3_zsrt139d6375_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6375.mem 98 10 1 sh3_zsrt139d6375_pal.mem 0x158afe76
+376 198092 10240 480 sh3_zsrt139d6376_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6376.mem 152 16 1 sh3_zsrt139d6376_pal.mem 0x158afe76
+377 198092 10240 480 sh3_zsrt139d6377_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6377.mem 314 34 1 sh3_zsrt139d6377_pal.mem 0x158afe76
+378 198092 10240 480 sh3_zsrt139d6378_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6378.mem 53 5 1 sh3_zsrt139d6378_pal.mem 0x158afe76
+379 198092 10240 480 sh3_zsrt139d6379_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6379.mem 62 6 1 sh3_zsrt139d6379_pal.mem 0x158afe76
+380 198092 10240 480 sh3_zsrt139d6380_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6380.mem 152 16 1 sh3_zsrt139d6380_pal.mem 0x158afe76
+381 198092 10240 480 sh3_zsrt139d6381_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6381.mem 197 21 1 sh3_zsrt139d6381_pal.mem 0x158afe76
+382 198092 10240 480 sh3_zsrt139d6382_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6382.mem 287 31 1 sh3_zsrt139d6382_pal.mem 0x158afe76
+383 198092 10240 480 sh3_zsrt139d6383_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6383.mem 566 62 1 sh3_zsrt139d6383_pal.mem 0x158afe76
+384 198092 10240 480 sh3_zsrt139d6384_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6384.mem 980 108 1 sh3_zsrt139d6384_pal.mem 0x158afe76
+385 198092 10240 480 sh3_zsrt139d6385_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6385.mem 107 11 1 sh3_zsrt139d6385_pal.mem 0x158afe76
+386 198092 10240 480 sh3_zsrt139d6386_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6386.mem 602 66 1 sh3_zsrt139d6386_pal.mem 0x158afe76
+387 198092 10240 480 sh3_zsrt139d6387_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6387.mem 377 41 1 sh3_zsrt139d6387_pal.mem 0x158afe76
+388 198092 10240 480 sh3_zsrt139d6388_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6388.mem 89 9 1 sh3_zsrt139d6388_pal.mem 0x158afe76
+389 198092 10240 480 sh3_zsrt139d6389_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6389.mem 152 16 1 sh3_zsrt139d6389_pal.mem 0x158afe76
+390 198092 10240 480 sh3_zsrt139d6390_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6390.mem 305 33 1 sh3_zsrt139d6390_pal.mem 0x158afe76
+391 198092 10240 480 sh3_zsrt139d6391_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6391.mem 98 10 1 sh3_zsrt139d6391_pal.mem 0x158afe76
+392 198092 10240 480 sh3_zsrt139d6392_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6392.mem 71 7 1 sh3_zsrt139d6392_pal.mem 0x158afe76
+393 198092 10240 480 sh3_zsrt139d6393_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6393.mem 71 7 1 sh3_zsrt139d6393_pal.mem 0x158afe76
+394 198092 10240 480 sh3_zsrt139d6394_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6394.mem 80 8 1 sh3_zsrt139d6394_pal.mem 0x158afe76
+395 198092 10240 480 sh3_zsrt139d6395_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6395.mem 179 19 1 sh3_zsrt139d6395_pal.mem 0x158afe76
+396 198092 10240 480 sh3_zsrt139d6396_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6396.mem 251 27 1 sh3_zsrt139d6396_pal.mem 0x158afe76
+397 198092 10240 480 sh3_zsrt139d6397_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6397.mem 278 30 1 sh3_zsrt139d6397_pal.mem 0x158afe76
+398 198092 10240 480 sh3_zsrt139d6398_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6398.mem 125 13 1 sh3_zsrt139d6398_pal.mem 0x158afe76
+399 198092 10240 480 sh3_zsrt139d6399_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6399.mem 251 27 1 sh3_zsrt139d6399_pal.mem 0x158afe76
+400 198092 10240 480 sh3_zsrt139d6400_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6400.mem 449 49 1 sh3_zsrt139d6400_pal.mem 0x158afe76
+401 198092 10240 480 sh3_zsrt139d6401_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6401.mem 125 13 1 sh3_zsrt139d6401_pal.mem 0x158afe76
+402 198092 10240 480 sh3_zsrt139d6402_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6402.mem 71 7 1 sh3_zsrt139d6402_pal.mem 0x158afe76
+403 198092 10240 480 sh3_zsrt139d6403_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6403.mem 53 5 1 sh3_zsrt139d6403_pal.mem 0x158afe76
+404 198092 10240 480 sh3_zsrt139d6404_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6404.mem 53 5 1 sh3_zsrt139d6404_pal.mem 0x158afe76
+405 198092 10240 480 sh3_zsrt139d6405_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6405.mem 44 4 1 sh3_zsrt139d6405_pal.mem 0x158afe76
+406 198092 10240 480 sh3_zsrt139d6406_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6406.mem 44 4 1 sh3_zsrt139d6406_pal.mem 0x158afe76
+407 198092 10240 480 sh3_zsrt139d6407_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6407.mem 98 10 1 sh3_zsrt139d6407_pal.mem 0x158afe76
+408 198092 10240 480 sh3_zsrt139d6408_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6408.mem 80 8 1 sh3_zsrt139d6408_pal.mem 0x158afe76
+409 198092 10240 480 sh3_zsrt139d6409_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6409.mem 62 6 1 sh3_zsrt139d6409_pal.mem 0x158afe76
+410 198092 10240 480 sh3_zsrt139d6410_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6410.mem 80 8 1 sh3_zsrt139d6410_pal.mem 0x158afe76
+411 198092 10240 480 sh3_zsrt139d6411_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6411.mem 107 11 1 sh3_zsrt139d6411_pal.mem 0x158afe76
+412 198092 10240 480 sh3_zsrt139d6412_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6412.mem 206 22 1 sh3_zsrt139d6412_pal.mem 0x158afe76
+413 198092 10240 480 sh3_zsrt139d6413_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6413.mem 719 79 1 sh3_zsrt139d6413_pal.mem 0x158afe76
+414 198092 10240 480 sh3_zsrt139d6414_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6414.mem 494 54 1 sh3_zsrt139d6414_pal.mem 0x158afe76
+415 198092 10240 480 sh3_zsrt139d6415_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6415.mem 89 9 1 sh3_zsrt139d6415_pal.mem 0x158afe76
+416 198092 10240 480 sh3_zsrt139d6416_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6416.mem 179 19 1 sh3_zsrt139d6416_pal.mem 0x158afe76
+417 198092 10240 480 sh3_zsrt139d6417_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6417.mem 242 26 1 sh3_zsrt139d6417_pal.mem 0x158afe76
+418 198092 10240 480 sh3_zsrt139d6418_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6418.mem 89 9 1 sh3_zsrt139d6418_pal.mem 0x158afe76
+419 198092 10240 480 sh3_zsrt139d6419_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6419.mem 80 8 1 sh3_zsrt139d6419_pal.mem 0x158afe76
+420 198092 10240 480 sh3_zsrt139d6420_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6420.mem 170 18 1 sh3_zsrt139d6420_pal.mem 0x158afe76
+421 198092 10240 480 sh3_zsrt139d6421_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6421.mem 143 15 1 sh3_zsrt139d6421_pal.mem 0x158afe76
+422 198092 10240 480 sh3_zsrt139d6422_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6422.mem 80 8 1 sh3_zsrt139d6422_pal.mem 0x158afe76
+423 198092 10240 480 sh3_zsrt139d6423_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6423.mem 62 6 1 sh3_zsrt139d6423_pal.mem 0x158afe76
+424 198092 10240 480 sh3_zsrt139d6424_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6424.mem 125 13 1 sh3_zsrt139d6424_pal.mem 0x158afe76
+425 198092 10240 480 sh3_zsrt139d6425_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6425.mem 197 21 1 sh3_zsrt139d6425_pal.mem 0x158afe76
+426 198092 10240 480 sh3_zsrt139d6426_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6426.mem 188 20 1 sh3_zsrt139d6426_pal.mem 0x158afe76
+427 198092 10240 480 sh3_zsrt139d6427_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6427.mem 62 6 1 sh3_zsrt139d6427_pal.mem 0x158afe76
+428 198092 10240 480 sh3_zsrt139d6428_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6428.mem 44 4 1 sh3_zsrt139d6428_pal.mem 0x158afe76
+429 198092 10240 480 sh3_zsrt139d6429_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6429.mem 44 4 1 sh3_zsrt139d6429_pal.mem 0x158afe76
+430 198092 10240 480 sh3_zsrt139d6430_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6430.mem 35 3 1 sh3_zsrt139d6430_pal.mem 0x158afe76
+431 198092 10240 480 sh3_zsrt139d6431_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6431.mem 44 4 1 sh3_zsrt139d6431_pal.mem 0x158afe76
+432 198092 10240 480 sh3_zsrt139d6432_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6432.mem 62 6 1 sh3_zsrt139d6432_pal.mem 0x158afe76
+433 198092 10240 480 sh3_zsrt139d6433_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6433.mem 98 10 1 sh3_zsrt139d6433_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139e1_epochs.txt

@@ -0,0 +1,21 @@
+# Ch408 authentic PSMT4 post-process overlay scheduler fixture
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 18 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0
+1 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0
+2 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0
+3 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0
+4 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0
+5 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0
+6 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0
+7 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0
+8 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0
+9 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0
+10 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0
+11 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0
+12 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0
+13 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0
+14 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0
+15 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0
+16 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0
+17 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0

sim/data/top_psmct32_raster_demo/sh3_zsrt139e2_epochs.txt

@@ -0,0 +1,455 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139d6', 'zsrt139e1']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 452 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 5328 11264 480 sh3_zsrt139e20_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139e20.mem 494 54 0 sh3_zsrt139e20_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139e21_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139e21.mem 1061 117 0 sh3_zsrt139e21_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139e22_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139e22.mem 530 58 1 sh3_zsrt139e22_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139e23_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139e23.mem 782 86 0 sh3_zsrt139e23_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139e24_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e24.mem 1232 136 0 sh3_zsrt139e24_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139e25_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e25.mem 1232 136 1 sh3_zsrt139e25_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139e26_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e26.mem 764 84 1 sh3_zsrt139e26_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139e27_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e27.mem 1232 136 1 sh3_zsrt139e27_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139e28_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e28.mem 710 78 1 sh3_zsrt139e28_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139e29_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e29.mem 1232 136 1 sh3_zsrt139e29_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139e210_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e210.mem 1232 136 1 sh3_zsrt139e210_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139e211_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e211.mem 953 105 1 sh3_zsrt139e211_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139e212_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139e212.mem 1232 136 1 sh3_zsrt139e212_pal.mem 0x5cbf8bb4
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+439 198945 13376 480 sh3_zsrt139e2439_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2439.mem 134 14 1 sh3_zsrt139e2439_pal.mem 0x870d2bd0
+440 198945 13376 480 sh3_zsrt139e2440_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2440.mem 134 14 1 sh3_zsrt139e2440_pal.mem 0x870d2bd0
+441 198945 13376 480 sh3_zsrt139e2441_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2441.mem 134 14 1 sh3_zsrt139e2441_pal.mem 0x870d2bd0
+442 198945 13376 480 sh3_zsrt139e2442_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2442.mem 134 14 1 sh3_zsrt139e2442_pal.mem 0x870d2bd0
+443 198945 13376 480 sh3_zsrt139e2443_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2443.mem 134 14 1 sh3_zsrt139e2443_pal.mem 0x870d2bd0
+444 198945 13376 480 sh3_zsrt139e2444_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2444.mem 134 14 1 sh3_zsrt139e2444_pal.mem 0x870d2bd0
+445 198945 13376 480 sh3_zsrt139e2445_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2445.mem 134 14 1 sh3_zsrt139e2445_pal.mem 0x870d2bd0
+446 198945 13376 480 sh3_zsrt139e2446_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2446.mem 134 14 1 sh3_zsrt139e2446_pal.mem 0x870d2bd0
+447 198945 13376 480 sh3_zsrt139e2447_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2447.mem 134 14 1 sh3_zsrt139e2447_pal.mem 0x870d2bd0
+448 198945 13376 480 sh3_zsrt139e2448_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2448.mem 134 14 1 sh3_zsrt139e2448_pal.mem 0x870d2bd0
+449 198945 13376 480 sh3_zsrt139e2449_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2449.mem 134 14 1 sh3_zsrt139e2449_pal.mem 0x870d2bd0
+450 198945 13376 480 sh3_zsrt139e2450_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2450.mem 134 14 1 sh3_zsrt139e2450_pal.mem 0x870d2bd0
+451 198945 13376 480 sh3_zsrt139e2451_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e2451.mem 26 2 1 sh3_zsrt139e2451_pal.mem 0x870d2bd0

sim/data/top_psmct32_raster_demo/sh3_zsrt139e3_epochs.txt

@@ -0,0 +1,455 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139d6', 'zsrt139e1']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 452 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 5328 11264 480 sh3_zsrt139d60_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139d60.mem 494 54 0 sh3_zsrt139d60_pal.mem 0x32ed74c4
+1 11671 10240 480 sh3_zsrt139d61_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d61.mem 1061 117 0 sh3_zsrt139d61_pal.mem 0x3cd88c98
+2 12757 10240 480 sh3_zsrt139d62_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139d62.mem 530 58 1 sh3_zsrt139d62_pal.mem 0x3cd88c98
+3 15277 12288 480 sh3_zsrt139d63_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139d63.mem 782 86 0 sh3_zsrt139d63_pal.mem 0x4812d6f2
+4 16217 11264 480 sh3_zsrt139d64_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d64.mem 1232 136 0 sh3_zsrt139d64_pal.mem 0x5cbf8bb4
+5 16643 11264 480 sh3_zsrt139d65_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d65.mem 1232 136 1 sh3_zsrt139d65_pal.mem 0x5cbf8bb4
+6 17069 11264 480 sh3_zsrt139d66_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d66.mem 764 84 1 sh3_zsrt139d66_pal.mem 0x5cbf8bb4
+7 17339 11264 480 sh3_zsrt139d67_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d67.mem 1232 136 1 sh3_zsrt139d67_pal.mem 0x5cbf8bb4
+8 17765 11264 480 sh3_zsrt139d68_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d68.mem 710 78 1 sh3_zsrt139d68_pal.mem 0x5cbf8bb4
+9 19136 11264 480 sh3_zsrt139d69_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d69.mem 1232 136 1 sh3_zsrt139d69_pal.mem 0x5cbf8bb4
+10 19562 11264 480 sh3_zsrt139d610_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d610.mem 1232 136 1 sh3_zsrt139d610_pal.mem 0x5cbf8bb4
+11 20246 11264 480 sh3_zsrt139d611_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d611.mem 953 105 1 sh3_zsrt139d611_pal.mem 0x5cbf8bb4
+12 20579 11264 480 sh3_zsrt139d612_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d612.mem 1232 136 1 sh3_zsrt139d612_pal.mem 0x5cbf8bb4
+13 21005 11264 480 sh3_zsrt139d613_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d613.mem 1097 121 1 sh3_zsrt139d613_pal.mem 0x5cbf8bb4
+14 21599 11264 480 sh3_zsrt139d614_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d614.mem 170 18 1 sh3_zsrt139d614_pal.mem 0x5cbf8bb4
+15 26066 11264 480 sh3_zsrt139d615_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139d615.mem 62 6 0 sh3_zsrt139d615_pal.mem 0x44679578
+16 30859 10240 480 sh3_zsrt139d616_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d616.mem 620 68 0 sh3_zsrt139d616_pal.mem 0x47405cb0
+17 31075 13824 480 sh3_zsrt139d617_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139d617.mem 620 68 0 sh3_zsrt139d617_pal.mem 0x566e7c38
+18 77112 10240 480 sh3_zsrt139d618_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139d618.mem 620 68 0 sh3_zsrt139d618_pal.mem 0x43ece1ae
+19 89164 9216 480 sh3_zsrt139d619_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139d619.mem 620 68 0 sh3_zsrt139d619_pal.mem 0x5dfce0a2
+20 119471 8192 480 sh3_zsrt139d620_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d620.mem 1844 204 0 sh3_zsrt139d620_pal.mem 0x47097d4c
+21 120110 8192 480 sh3_zsrt139d621_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d621.mem 1844 204 1 sh3_zsrt139d621_pal.mem 0x47097d4c
+22 120749 8192 480 sh3_zsrt139d622_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d622.mem 1844 204 1 sh3_zsrt139d622_pal.mem 0x47097d4c
+23 121388 8192 480 sh3_zsrt139d623_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d623.mem 1844 204 1 sh3_zsrt139d623_pal.mem 0x47097d4c
+24 122027 8192 480 sh3_zsrt139d624_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d624.mem 1844 204 1 sh3_zsrt139d624_pal.mem 0x47097d4c
+25 129389 8192 480 sh3_zsrt139d625_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d625.mem 1844 204 1 sh3_zsrt139d625_pal.mem 0x47097d4c
+26 130241 8192 480 sh3_zsrt139d626_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d626.mem 1844 204 1 sh3_zsrt139d626_pal.mem 0x47097d4c
+27 130880 8192 480 sh3_zsrt139d627_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139d627.mem 1844 204 1 sh3_zsrt139d627_pal.mem 0x47097d4c
+28 146205 11264 480 sh3_zsrt139d628_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d628.mem 1142 126 0 sh3_zsrt139d628_pal.mem 0xfd978fd9
+29 146630 11264 480 sh3_zsrt139d629_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d629.mem 1178 130 1 sh3_zsrt139d629_pal.mem 0xfd978fd9
+30 147068 11264 480 sh3_zsrt139d630_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d630.mem 1106 122 1 sh3_zsrt139d630_pal.mem 0xfd978fd9
+31 147480 11264 480 sh3_zsrt139d631_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d631.mem 1070 118 0 sh3_zsrt139d631_pal.mem 0xd5ed05ff
+32 147888 11264 480 sh3_zsrt139d632_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d632.mem 998 110 1 sh3_zsrt139d632_pal.mem 0xd5ed05ff
+33 148264 11264 480 sh3_zsrt139d633_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d633.mem 1070 118 1 sh3_zsrt139d633_pal.mem 0xd5ed05ff
+34 148919 11264 480 sh3_zsrt139d634_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d634.mem 782 86 0 sh3_zsrt139d634_pal.mem 0xcdf8a4d8
+35 149214 11264 480 sh3_zsrt139d635_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d635.mem 782 86 1 sh3_zsrt139d635_pal.mem 0xcdf8a4d8
+36 149509 11264 480 sh3_zsrt139d636_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d636.mem 746 82 1 sh3_zsrt139d636_pal.mem 0xcdf8a4d8
+37 152021 11264 480 sh3_zsrt139d637_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d637.mem 1070 118 0 sh3_zsrt139d637_pal.mem 0xc6784386
+38 152420 11264 480 sh3_zsrt139d638_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d638.mem 1034 114 1 sh3_zsrt139d638_pal.mem 0xc6784386
+39 152806 11264 480 sh3_zsrt139d639_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d639.mem 1106 122 1 sh3_zsrt139d639_pal.mem 0xc6784386
+40 153218 11264 480 sh3_zsrt139d640_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d640.mem 1142 126 0 sh3_zsrt139d640_pal.mem 0xc6784386
+41 153643 11264 480 sh3_zsrt139d641_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d641.mem 1034 114 1 sh3_zsrt139d641_pal.mem 0xc6784386
+42 154029 11264 480 sh3_zsrt139d642_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d642.mem 1070 118 1 sh3_zsrt139d642_pal.mem 0xc6784386
+43 154428 11264 480 sh3_zsrt139d643_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d643.mem 1142 126 1 sh3_zsrt139d643_pal.mem 0xc6784386
+44 154853 11264 480 sh3_zsrt139d644_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d644.mem 1106 122 1 sh3_zsrt139d644_pal.mem 0xc6784386
+45 155265 11264 480 sh3_zsrt139d645_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d645.mem 1070 118 1 sh3_zsrt139d645_pal.mem 0xc6784386
+46 155664 11264 480 sh3_zsrt139d646_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d646.mem 1070 118 1 sh3_zsrt139d646_pal.mem 0xc6784386
+47 156063 11264 480 sh3_zsrt139d647_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139d647.mem 1358 150 1 sh3_zsrt139d647_pal.mem 0xc6784386
+48 156566 10240 480 sh3_zsrt139d648_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d648.mem 998 110 0 sh3_zsrt139d648_pal.mem 0x00fd9028
+49 156939 10240 480 sh3_zsrt139d649_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d649.mem 890 98 1 sh3_zsrt139d649_pal.mem 0x00fd9028
+50 157273 10240 480 sh3_zsrt139d650_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d650.mem 890 98 1 sh3_zsrt139d650_pal.mem 0x00fd9028
+51 157607 10240 480 sh3_zsrt139d651_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d651.mem 962 106 1 sh3_zsrt139d651_pal.mem 0x00fd9028
+52 157967 10240 480 sh3_zsrt139d652_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d652.mem 926 102 1 sh3_zsrt139d652_pal.mem 0x00fd9028
+53 158314 10240 480 sh3_zsrt139d653_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d653.mem 962 106 1 sh3_zsrt139d653_pal.mem 0x00fd9028
+54 158674 10240 480 sh3_zsrt139d654_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d654.mem 962 106 1 sh3_zsrt139d654_pal.mem 0x00fd9028
+55 159034 10240 480 sh3_zsrt139d655_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d655.mem 1034 114 1 sh3_zsrt139d655_pal.mem 0x00fd9028
+56 159420 10240 480 sh3_zsrt139d656_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d656.mem 890 98 1 sh3_zsrt139d656_pal.mem 0x00fd9028
+57 159754 10240 480 sh3_zsrt139d657_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d657.mem 962 106 1 sh3_zsrt139d657_pal.mem 0x00fd9028
+58 160114 10240 480 sh3_zsrt139d658_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d658.mem 566 62 1 sh3_zsrt139d658_pal.mem 0x00fd9028
+59 160331 10240 480 sh3_zsrt139d659_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d659.mem 1178 130 0 sh3_zsrt139d659_pal.mem 0xd8d19684
+60 160769 10240 480 sh3_zsrt139d660_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d660.mem 1070 118 1 sh3_zsrt139d660_pal.mem 0xd8d19684
+61 161168 10240 480 sh3_zsrt139d661_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d661.mem 1070 118 1 sh3_zsrt139d661_pal.mem 0xd8d19684
+62 161567 10240 480 sh3_zsrt139d662_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d662.mem 1250 138 1 sh3_zsrt139d662_pal.mem 0xd8d19684
+63 162031 10240 480 sh3_zsrt139d663_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d663.mem 710 78 1 sh3_zsrt139d663_pal.mem 0xd8d19684
+64 162300 10240 480 sh3_zsrt139d664_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d664.mem 1142 126 1 sh3_zsrt139d664_pal.mem 0xd8d19684
+65 162725 10240 480 sh3_zsrt139d665_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d665.mem 1178 130 1 sh3_zsrt139d665_pal.mem 0xd8d19684
+66 163163 10240 480 sh3_zsrt139d666_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d666.mem 1106 122 1 sh3_zsrt139d666_pal.mem 0xd8d19684
+67 163575 10240 480 sh3_zsrt139d667_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d667.mem 1142 126 1 sh3_zsrt139d667_pal.mem 0xd8d19684
+68 164000 10240 480 sh3_zsrt139d668_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d668.mem 530 58 1 sh3_zsrt139d668_pal.mem 0xd8d19684
+69 164204 10240 480 sh3_zsrt139d669_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d669.mem 1322 146 0 sh3_zsrt139d669_pal.mem 0xaa4e7e05
+70 164694 10240 480 sh3_zsrt139d670_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d670.mem 674 74 1 sh3_zsrt139d670_pal.mem 0xaa4e7e05
+71 164950 10240 480 sh3_zsrt139d671_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d671.mem 602 66 1 sh3_zsrt139d671_pal.mem 0xaa4e7e05
+72 165180 10240 480 sh3_zsrt139d672_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139d672.mem 458 50 1 sh3_zsrt139d672_pal.mem 0xaa4e7e05
+73 175995 12288 480 sh3_zsrt139d673_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139d673.mem 1214 134 0 sh3_zsrt139d673_pal.mem 0x56ebf1d1
+74 176446 12288 480 sh3_zsrt139d674_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139d674.mem 1376 152 1 sh3_zsrt139d674_pal.mem 0x56ebf1d1
+75 196494 10240 480 sh3_zsrt139d675_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d675.mem 17 1 0 sh3_zsrt139d675_pal.mem 0x158afe76
+76 196494 10240 480 sh3_zsrt139d676_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d676.mem 17 1 1 sh3_zsrt139d676_pal.mem 0x158afe76
+77 196494 10240 480 sh3_zsrt139d677_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d677.mem 17 1 1 sh3_zsrt139d677_pal.mem 0x158afe76
+78 196494 10240 480 sh3_zsrt139d678_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d678.mem 17 1 1 sh3_zsrt139d678_pal.mem 0x158afe76
+79 196494 10240 480 sh3_zsrt139d679_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d679.mem 17 1 1 sh3_zsrt139d679_pal.mem 0x158afe76
+80 196494 10240 480 sh3_zsrt139d680_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d680.mem 17 1 1 sh3_zsrt139d680_pal.mem 0x158afe76
+81 196494 10240 480 sh3_zsrt139d681_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d681.mem 17 1 1 sh3_zsrt139d681_pal.mem 0x158afe76
+82 196494 10240 480 sh3_zsrt139d682_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d682.mem 17 1 1 sh3_zsrt139d682_pal.mem 0x158afe76
+83 196494 10240 480 sh3_zsrt139d683_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d683.mem 17 1 1 sh3_zsrt139d683_pal.mem 0x158afe76
+84 196494 10240 480 sh3_zsrt139d684_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d684.mem 17 1 1 sh3_zsrt139d684_pal.mem 0x158afe76
+85 196494 10240 480 sh3_zsrt139d685_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d685.mem 17 1 1 sh3_zsrt139d685_pal.mem 0x158afe76
+86 196494 10240 480 sh3_zsrt139d686_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d686.mem 17 1 1 sh3_zsrt139d686_pal.mem 0x158afe76
+87 196494 10240 480 sh3_zsrt139d687_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d687.mem 17 1 1 sh3_zsrt139d687_pal.mem 0x158afe76
+88 196494 10240 480 sh3_zsrt139d688_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d688.mem 17 1 1 sh3_zsrt139d688_pal.mem 0x158afe76
+89 196494 10240 480 sh3_zsrt139d689_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d689.mem 17 1 1 sh3_zsrt139d689_pal.mem 0x158afe76
+90 196494 10240 480 sh3_zsrt139d690_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d690.mem 17 1 1 sh3_zsrt139d690_pal.mem 0x158afe76
+91 196494 10240 480 sh3_zsrt139d691_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d691.mem 17 1 1 sh3_zsrt139d691_pal.mem 0x158afe76
+92 196494 10240 480 sh3_zsrt139d692_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d692.mem 17 1 1 sh3_zsrt139d692_pal.mem 0x158afe76
+93 196494 10240 480 sh3_zsrt139d693_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d693.mem 17 1 1 sh3_zsrt139d693_pal.mem 0x158afe76
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+413 198092 10240 480 sh3_zsrt139d6413_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6413.mem 719 79 1 sh3_zsrt139d6413_pal.mem 0x158afe76
+414 198092 10240 480 sh3_zsrt139d6414_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6414.mem 494 54 1 sh3_zsrt139d6414_pal.mem 0x158afe76
+415 198092 10240 480 sh3_zsrt139d6415_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6415.mem 89 9 1 sh3_zsrt139d6415_pal.mem 0x158afe76
+416 198092 10240 480 sh3_zsrt139d6416_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6416.mem 179 19 1 sh3_zsrt139d6416_pal.mem 0x158afe76
+417 198092 10240 480 sh3_zsrt139d6417_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6417.mem 242 26 1 sh3_zsrt139d6417_pal.mem 0x158afe76
+418 198092 10240 480 sh3_zsrt139d6418_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6418.mem 89 9 1 sh3_zsrt139d6418_pal.mem 0x158afe76
+419 198092 10240 480 sh3_zsrt139d6419_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6419.mem 80 8 1 sh3_zsrt139d6419_pal.mem 0x158afe76
+420 198092 10240 480 sh3_zsrt139d6420_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6420.mem 170 18 1 sh3_zsrt139d6420_pal.mem 0x158afe76
+421 198092 10240 480 sh3_zsrt139d6421_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6421.mem 143 15 1 sh3_zsrt139d6421_pal.mem 0x158afe76
+422 198092 10240 480 sh3_zsrt139d6422_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6422.mem 80 8 1 sh3_zsrt139d6422_pal.mem 0x158afe76
+423 198092 10240 480 sh3_zsrt139d6423_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6423.mem 62 6 1 sh3_zsrt139d6423_pal.mem 0x158afe76
+424 198092 10240 480 sh3_zsrt139d6424_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6424.mem 125 13 1 sh3_zsrt139d6424_pal.mem 0x158afe76
+425 198092 10240 480 sh3_zsrt139d6425_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6425.mem 197 21 1 sh3_zsrt139d6425_pal.mem 0x158afe76
+426 198092 10240 480 sh3_zsrt139d6426_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6426.mem 188 20 1 sh3_zsrt139d6426_pal.mem 0x158afe76
+427 198092 10240 480 sh3_zsrt139d6427_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6427.mem 62 6 1 sh3_zsrt139d6427_pal.mem 0x158afe76
+428 198092 10240 480 sh3_zsrt139d6428_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6428.mem 44 4 1 sh3_zsrt139d6428_pal.mem 0x158afe76
+429 198092 10240 480 sh3_zsrt139d6429_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6429.mem 44 4 1 sh3_zsrt139d6429_pal.mem 0x158afe76
+430 198092 10240 480 sh3_zsrt139d6430_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6430.mem 35 3 1 sh3_zsrt139d6430_pal.mem 0x158afe76
+431 198092 10240 480 sh3_zsrt139d6431_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6431.mem 44 4 1 sh3_zsrt139d6431_pal.mem 0x158afe76
+432 198092 10240 480 sh3_zsrt139d6432_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6432.mem 62 6 1 sh3_zsrt139d6432_pal.mem 0x158afe76
+433 198092 10240 480 sh3_zsrt139d6433_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139d6433.mem 98 10 1 sh3_zsrt139d6433_pal.mem 0x158afe76
+434 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0
+435 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0
+436 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0
+437 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0
+438 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0
+439 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0
+440 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0
+441 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0
+442 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0
+443 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0
+444 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0
+445 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0
+446 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0
+447 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0
+448 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0
+449 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0
+450 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0
+451 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0

sim/data/top_psmct32_raster_demo/sh3_zsrt139f10_epochs.txt

@@ -0,0 +1,128 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f5@0:73', 'zsrt139f10g', 'zsrt139f5@77:124']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 125 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f537.mem 2042 226 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f538.mem 899 99 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f539.mem 1745 193 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f540.mem 485 53 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f541.mem 188 20 0 sh3_zsrt139f541_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f542.mem 1376 152 0 sh3_zsrt139f542_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f543.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f544.mem 170 18 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f545.mem 2042 226 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f546.mem 224 24 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f547.mem 1421 157 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f548.mem 1457 161 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+49 117599 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f549.mem 1988 220 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+50 118238 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f550.mem 1547 171 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+51 118877 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f551.mem 1187 131 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+52 119471 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f552.mem 503 55 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+53 120110 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f553.mem 1331 147 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+54 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f554.mem 1502 166 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f555.mem 575 63 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+56 121388 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f556.mem 1070 118 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+57 122027 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f557.mem 863 95 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+58 122600 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f558.mem 791 87 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+59 123239 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f559.mem 152 16 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+60 123869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f560.mem 260 28 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+61 124508 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f561.mem 314 34 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+62 125147 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f562.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+63 125786 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f563.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+64 126434 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f564.mem 359 39 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+65 126968 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f565.mem 557 61 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+68 128885 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f568.mem 62 6 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+69 129389 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f569.mem 1205 133 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+70 130028 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f570.mem 1025 113 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+72 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f572.mem 233 25 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+73 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g0.mem 485 53 0 sh3_zsrt139f10g0_pal.mem 0x47097d4c
+74 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g1.mem 557 61 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c
+75 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g2.mem 143 15 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c
+76 131519 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g3.mem 575 63 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c
+77 131519 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g4.mem 494 54 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c
+78 131945 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f577.mem 1376 152 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+79 132584 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f578.mem 944 104 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+80 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f579.mem 620 68 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+81 133262 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f580.mem 53 5 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+82 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+83 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98
+84 145712 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f583.mem 116 12 1 sh3_zsrt139f582_pal.mem 0x3e849a98
+85 146205 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f584.mem 1052 116 0 sh3_zsrt139f584_pal.mem 0xfd978fd9
+86 146630 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f585.mem 278 30 1 sh3_zsrt139f584_pal.mem 0xfd978fd9
+87 147068 11264 480 sh3_zsrt139f584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f586.mem 332 36 1 sh3_zsrt139f584_pal.mem 0xfd978fd9
+88 147480 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f587.mem 710 78 0 sh3_zsrt139f587_pal.mem 0xd5ed05ff
+89 147888 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f588.mem 638 70 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff
+90 148264 11264 480 sh3_zsrt139f587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f589.mem 1016 112 1 sh3_zsrt139f587_pal.mem 0xd5ed05ff
+91 148919 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f590.mem 1043 115 0 sh3_zsrt139f590_pal.mem 0xcdf8a4d8
+92 149509 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f591.mem 854 94 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8
+93 150125 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f592.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8
+94 150741 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f593.mem 701 77 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8
+95 151344 11264 480 sh3_zsrt139f590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f594.mem 377 41 1 sh3_zsrt139f590_pal.mem 0xcdf8a4d8
+96 152021 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f595.mem 314 34 0 sh3_zsrt139f595_pal.mem 0xc6784386
+97 152420 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f596.mem 269 29 1 sh3_zsrt139f595_pal.mem 0xc6784386
+98 152806 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f597.mem 377 41 1 sh3_zsrt139f595_pal.mem 0xc6784386
+99 153218 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f598.mem 179 19 1 sh3_zsrt139f595_pal.mem 0xc6784386
+100 153643 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f599.mem 44 4 1 sh3_zsrt139f595_pal.mem 0xc6784386
+101 154029 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5100.mem 359 39 1 sh3_zsrt139f595_pal.mem 0xc6784386
+102 154428 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5101.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386
+103 154853 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5102.mem 206 22 1 sh3_zsrt139f595_pal.mem 0xc6784386
+104 155265 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5103.mem 188 20 1 sh3_zsrt139f595_pal.mem 0xc6784386
+105 155664 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5104.mem 98 10 1 sh3_zsrt139f595_pal.mem 0xc6784386
+106 156063 11264 480 sh3_zsrt139f595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5105.mem 89 9 1 sh3_zsrt139f595_pal.mem 0xc6784386
+107 156566 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5106.mem 1268 140 0 sh3_zsrt139f5106_pal.mem 0x00fd9028
+108 157273 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5107.mem 1106 122 1 sh3_zsrt139f5106_pal.mem 0x00fd9028
+109 157967 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5108.mem 755 83 1 sh3_zsrt139f5106_pal.mem 0x00fd9028
+110 158674 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5109.mem 809 89 1 sh3_zsrt139f5106_pal.mem 0x00fd9028
+111 159420 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5110.mem 503 55 1 sh3_zsrt139f5106_pal.mem 0x00fd9028
+112 160114 10240 480 sh3_zsrt139f5106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5111.mem 116 12 1 sh3_zsrt139f5106_pal.mem 0x00fd9028
+113 160331 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5112.mem 368 40 0 sh3_zsrt139f5112_pal.mem 0xd8d19684
+114 160769 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5113.mem 287 31 1 sh3_zsrt139f5112_pal.mem 0xd8d19684
+115 161168 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5114.mem 440 48 1 sh3_zsrt139f5112_pal.mem 0xd8d19684
+116 161567 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5115.mem 296 32 1 sh3_zsrt139f5112_pal.mem 0xd8d19684
+117 162300 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5116.mem 395 43 1 sh3_zsrt139f5112_pal.mem 0xd8d19684
+118 162725 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5117.mem 377 41 1 sh3_zsrt139f5112_pal.mem 0xd8d19684
+119 163163 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5118.mem 251 27 1 sh3_zsrt139f5112_pal.mem 0xd8d19684
+120 163575 10240 480 sh3_zsrt139f5112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5119.mem 314 34 1 sh3_zsrt139f5112_pal.mem 0xd8d19684
+121 164204 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5120.mem 647 71 0 sh3_zsrt139f5120_pal.mem 0xaa4e7e05
+122 164950 10240 480 sh3_zsrt139f5120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f5121.mem 377 41 1 sh3_zsrt139f5120_pal.mem 0xaa4e7e05
+123 175995 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5122.mem 395 43 0 sh3_zsrt139f5122_pal.mem 0x56ebf1d1
+124 176446 12288 480 sh3_zsrt139f5122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f5123.mem 251 27 1 sh3_zsrt139f5122_pal.mem 0x56ebf1d1

sim/data/top_psmct32_raster_demo/sh3_zsrt139f10g_epochs.txt

@@ -0,0 +1,11 @@
+# Ch413 epoch descriptor table (5 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 5 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g0.mem 485 53 0 sh3_zsrt139f10g0_pal.mem 0x47097d4c
+1 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g1.mem 557 61 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c
+2 131306 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g2.mem 143 15 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c
+3 131519 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g3.mem 575 63 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c
+4 131519 8192 480 sh3_zsrt139f10g0_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f10g4.mem 494 54 1 sh3_zsrt139f10g0_pal.mem 0x47097d4c

sim/data/top_psmct32_raster_demo/sh3_zsrt139f11_epochs.txt

@@ -0,0 +1,148 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f10', 'zsrt139f11d']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 145 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f50_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f50.mem 44 4 0 sh3_zsrt139f50_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51.mem 1547 171 0 sh3_zsrt139f51_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f51_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f52.mem 1772 196 1 sh3_zsrt139f51_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f53_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f53.mem 350 38 0 sh3_zsrt139f53_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f54.mem 1277 141 0 sh3_zsrt139f54_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f55.mem 107 11 1 sh3_zsrt139f54_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f54_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f56.mem 620 68 1 sh3_zsrt139f54_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f57.mem 224 24 0 sh3_zsrt139f57_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f58.mem 593 65 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f57_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f59.mem 332 36 1 sh3_zsrt139f57_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f510.mem 53 5 0 sh3_zsrt139f510_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f511.mem 359 39 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f512.mem 602 66 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f513.mem 944 104 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f514.mem 557 61 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f515.mem 737 81 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f516.mem 1115 123 1 sh3_zsrt139f510_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f517.mem 728 80 0 sh3_zsrt139f517_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f518.mem 341 37 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f519.mem 296 32 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f520.mem 530 58 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f521.mem 683 75 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f522.mem 422 46 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f523.mem 665 73 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f524.mem 1151 127 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f525.mem 566 62 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f526.mem 638 70 1 sh3_zsrt139f517_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f527.mem 458 50 0 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f528.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f529.mem 845 93 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f530.mem 629 69 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f531.mem 728 80 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f532.mem 476 52 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f533.mem 854 94 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f534.mem 602 66 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f535.mem 395 43 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f536.mem 26 2 1 sh3_zsrt139f527_pal.mem 0x5dfce0a2
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+66 127607 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f566.mem 467 51 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+67 128246 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f567.mem 449 49 1 sh3_zsrt139f542_pal.mem 0x47097d4c
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+71 130667 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f571.mem 1673 185 1 sh3_zsrt139f542_pal.mem 0x47097d4c
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+82 135869 8192 480 sh3_zsrt139f542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f581.mem 26 2 1 sh3_zsrt139f542_pal.mem 0x47097d4c
+83 144890 12288 480 sh3_zsrt139f582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f582.mem 179 19 0 sh3_zsrt139f582_pal.mem 0x3e849a98
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+130 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000
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+135 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000
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+137 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000
+138 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000
+139 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000
+140 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000
+141 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000
+142 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000
+143 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000
+144 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000

sim/data/top_psmct32_raster_demo/sh3_zsrt139f11d_epochs.txt

@@ -0,0 +1,23 @@
+# Ch414 authentic PSMCT32 intermediate darkening sprites
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 20 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d0.mem 62 6 0 - 0x00000000
+1 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d1.mem 62 6 1 - 0x00000000
+2 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d2.mem 62 6 1 - 0x00000000
+3 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d3.mem 62 6 1 - 0x00000000
+4 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d4.mem 62 6 1 - 0x00000000
+5 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d5.mem 62 6 1 - 0x00000000
+6 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d6.mem 62 6 1 - 0x00000000
+7 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d7.mem 62 6 1 - 0x00000000
+8 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d8.mem 62 6 1 - 0x00000000
+9 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d9.mem 62 6 1 - 0x00000000
+10 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d10.mem 62 6 1 - 0x00000000
+11 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d11.mem 62 6 1 - 0x00000000
+12 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d12.mem 62 6 1 - 0x00000000
+13 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d13.mem 62 6 1 - 0x00000000
+14 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d14.mem 62 6 1 - 0x00000000
+15 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d15.mem 62 6 1 - 0x00000000
+16 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d16.mem 62 6 1 - 0x00000000
+17 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d17.mem 62 6 1 - 0x00000000
+18 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d18.mem 62 6 1 - 0x00000000
+19 196167 11264 0 sh3_zsrt139f11d0_tex_lpddr.mem 0x200000 262144 0x57f35475 feeder_sh3_zsrt139f11d19.mem 62 6 1 - 0x00000000

sim/data/top_psmct32_raster_demo/sh3_zsrt139f15_epochs.txt

@@ -0,0 +1,130 @@
+# Ch415 epoch descriptor table (124 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 124 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 1772 12288 480 sh3_zsrt139f150_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f150.mem 44 4 0 sh3_zsrt139f150_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f151_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f151.mem 1547 171 0 sh3_zsrt139f151_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f151_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f152.mem 1772 196 1 sh3_zsrt139f151_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f153_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f153.mem 350 38 0 sh3_zsrt139f153_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f154_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f154.mem 1277 141 0 sh3_zsrt139f154_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f154_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f155.mem 107 11 1 sh3_zsrt139f154_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f154_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f156.mem 620 68 1 sh3_zsrt139f154_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f157_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f157.mem 224 24 0 sh3_zsrt139f157_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f157_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f158.mem 593 65 1 sh3_zsrt139f157_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f157_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f159.mem 332 36 1 sh3_zsrt139f157_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1510.mem 53 5 0 sh3_zsrt139f1510_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1511.mem 359 39 1 sh3_zsrt139f1510_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1512.mem 602 66 1 sh3_zsrt139f1510_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1513.mem 944 104 1 sh3_zsrt139f1510_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1514.mem 557 61 1 sh3_zsrt139f1510_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1515.mem 737 81 1 sh3_zsrt139f1510_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f1510_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1516.mem 1115 123 1 sh3_zsrt139f1510_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1517.mem 728 80 0 sh3_zsrt139f1517_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1518.mem 341 37 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1519.mem 296 32 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1520.mem 530 58 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1521.mem 683 75 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1522.mem 422 46 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1523.mem 665 73 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1524.mem 1151 127 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1525.mem 566 62 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f1517_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1526.mem 638 70 1 sh3_zsrt139f1517_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1527.mem 458 50 0 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1528.mem 476 52 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1529.mem 845 93 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1530.mem 629 69 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1531.mem 728 80 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1532.mem 476 52 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1533.mem 854 94 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1534.mem 602 66 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1535.mem 395 43 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1536.mem 26 2 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1537.mem 2042 226 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1538.mem 899 99 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1539.mem 1745 193 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f1527_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1540.mem 485 53 1 sh3_zsrt139f1527_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f1541_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1541.mem 188 20 0 sh3_zsrt139f1541_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1542.mem 1376 152 0 sh3_zsrt139f1542_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1543.mem 2042 226 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1544.mem 170 18 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1545.mem 2042 226 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1546.mem 224 24 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1547.mem 1421 157 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1548.mem 1457 161 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+49 117599 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1549.mem 1988 220 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+50 118238 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1550.mem 1547 171 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+51 118877 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1551.mem 1187 131 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+52 119471 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1552.mem 503 55 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+53 120110 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1553.mem 1331 147 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+54 120749 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1554.mem 1502 166 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1555.mem 575 63 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+56 121388 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1556.mem 1070 118 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+57 122027 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1557.mem 863 95 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+58 122600 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1558.mem 791 87 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+59 123239 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1559.mem 152 16 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+60 123869 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1560.mem 260 28 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+61 124508 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1561.mem 314 34 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+62 125147 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1562.mem 62 6 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+63 125786 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1563.mem 359 39 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+64 126434 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1564.mem 359 39 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+65 126968 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1565.mem 557 61 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+66 127607 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1566.mem 467 51 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+67 128246 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1567.mem 449 49 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+68 128885 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1568.mem 62 6 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+69 129389 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1569.mem 1205 133 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+70 130028 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1570.mem 1025 113 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+71 130667 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1571.mem 1673 185 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+72 130667 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1572.mem 233 25 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+73 131306 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1573.mem 485 53 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+74 131306 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1574.mem 557 61 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+75 131306 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1575.mem 521 57 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+76 131306 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1576.mem 683 75 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+77 131945 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1577.mem 1376 152 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+78 132584 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1578.mem 944 104 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+79 133262 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1579.mem 620 68 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+80 133262 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1580.mem 53 5 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+81 135869 8192 480 sh3_zsrt139f1542_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1581.mem 26 2 1 sh3_zsrt139f1542_pal.mem 0x47097d4c
+82 144890 12288 480 sh3_zsrt139f1582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1582.mem 179 19 0 sh3_zsrt139f1582_pal.mem 0x3e849a98
+83 145712 12288 480 sh3_zsrt139f1582_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1583.mem 116 12 1 sh3_zsrt139f1582_pal.mem 0x3e849a98
+84 146205 11264 480 sh3_zsrt139f1584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1584.mem 1052 116 0 sh3_zsrt139f1584_pal.mem 0xfd978fd9
+85 146630 11264 480 sh3_zsrt139f1584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1585.mem 278 30 1 sh3_zsrt139f1584_pal.mem 0xfd978fd9
+86 147068 11264 480 sh3_zsrt139f1584_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1586.mem 332 36 1 sh3_zsrt139f1584_pal.mem 0xfd978fd9
+87 147480 11264 480 sh3_zsrt139f1587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1587.mem 710 78 0 sh3_zsrt139f1587_pal.mem 0xd5ed05ff
+88 147888 11264 480 sh3_zsrt139f1587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1588.mem 638 70 1 sh3_zsrt139f1587_pal.mem 0xd5ed05ff
+89 148264 11264 480 sh3_zsrt139f1587_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1589.mem 1016 112 1 sh3_zsrt139f1587_pal.mem 0xd5ed05ff
+90 148919 11264 480 sh3_zsrt139f1590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1590.mem 1043 115 0 sh3_zsrt139f1590_pal.mem 0xcdf8a4d8
+91 149509 11264 480 sh3_zsrt139f1590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1591.mem 854 94 1 sh3_zsrt139f1590_pal.mem 0xcdf8a4d8
+92 150125 11264 480 sh3_zsrt139f1590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1592.mem 701 77 1 sh3_zsrt139f1590_pal.mem 0xcdf8a4d8
+93 150741 11264 480 sh3_zsrt139f1590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1593.mem 701 77 1 sh3_zsrt139f1590_pal.mem 0xcdf8a4d8
+94 151344 11264 480 sh3_zsrt139f1590_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1594.mem 377 41 1 sh3_zsrt139f1590_pal.mem 0xcdf8a4d8
+95 152021 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1595.mem 314 34 0 sh3_zsrt139f1595_pal.mem 0xc6784386
+96 152420 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1596.mem 269 29 1 sh3_zsrt139f1595_pal.mem 0xc6784386
+97 152806 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1597.mem 377 41 1 sh3_zsrt139f1595_pal.mem 0xc6784386
+98 153218 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1598.mem 179 19 1 sh3_zsrt139f1595_pal.mem 0xc6784386
+99 153643 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1599.mem 44 4 1 sh3_zsrt139f1595_pal.mem 0xc6784386
+100 154029 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15100.mem 359 39 1 sh3_zsrt139f1595_pal.mem 0xc6784386
+101 154428 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15101.mem 206 22 1 sh3_zsrt139f1595_pal.mem 0xc6784386
+102 154853 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15102.mem 206 22 1 sh3_zsrt139f1595_pal.mem 0xc6784386
+103 155265 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15103.mem 188 20 1 sh3_zsrt139f1595_pal.mem 0xc6784386
+104 155664 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15104.mem 98 10 1 sh3_zsrt139f1595_pal.mem 0xc6784386
+105 156063 11264 480 sh3_zsrt139f1595_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f15105.mem 89 9 1 sh3_zsrt139f1595_pal.mem 0xc6784386
+106 156566 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15106.mem 1268 140 0 sh3_zsrt139f15106_pal.mem 0x00fd9028
+107 157273 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15107.mem 1106 122 1 sh3_zsrt139f15106_pal.mem 0x00fd9028
+108 157967 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15108.mem 755 83 1 sh3_zsrt139f15106_pal.mem 0x00fd9028
+109 158674 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15109.mem 809 89 1 sh3_zsrt139f15106_pal.mem 0x00fd9028
+110 159420 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15110.mem 503 55 1 sh3_zsrt139f15106_pal.mem 0x00fd9028
+111 160114 10240 480 sh3_zsrt139f15106_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15111.mem 116 12 1 sh3_zsrt139f15106_pal.mem 0x00fd9028
+112 160331 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15112.mem 368 40 0 sh3_zsrt139f15112_pal.mem 0xd8d19684
+113 160769 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15113.mem 287 31 1 sh3_zsrt139f15112_pal.mem 0xd8d19684
+114 161168 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15114.mem 440 48 1 sh3_zsrt139f15112_pal.mem 0xd8d19684
+115 161567 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15115.mem 296 32 1 sh3_zsrt139f15112_pal.mem 0xd8d19684
+116 162300 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15116.mem 395 43 1 sh3_zsrt139f15112_pal.mem 0xd8d19684
+117 162725 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15117.mem 377 41 1 sh3_zsrt139f15112_pal.mem 0xd8d19684
+118 163163 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15118.mem 251 27 1 sh3_zsrt139f15112_pal.mem 0xd8d19684
+119 163575 10240 480 sh3_zsrt139f15112_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15119.mem 314 34 1 sh3_zsrt139f15112_pal.mem 0xd8d19684
+120 164204 10240 480 sh3_zsrt139f15120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15120.mem 647 71 0 sh3_zsrt139f15120_pal.mem 0xaa4e7e05
+121 164950 10240 480 sh3_zsrt139f15120_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f15121.mem 377 41 1 sh3_zsrt139f15120_pal.mem 0xaa4e7e05
+122 175995 12288 480 sh3_zsrt139f15122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f15122.mem 395 43 0 sh3_zsrt139f15122_pal.mem 0x56ebf1d1
+123 176446 12288 480 sh3_zsrt139f15122_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f15123.mem 251 27 1 sh3_zsrt139f15122_pal.mem 0x56ebf1d1

sim/data/top_psmct32_raster_demo/sh3_zsrt139f16_board_run.log

@@ -0,0 +1,762 @@
+[sched] feeder ready=1
+[sched] scene sh3_zsrt139f16_epochs.txt: 124 epochs, FB 307200 words, tex 65536 words/8192 beats
+[sched] epoch 0: idx1772 tbp12288 cbp480  tex crc=0x42d367ae (exp 0x42d367ae)  4 tris/44 words
+[sched] epoch 1: idx6822 tbp11264 cbp480  tex crc=0x55070afa (exp 0x55070afa)  171 tris/1547 words
+[sched] epoch 2: idx8151 tbp11264 cbp480  REUSE resident tex (crc 0x55070afa)  196 tris/1772 words
+[sched] epoch 3: idx12757 tbp10240 cbp480  tex crc=0x26a88b77 (exp 0x26a88b77)  38 tris/350 words
+[sched] epoch 4: idx15277 tbp12288 cbp480  tex crc=0x835dceb6 (exp 0x835dceb6)  141 tris/1277 words
+[sched] epoch 5: idx15277 tbp12288 cbp480  REUSE resident tex (crc 0x835dceb6)  11 tris/107 words
+[sched] epoch 6: idx15931 tbp12288 cbp480  REUSE resident tex (crc 0x835dceb6)  68 tris/620 words
+[sched] epoch 7: idx20246 tbp11264 cbp480  tex crc=0x95a83cbc (exp 0x95a83cbc)  24 tris/224 words
+[sched] epoch 8: idx20792 tbp11264 cbp480  REUSE resident tex (crc 0x95a83cbc)  65 tris/593 words
+[sched] epoch 9: idx21386 tbp11264 cbp480  REUSE resident tex (crc 0x95a83cbc)  36 tris/332 words
+[sched] epoch 10: idx30461 tbp10240 cbp480  tex crc=0xa727234d (exp 0xa727234d)  5 tris/53 words
+[sched] epoch 11: idx31915 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  39 tris/359 words
+[sched] epoch 12: idx33303 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  66 tris/602 words
+[sched] epoch 13: idx34605 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  104 tris/944 words
+[sched] epoch 14: idx35907 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  61 tris/557 words
+[sched] epoch 15: idx37209 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  81 tris/737 words
+[sched] epoch 16: idx38511 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  123 tris/1115 words
+[sched] epoch 17: idx71148 tbp10240 cbp480  tex crc=0xa727234d (exp 0xa727234d)  80 tris/728 words
+[sched] epoch 18: idx71787 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  37 tris/341 words
+[sched] epoch 19: idx72426 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  32 tris/296 words
+[sched] epoch 20: idx73065 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  58 tris/530 words
+[sched] epoch 21: idx73704 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  75 tris/683 words
+[sched] epoch 22: idx74343 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  46 tris/422 words
+[sched] epoch 23: idx74982 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  73 tris/665 words
+[sched] epoch 24: idx75621 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  127 tris/1151 words
+[sched] epoch 25: idx76260 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  62 tris/566 words
+[sched] epoch 26: idx76899 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  70 tris/638 words
+[sched] epoch 27: idx78319 tbp9216 cbp480  tex crc=0xfbdeaa32 (exp 0xfbdeaa32)  50 tris/458 words
+[sched] epoch 28: idx82720 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  52 tris/476 words
+[sched] epoch 29: idx83323 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  93 tris/845 words
+[sched] epoch 30: idx83944 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  69 tris/629 words
+[sched] epoch 31: idx84565 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  80 tris/728 words
+[sched] epoch 32: idx85186 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  52 tris/476 words
+[sched] epoch 33: idx85807 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  94 tris/854 words
+[sched] epoch 34: idx86428 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  66 tris/602 words
+[sched] epoch 35: idx87049 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  43 tris/395 words
+[sched] epoch 36: idx88918 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  2 tris/26 words
+[sched] epoch 37: idx89548 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  226 tris/2042 words
+[sched] epoch 38: idx89548 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  99 tris/899 words
+[sched] epoch 39: idx90187 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  193 tris/1745 words
+[sched] epoch 40: idx90187 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  53 tris/485 words
+[sched] epoch 41: idx91678 tbp9216 cbp480  tex crc=0xfbdeaa32 (exp 0xfbdeaa32)  20 tris/188 words
+[sched] epoch 42: idx114431 tbp8192 cbp480  tex crc=0xcf4cae27 (exp 0xcf4cae27)  152 tris/1376 words
+[sched] epoch 43: idx115016 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  226 tris/2042 words
+[sched] epoch 44: idx115016 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  18 tris/170 words
+[sched] epoch 45: idx115655 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  226 tris/2042 words
+[sched] epoch 46: idx115655 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  24 tris/224 words
+[sched] epoch 47: idx116351 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  157 tris/1421 words
+[sched] epoch 48: idx117050 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  161 tris/1457 words
+[sched] epoch 49: idx117599 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  220 tris/1988 words
+[sched] epoch 50: idx118238 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  171 tris/1547 words
+[sched] epoch 51: idx118877 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  131 tris/1187 words
+[sched] epoch 52: idx119471 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  55 tris/503 words
+[sched] epoch 53: idx120110 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  147 tris/1331 words
+[sched] epoch 54: idx120749 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  166 tris/1502 words
+[sched] epoch 55: idx120749 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  63 tris/575 words
+[sched] epoch 56: idx121388 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  118 tris/1070 words
+[sched] epoch 57: idx122027 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  95 tris/863 words
+[sched] epoch 58: idx122600 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  87 tris/791 words
+[sched] epoch 59: idx123239 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  16 tris/152 words
+[sched] epoch 60: idx123869 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  28 tris/260 words
+[sched] epoch 61: idx124508 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  34 tris/314 words
+[sched] epoch 62: idx125147 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  6 tris/62 words
+[sched] epoch 63: idx125786 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  39 tris/359 words
+[sched] epoch 64: idx126434 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  39 tris/359 words
+[sched] epoch 65: idx126968 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  61 tris/557 words
+[sched] epoch 66: idx127607 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  51 tris/467 words
+[sched] epoch 67: idx128246 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  49 tris/449 words
+[sched] epoch 68: idx128885 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  6 tris/62 words
+[sched] epoch 69: idx129389 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  133 tris/1205 words
+[sched] epoch 70: idx130028 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  113 tris/1025 words
+[sched] epoch 71: idx130667 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  185 tris/1673 words
+[sched] epoch 72: idx130667 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  25 tris/233 words
+[sched] epoch 73: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  53 tris/485 words
+[sched] epoch 74: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  61 tris/557 words
+[sched] epoch 75: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  57 tris/521 words
+[sched] epoch 76: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  75 tris/683 words
+[sched] epoch 77: idx131945 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  152 tris/1376 words
+[sched] epoch 78: idx132584 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  104 tris/944 words
+[sched] epoch 79: idx133262 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  68 tris/620 words
+[sched] epoch 80: idx133262 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  5 tris/53 words
+[sched] epoch 81: idx135869 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  2 tris/26 words
+[sched] epoch 82: idx144890 tbp12288 cbp480  tex crc=0x87415c50 (exp 0x87415c50)  19 tris/179 words
+[sched] epoch 83: idx145712 tbp12288 cbp480  REUSE resident tex (crc 0x87415c50)  12 tris/116 words
+[sched] epoch 84: idx146205 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  116 tris/1052 words
+[sched] epoch 85: idx146630 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  30 tris/278 words
+[sched] epoch 86: idx147068 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  36 tris/332 words
+[sched] epoch 87: idx147480 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  78 tris/710 words
+[sched] epoch 88: idx147888 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  70 tris/638 words
+[sched] epoch 89: idx148264 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  112 tris/1016 words
+[sched] epoch 90: idx148919 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  115 tris/1043 words
+[sched] epoch 91: idx149509 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  94 tris/854 words
+[sched] epoch 92: idx150125 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  77 tris/701 words
+[sched] epoch 93: idx150741 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  77 tris/701 words
+[sched] epoch 94: idx151344 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  41 tris/377 words
+[sched] epoch 95: idx152021 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  34 tris/314 words
+[sched] epoch 96: idx152420 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  29 tris/269 words
+[sched] epoch 97: idx152806 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  41 tris/377 words
+[sched] epoch 98: idx153218 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  19 tris/179 words
+[sched] epoch 99: idx153643 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  4 tris/44 words
+[sched] epoch 100: idx154029 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  39 tris/359 words
+[sched] epoch 101: idx154428 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  22 tris/206 words
+[sched] epoch 102: idx154853 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  22 tris/206 words
+[sched] epoch 103: idx155265 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  20 tris/188 words
+[sched] epoch 104: idx155664 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  10 tris/98 words
+[sched] epoch 105: idx156063 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  9 tris/89 words
+[sched] epoch 106: idx156566 tbp10240 cbp480  tex crc=0xb710940e (exp 0xb710940e)  140 tris/1268 words
+[sched] epoch 107: idx157273 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  122 tris/1106 words
+[sched] epoch 108: idx157967 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  83 tris/755 words
+[sched] epoch 109: idx158674 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  89 tris/809 words
+[sched] epoch 110: idx159420 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  55 tris/503 words
+[sched] epoch 111: idx160114 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  12 tris/116 words
+[sched] epoch 112: idx160331 tbp10240 cbp480  tex crc=0xb710940e (exp 0xb710940e)  40 tris/368 words
+[sched] epoch 113: idx160769 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  31 tris/287 words
+[sched] epoch 114: idx161168 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  48 tris/440 words
+[sched] epoch 115: idx161567 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  32 tris/296 words
+[sched] epoch 116: idx162300 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  43 tris/395 words
+[sched] epoch 117: idx162725 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  41 tris/377 words
+[sched] epoch 118: idx163163 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  27 tris/251 words
+[sched] epoch 119: idx163575 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  34 tris/314 words
+[sched] epoch 120: idx164204 tbp10240 cbp480  tex crc=0xb710940e (exp 0xb710940e)  71 tris/647 words
+[sched] epoch 121: idx164950 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  41 tris/377 words
+[sched] epoch 122: idx175995 tbp12288 cbp480  tex crc=0xf2553358 (exp 0xf2553358)  43 tris/395 words
+[sched] epoch 123: idx176446 tbp12288 cbp480  REUSE resident tex (crc 0xf2553358)  27 tris/251 words
+[sched] preclear COLOR 307200 words (0x0..0x12c000)  wr_bresp_errs=0
+[sched] preclear Z 153600 words (0x140000..0x1d6000)  wr_bresp_errs=0
+[sched] zbuf: armed early for fresh frame Z-preclear
+[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774)
+[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096)
+[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO
+[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=34
+[sched] epoch 0: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 1 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 1 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4)
+[sched] epoch 1: streamed 1547 words, staged_addr=1547 (exp 1547, < 4096)
+[sched] epoch 1: GO -> fresh drain frame_drained=1, records=171 (exp 171), FB beats=2066
+[sched] epoch 1: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192)
+[sched] epoch 2 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4)
+[sched] epoch 2: streamed 1772 words, staged_addr=1772 (exp 1772, < 4096)
+[sched] epoch 2: GO -> fresh drain frame_drained=1, records=196 (exp 196), FB beats=4632
+[sched] epoch 2: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 3 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 3 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98)
+[sched] epoch 3: streamed 350 words, staged_addr=350 (exp 350, < 4096)
+[sched] epoch 3: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=5094
+[sched] epoch 3: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 4 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 4 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2)
+[sched] epoch 4: streamed 1277 words, staged_addr=1277 (exp 1277, < 4096)
+[sched] epoch 4: GO -> fresh drain frame_drained=1, records=141 (exp 141), FB beats=8015
+[sched] epoch 4: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192)
+[sched] epoch 5 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2)
+[sched] epoch 5: streamed 107 words, staged_addr=107 (exp 107, < 4096)
+[sched] epoch 5: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=8337
+[sched] epoch 5: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192)
+[sched] epoch 6 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2)
+[sched] epoch 6: streamed 620 words, staged_addr=620 (exp 620, < 4096)
+[sched] epoch 6: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=9732
+[sched] epoch 6: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 7 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 7 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4)
+[sched] epoch 7: streamed 224 words, staged_addr=224 (exp 224, < 4096)
+[sched] epoch 7: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=9765
+[sched] epoch 7: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192)
+[sched] epoch 8 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4)
+[sched] epoch 8: streamed 593 words, staged_addr=593 (exp 593, < 4096)
+[sched] epoch 8: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=10023
+[sched] epoch 8: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192)
+[sched] epoch 9 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4)
+[sched] epoch 9: streamed 332 words, staged_addr=332 (exp 332, < 4096)
+[sched] epoch 9: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=10247
+[sched] epoch 9: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 10 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 10 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 10: streamed 53 words, staged_addr=53 (exp 53, < 4096)
+[sched] epoch 10: drain low pulse completed between host polls; counters advanced (records 36->5, FB beats 10247->10255)
+[sched] epoch 10: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=10255
+[sched] epoch 10: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 11 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 11: streamed 359 words, staged_addr=359 (exp 359, < 4096)
+[sched] epoch 11: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=10372
+[sched] epoch 11: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 12 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 12: streamed 602 words, staged_addr=602 (exp 602, < 4096)
+[sched] epoch 12: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=10609
+[sched] epoch 12: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 13 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 13: streamed 944 words, staged_addr=944 (exp 944, < 4096)
+[sched] epoch 13: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=10990
+[sched] epoch 13: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 14 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 14: streamed 557 words, staged_addr=557 (exp 557, < 4096)
+[sched] epoch 14: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=11236
+[sched] epoch 14: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 15 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 15: streamed 737 words, staged_addr=737 (exp 737, < 4096)
+[sched] epoch 15: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=11637
+[sched] epoch 15: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 16 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 16: streamed 1115 words, staged_addr=1115 (exp 1115, < 4096)
+[sched] epoch 16: GO -> fresh drain frame_drained=1, records=123 (exp 123), FB beats=12479
+[sched] epoch 16: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 17 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 17 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 17: streamed 728 words, staged_addr=728 (exp 728, < 4096)
+[sched] epoch 17: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=12809
+[sched] epoch 17: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 18 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 18: streamed 341 words, staged_addr=341 (exp 341, < 4096)
+[sched] epoch 18: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=12914
+[sched] epoch 18: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 19 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 19: streamed 296 words, staged_addr=296 (exp 296, < 4096)
+[sched] epoch 19: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=13002
+[sched] epoch 19: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 20 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 20: streamed 530 words, staged_addr=530 (exp 530, < 4096)
+[sched] epoch 20: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=13298
+[sched] epoch 20: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 21 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 21: streamed 683 words, staged_addr=683 (exp 683, < 4096)
+[sched] epoch 21: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=13685
+[sched] epoch 21: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 22 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 22: streamed 422 words, staged_addr=422 (exp 422, < 4096)
+[sched] epoch 22: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=13838
+[sched] epoch 22: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 23 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 23: streamed 665 words, staged_addr=665 (exp 665, < 4096)
+[sched] epoch 23: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=14294
+[sched] epoch 23: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 24 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 24: streamed 1151 words, staged_addr=1151 (exp 1151, < 4096)
+[sched] epoch 24: GO -> fresh drain frame_drained=1, records=127 (exp 127), FB beats=15058
+[sched] epoch 24: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 25 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 25: streamed 566 words, staged_addr=566 (exp 566, < 4096)
+[sched] epoch 25: GO -> fresh drain frame_drained=1, records=62 (exp 62), FB beats=15448
+[sched] epoch 25: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 26 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 26: streamed 638 words, staged_addr=638 (exp 638, < 4096)
+[sched] epoch 26: GO -> fresh drain frame_drained=1, records=70 (exp 70), FB beats=15839
+[sched] epoch 26: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 27 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 27 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 27: streamed 458 words, staged_addr=458 (exp 458, < 4096)
+[sched] epoch 27: GO -> fresh drain frame_drained=1, records=50 (exp 50), FB beats=16231
+[sched] epoch 27: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 28 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 28: streamed 476 words, staged_addr=476 (exp 476, < 4096)
+[sched] epoch 28: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=16373
+[sched] epoch 28: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 29 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 29: streamed 845 words, staged_addr=845 (exp 845, < 4096)
+[sched] epoch 29: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=16892
+[sched] epoch 29: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 30 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 30: streamed 629 words, staged_addr=629 (exp 629, < 4096)
+[sched] epoch 30: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=17083
+[sched] epoch 30: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 31 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 31: streamed 728 words, staged_addr=728 (exp 728, < 4096)
+[sched] epoch 31: GO -> fresh drain frame_drained=1, records=80 (exp 80), FB beats=17302
+[sched] epoch 31: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 32 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 32: streamed 476 words, staged_addr=476 (exp 476, < 4096)
+[sched] epoch 32: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=17490
+[sched] epoch 32: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 33 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 33: streamed 854 words, staged_addr=854 (exp 854, < 4096)
+[sched] epoch 33: GO -> fresh drain frame_drained=1, records=94 (exp 94), FB beats=17808
+[sched] epoch 33: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 34 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 34: streamed 602 words, staged_addr=602 (exp 602, < 4096)
+[sched] epoch 34: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=17893
+[sched] epoch 34: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 35 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 35: streamed 395 words, staged_addr=395 (exp 395, < 4096)
+[sched] epoch 35: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=17938
+[sched] epoch 35: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 36 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 36: streamed 26 words, staged_addr=26 (exp 26, < 4096)
+[sched] epoch 36: drain low pulse completed between host polls; counters advanced (records 43->2, FB beats 17938->17950)
+[sched] epoch 36: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=17950
+[sched] epoch 36: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 37 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 37: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096)
+[sched] epoch 37: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=20519
+[sched] epoch 37: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 38 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 38: streamed 899 words, staged_addr=899 (exp 899, < 4096)
+[sched] epoch 38: GO -> fresh drain frame_drained=1, records=99 (exp 99), FB beats=21291
+[sched] epoch 38: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 39 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 39: streamed 1745 words, staged_addr=1745 (exp 1745, < 4096)
+[sched] epoch 39: GO -> fresh drain frame_drained=1, records=193 (exp 193), FB beats=24321
+[sched] epoch 39: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 40 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 40: streamed 485 words, staged_addr=485 (exp 485, < 4096)
+[sched] epoch 40: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=24699
+[sched] epoch 40: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 41 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 41 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2)
+[sched] epoch 41: streamed 188 words, staged_addr=188 (exp 188, < 4096)
+[sched] epoch 41: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=24817
+[sched] epoch 41: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 42 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 42 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 42: streamed 1376 words, staged_addr=1376 (exp 1376, < 4096)
+[sched] epoch 42: GO -> fresh drain frame_drained=1, records=152 (exp 152), FB beats=25231
+[sched] epoch 42: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 43 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 43: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096)
+[sched] epoch 43: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=25977
+[sched] epoch 43: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 44 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 44: streamed 170 words, staged_addr=170 (exp 170, < 4096)
+[sched] epoch 44: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=26081
+[sched] epoch 44: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 45 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 45: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096)
+[sched] epoch 45: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=27529
+[sched] epoch 45: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 46: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 46 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 46: streamed 224 words, staged_addr=224 (exp 224, < 4096)
+[sched] epoch 46: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=27726
+[sched] epoch 46: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 47 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 47: streamed 1421 words, staged_addr=1421 (exp 1421, < 4096)
+[sched] epoch 47: GO -> fresh drain frame_drained=1, records=157 (exp 157), FB beats=28790
+[sched] epoch 47: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 48 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 48: streamed 1457 words, staged_addr=1457 (exp 1457, < 4096)
+[sched] epoch 48: GO -> fresh drain frame_drained=1, records=161 (exp 161), FB beats=29665
+[sched] epoch 48: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 49 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 49: streamed 1988 words, staged_addr=1988 (exp 1988, < 4096)
+[sched] epoch 49: GO -> fresh drain frame_drained=1, records=220 (exp 220), FB beats=30739
+[sched] epoch 49: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 50 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 50: streamed 1547 words, staged_addr=1547 (exp 1547, < 4096)
+[sched] epoch 50: GO -> fresh drain frame_drained=1, records=171 (exp 171), FB beats=31294
+[sched] epoch 50: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 51: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 51 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 51: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096)
+[sched] epoch 51: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=32069
+[sched] epoch 51: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 52 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 52: streamed 503 words, staged_addr=503 (exp 503, < 4096)
+[sched] epoch 52: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=32474
+[sched] epoch 52: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 53: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 53 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 53: streamed 1331 words, staged_addr=1331 (exp 1331, < 4096)
+[sched] epoch 53: GO -> fresh drain frame_drained=1, records=147 (exp 147), FB beats=33463
+[sched] epoch 53: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 54 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 54: streamed 1502 words, staged_addr=1502 (exp 1502, < 4096)
+[sched] epoch 54: GO -> fresh drain frame_drained=1, records=166 (exp 166), FB beats=36312
+[sched] epoch 54: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 55 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 55: streamed 575 words, staged_addr=575 (exp 575, < 4096)
+[sched] epoch 55: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=36998
+[sched] epoch 55: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 56: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 56 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 56: streamed 1070 words, staged_addr=1070 (exp 1070, < 4096)
+[sched] epoch 56: GO -> fresh drain frame_drained=1, records=118 (exp 118), FB beats=38441
+[sched] epoch 56: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 57 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 57: streamed 863 words, staged_addr=863 (exp 863, < 4096)
+[sched] epoch 57: GO -> fresh drain frame_drained=1, records=95 (exp 95), FB beats=39615
+[sched] epoch 57: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 58 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 58: streamed 791 words, staged_addr=791 (exp 791, < 4096)
+[sched] epoch 58: GO -> fresh drain frame_drained=1, records=87 (exp 87), FB beats=41245
+[sched] epoch 58: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 59: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 59 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 59: streamed 152 words, staged_addr=152 (exp 152, < 4096)
+[sched] epoch 59: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=41272
+[sched] epoch 59: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 60 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 60: streamed 260 words, staged_addr=260 (exp 260, < 4096)
+[sched] epoch 60: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=41366
+[sched] epoch 60: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 61 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 61: streamed 314 words, staged_addr=314 (exp 314, < 4096)
+[sched] epoch 61: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=41513
+[sched] epoch 61: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 62 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 62: streamed 62 words, staged_addr=62 (exp 62, < 4096)
+[sched] epoch 62: drain low pulse completed between host polls; counters advanced (records 34->6, FB beats 41513->41560)
+[sched] epoch 62: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=41560
+[sched] epoch 62: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 63 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 63: streamed 359 words, staged_addr=359 (exp 359, < 4096)
+[sched] epoch 63: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=41756
+[sched] epoch 63: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 64 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 64: streamed 359 words, staged_addr=359 (exp 359, < 4096)
+[sched] epoch 64: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=42002
+[sched] epoch 64: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 65 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 65: streamed 557 words, staged_addr=557 (exp 557, < 4096)
+[sched] epoch 65: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=42527
+[sched] epoch 65: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 66 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 66: streamed 467 words, staged_addr=467 (exp 467, < 4096)
+[sched] epoch 66: GO -> fresh drain frame_drained=1, records=51 (exp 51), FB beats=42946
+[sched] epoch 66: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 67 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 67: streamed 449 words, staged_addr=449 (exp 449, < 4096)
+[sched] epoch 67: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=43181
+[sched] epoch 67: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 68 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 68: streamed 62 words, staged_addr=62 (exp 62, < 4096)
+[sched] epoch 68: drain low pulse completed between host polls; counters advanced (records 49->6, FB beats 43181->43211)
+[sched] epoch 68: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=43211
+[sched] epoch 68: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 69 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 69: streamed 1205 words, staged_addr=1205 (exp 1205, < 4096)
+[sched] epoch 69: GO -> fresh drain frame_drained=1, records=133 (exp 133), FB beats=43985
+[sched] epoch 69: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 70 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 70: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096)
+[sched] epoch 70: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=44782
+[sched] epoch 70: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 71 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 71: streamed 1673 words, staged_addr=1673 (exp 1673, < 4096)
+[sched] epoch 71: GO -> fresh drain frame_drained=1, records=185 (exp 185), FB beats=47595
+[sched] epoch 71: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 72 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 72: streamed 233 words, staged_addr=233 (exp 233, < 4096)
+[sched] epoch 72: GO -> fresh drain frame_drained=1, records=25 (exp 25), FB beats=48240
+[sched] epoch 72: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 73 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 73: streamed 485 words, staged_addr=485 (exp 485, < 4096)
+[sched] epoch 73: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=50226
+[sched] epoch 73: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 74 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 74: streamed 557 words, staged_addr=557 (exp 557, < 4096)
+[sched] epoch 74: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=52274
+[sched] epoch 74: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 75 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 75: streamed 521 words, staged_addr=521 (exp 521, < 4096)
+[sched] epoch 75: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=54506
+[sched] epoch 75: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 76 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 76: streamed 683 words, staged_addr=683 (exp 683, < 4096)
+[sched] epoch 76: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=56054
+[sched] epoch 76: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 77 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 77: streamed 1376 words, staged_addr=1376 (exp 1376, < 4096)
+[sched] epoch 77: GO -> fresh drain frame_drained=1, records=152 (exp 152), FB beats=57480
+[sched] epoch 77: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 78 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 78: streamed 944 words, staged_addr=944 (exp 944, < 4096)
+[sched] epoch 78: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=59865
+[sched] epoch 78: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 79 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 79: streamed 620 words, staged_addr=620 (exp 620, < 4096)
+[sched] epoch 79: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=62334
+[sched] epoch 79: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 80 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 80: streamed 53 words, staged_addr=53 (exp 53, < 4096)
+[sched] epoch 80: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=62537
+[sched] epoch 80: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 81 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 81: streamed 26 words, staged_addr=26 (exp 26, < 4096)
+[sched] epoch 81: drain low pulse completed between host polls; counters advanced (records 5->2, FB beats 62537->62538)
+[sched] epoch 81: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=62538
+[sched] epoch 81: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 82 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 82 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98)
+[sched] epoch 82: streamed 179 words, staged_addr=179 (exp 179, < 4096)
+[sched] epoch 82: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=62581
+[sched] epoch 82: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 83: REUSE resident texture (no upload/fill): crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192)
+[sched] epoch 83 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98)
+[sched] epoch 83: streamed 116 words, staged_addr=116 (exp 116, < 4096)
+[sched] epoch 83: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=62659
+[sched] epoch 83: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 84 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 84 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9)
+[sched] epoch 84: streamed 1052 words, staged_addr=1052 (exp 1052, < 4096)
+[sched] epoch 84: GO -> fresh drain frame_drained=1, records=116 (exp 116), FB beats=62879
+[sched] epoch 84: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 85: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 85 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9)
+[sched] epoch 85: streamed 278 words, staged_addr=278 (exp 278, < 4096)
+[sched] epoch 85: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=62964
+[sched] epoch 85: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 86 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9)
+[sched] epoch 86: streamed 332 words, staged_addr=332 (exp 332, < 4096)
+[sched] epoch 86: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=63038
+[sched] epoch 86: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 87 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 87 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff)
+[sched] epoch 87: streamed 710 words, staged_addr=710 (exp 710, < 4096)
+[sched] epoch 87: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=63310
+[sched] epoch 87: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 88: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 88 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff)
+[sched] epoch 88: streamed 638 words, staged_addr=638 (exp 638, < 4096)
+[sched] epoch 88: GO -> fresh drain frame_drained=1, records=70 (exp 70), FB beats=63695
+[sched] epoch 88: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 89 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff)
+[sched] epoch 89: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096)
+[sched] epoch 89: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=64192
+[sched] epoch 89: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 90 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 90 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 90: streamed 1043 words, staged_addr=1043 (exp 1043, < 4096)
+[sched] epoch 90: GO -> fresh drain frame_drained=1, records=115 (exp 115), FB beats=64564
+[sched] epoch 90: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 91: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 91 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 91: streamed 854 words, staged_addr=854 (exp 854, < 4096)
+[sched] epoch 91: GO -> fresh drain frame_drained=1, records=94 (exp 94), FB beats=64911
+[sched] epoch 91: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 92 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 92: streamed 701 words, staged_addr=701 (exp 701, < 4096)
+[sched] epoch 92: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=65128
+[sched] epoch 92: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 93 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 93: streamed 701 words, staged_addr=701 (exp 701, < 4096)
+[sched] epoch 93: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=65337
+[sched] epoch 93: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 94 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 94: streamed 377 words, staged_addr=377 (exp 377, < 4096)
+[sched] epoch 94: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=65473
+[sched] epoch 94: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 95 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 95 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 95: streamed 314 words, staged_addr=314 (exp 314, < 4096)
+[sched] epoch 95: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=65518
+[sched] epoch 95: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 96: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 96 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 96: streamed 269 words, staged_addr=269 (exp 269, < 4096)
+[sched] epoch 96: GO -> fresh drain frame_drained=1, records=29 (exp 29), FB beats=65565
+[sched] epoch 96: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 97 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 97: streamed 377 words, staged_addr=377 (exp 377, < 4096)
+[sched] epoch 97: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=65609
+[sched] epoch 97: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 98 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 98: streamed 179 words, staged_addr=179 (exp 179, < 4096)
+[sched] epoch 98: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=65627
+[sched] epoch 98: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 99 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 99: streamed 44 words, staged_addr=44 (exp 44, < 4096)
+[sched] epoch 99: drain low pulse completed between host polls; counters advanced (records 19->4, FB beats 65627->65630)
+[sched] epoch 99: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=65630
+[sched] epoch 99: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 100 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 100: streamed 359 words, staged_addr=359 (exp 359, < 4096)
+[sched] epoch 100: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=65679
+[sched] epoch 100: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 101 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 101: streamed 206 words, staged_addr=206 (exp 206, < 4096)
+[sched] epoch 101: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=65752
+[sched] epoch 101: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 102 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 102: streamed 206 words, staged_addr=206 (exp 206, < 4096)
+[sched] epoch 102: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=65780
+[sched] epoch 102: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 103 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 103: streamed 188 words, staged_addr=188 (exp 188, < 4096)
+[sched] epoch 103: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=65847
+[sched] epoch 103: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 104 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 104: streamed 98 words, staged_addr=98 (exp 98, < 4096)
+[sched] epoch 104: drain low pulse completed between host polls; counters advanced (records 20->10, FB beats 65847->65860)
+[sched] epoch 104: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=65860
+[sched] epoch 104: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 105 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 105: streamed 89 words, staged_addr=89 (exp 89, < 4096)
+[sched] epoch 105: drain low pulse completed between host polls; counters advanced (records 10->9, FB beats 65860->65870)
+[sched] epoch 105: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=65870
+[sched] epoch 105: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 106 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 106 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 106: streamed 1268 words, staged_addr=1268 (exp 1268, < 4096)
+[sched] epoch 106: GO -> fresh drain frame_drained=1, records=140 (exp 140), FB beats=66277
+[sched] epoch 106: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 107: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 107 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 107: streamed 1106 words, staged_addr=1106 (exp 1106, < 4096)
+[sched] epoch 107: GO -> fresh drain frame_drained=1, records=122 (exp 122), FB beats=66683
+[sched] epoch 107: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 108 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 108: streamed 755 words, staged_addr=755 (exp 755, < 4096)
+[sched] epoch 108: GO -> fresh drain frame_drained=1, records=83 (exp 83), FB beats=67016
+[sched] epoch 108: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 109 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 109: streamed 809 words, staged_addr=809 (exp 809, < 4096)
+[sched] epoch 109: GO -> fresh drain frame_drained=1, records=89 (exp 89), FB beats=67306
+[sched] epoch 109: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 110 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 110: streamed 503 words, staged_addr=503 (exp 503, < 4096)
+[sched] epoch 110: GO -> fresh drain frame_drained=1, records=55 (exp 55), FB beats=67479
+[sched] epoch 110: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 111 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 111: streamed 116 words, staged_addr=116 (exp 116, < 4096)
+[sched] epoch 111: drain low pulse completed between host polls; counters advanced (records 55->12, FB beats 67479->67510)
+[sched] epoch 111: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=67510
+[sched] epoch 111: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 112 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 112 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 112: streamed 368 words, staged_addr=368 (exp 368, < 4096)
+[sched] epoch 112: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=67584
+[sched] epoch 112: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 113: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 113 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 113: streamed 287 words, staged_addr=287 (exp 287, < 4096)
+[sched] epoch 113: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=67627
+[sched] epoch 113: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 114 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 114: streamed 440 words, staged_addr=440 (exp 440, < 4096)
+[sched] epoch 114: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=67673
+[sched] epoch 114: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 115 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 115: streamed 296 words, staged_addr=296 (exp 296, < 4096)
+[sched] epoch 115: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=67738
+[sched] epoch 115: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 116 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 116: streamed 395 words, staged_addr=395 (exp 395, < 4096)
+[sched] epoch 116: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=67779
+[sched] epoch 116: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 117 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 117: streamed 377 words, staged_addr=377 (exp 377, < 4096)
+[sched] epoch 117: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=67820
+[sched] epoch 117: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 118 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 118: streamed 251 words, staged_addr=251 (exp 251, < 4096)
+[sched] epoch 118: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=67858
+[sched] epoch 118: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 119 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 119: streamed 314 words, staged_addr=314 (exp 314, < 4096)
+[sched] epoch 119: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=67881
+[sched] epoch 119: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 120 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 120 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05)
+[sched] epoch 120: streamed 647 words, staged_addr=647 (exp 647, < 4096)
+[sched] epoch 120: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=67996
+[sched] epoch 120: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 121: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 121 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05)
+[sched] epoch 121: streamed 377 words, staged_addr=377 (exp 377, < 4096)
+[sched] epoch 121: GO -> fresh drain frame_drained=1, records=41 (exp 41), FB beats=68055
+[sched] epoch 121: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 122 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 122 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1)
+[sched] epoch 122: streamed 395 words, staged_addr=395 (exp 395, < 4096)
+[sched] epoch 122: GO -> fresh drain frame_drained=1, records=43 (exp 43), FB beats=68127
+[sched] epoch 122: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 123: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192)
+[sched] epoch 123 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1)
+[sched] epoch 123: streamed 251 words, staged_addr=251 (exp 251, < 4096)
+[sched] epoch 123: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=68157
+[sched] epoch 123: zero fragment drops (snap=0, sticky=0)
+[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f16_board_fb.mem  sum32=0x7471b496 xor32=0x81d4dea0 nonzero=114231 bounds=(1,11)..(512,478) FB=640x480
+[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (124-epoch composite)
+[sched] DONE rc=0 (all gates passed)

sim/data/top_psmct32_raster_demo/sh3_zsrt139f16_epochs.txt

@@ -0,0 +1,130 @@
+# Ch415 epoch descriptor table (124 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 124 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 1772 12288 480 sh3_zsrt139f160_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f160.mem 44 4 0 sh3_zsrt139f160_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f161_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f161.mem 1547 171 0 sh3_zsrt139f161_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f161_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f162.mem 1772 196 1 sh3_zsrt139f161_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f163_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f163.mem 350 38 0 sh3_zsrt139f163_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f164_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f164.mem 1277 141 0 sh3_zsrt139f164_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f164_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f165.mem 107 11 1 sh3_zsrt139f164_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f164_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f166.mem 620 68 1 sh3_zsrt139f164_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f167_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f167.mem 224 24 0 sh3_zsrt139f167_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f167_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f168.mem 593 65 1 sh3_zsrt139f167_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f167_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f169.mem 332 36 1 sh3_zsrt139f167_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1610.mem 53 5 0 sh3_zsrt139f1610_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1611.mem 359 39 1 sh3_zsrt139f1610_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1612.mem 602 66 1 sh3_zsrt139f1610_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1613.mem 944 104 1 sh3_zsrt139f1610_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1614.mem 557 61 1 sh3_zsrt139f1610_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1615.mem 737 81 1 sh3_zsrt139f1610_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f1610_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1616.mem 1115 123 1 sh3_zsrt139f1610_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1617.mem 728 80 0 sh3_zsrt139f1617_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1618.mem 341 37 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1619.mem 296 32 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1620.mem 530 58 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1621.mem 683 75 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1622.mem 422 46 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1623.mem 665 73 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1624.mem 1151 127 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1625.mem 566 62 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f1617_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1626.mem 638 70 1 sh3_zsrt139f1617_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1627.mem 458 50 0 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1628.mem 476 52 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1629.mem 845 93 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1630.mem 629 69 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1631.mem 728 80 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1632.mem 476 52 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1633.mem 854 94 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1634.mem 602 66 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1635.mem 395 43 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1636.mem 26 2 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1637.mem 2042 226 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1638.mem 899 99 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1639.mem 1745 193 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f1627_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1640.mem 485 53 1 sh3_zsrt139f1627_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f1641_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1641.mem 188 20 0 sh3_zsrt139f1641_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1642.mem 1376 152 0 sh3_zsrt139f1642_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1643.mem 2042 226 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1644.mem 170 18 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1645.mem 2042 226 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1646.mem 224 24 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1647.mem 1421 157 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1648.mem 1457 161 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+49 117599 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1649.mem 1988 220 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+50 118238 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1650.mem 1547 171 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+51 118877 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1651.mem 1187 131 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+52 119471 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1652.mem 503 55 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+53 120110 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1653.mem 1331 147 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+54 120749 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1654.mem 1502 166 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1655.mem 575 63 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+56 121388 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1656.mem 1070 118 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+57 122027 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1657.mem 863 95 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+58 122600 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1658.mem 791 87 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+59 123239 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1659.mem 152 16 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+60 123869 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1660.mem 260 28 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+61 124508 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1661.mem 314 34 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+62 125147 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1662.mem 62 6 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+63 125786 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1663.mem 359 39 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+64 126434 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1664.mem 359 39 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+65 126968 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1665.mem 557 61 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+66 127607 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1666.mem 467 51 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+67 128246 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1667.mem 449 49 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+68 128885 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1668.mem 62 6 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+69 129389 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1669.mem 1205 133 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+70 130028 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1670.mem 1025 113 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+71 130667 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1671.mem 1673 185 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+72 130667 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1672.mem 233 25 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+73 131306 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1673.mem 485 53 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+74 131306 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1674.mem 557 61 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+75 131306 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1675.mem 521 57 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+76 131306 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1676.mem 683 75 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+77 131945 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1677.mem 1376 152 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+78 132584 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1678.mem 944 104 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+79 133262 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1679.mem 620 68 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+80 133262 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1680.mem 53 5 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+81 135869 8192 480 sh3_zsrt139f1642_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1681.mem 26 2 1 sh3_zsrt139f1642_pal.mem 0x47097d4c
+82 144890 12288 480 sh3_zsrt139f1682_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1682.mem 179 19 0 sh3_zsrt139f1682_pal.mem 0x3e849a98
+83 145712 12288 480 sh3_zsrt139f1682_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1683.mem 116 12 1 sh3_zsrt139f1682_pal.mem 0x3e849a98
+84 146205 11264 480 sh3_zsrt139f1684_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1684.mem 1052 116 0 sh3_zsrt139f1684_pal.mem 0xfd978fd9
+85 146630 11264 480 sh3_zsrt139f1684_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1685.mem 278 30 1 sh3_zsrt139f1684_pal.mem 0xfd978fd9
+86 147068 11264 480 sh3_zsrt139f1684_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1686.mem 332 36 1 sh3_zsrt139f1684_pal.mem 0xfd978fd9
+87 147480 11264 480 sh3_zsrt139f1687_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1687.mem 710 78 0 sh3_zsrt139f1687_pal.mem 0xd5ed05ff
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+89 148264 11264 480 sh3_zsrt139f1687_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1689.mem 1016 112 1 sh3_zsrt139f1687_pal.mem 0xd5ed05ff
+90 148919 11264 480 sh3_zsrt139f1690_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1690.mem 1043 115 0 sh3_zsrt139f1690_pal.mem 0xcdf8a4d8
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sim/data/top_psmct32_raster_demo/sh3_zsrt139f17_epochs.txt

@@ -0,0 +1,269 @@
+# Ch416 epoch descriptor table (263 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 263 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f170.mem 44 4 0 sh3_zsrt139f170_pal.mem 0x60778774
+1 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f171.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+2 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f172.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+3 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f173.mem 71 7 1 sh3_zsrt139f170_pal.mem 0x60778774
+4 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f174.mem 98 10 1 sh3_zsrt139f170_pal.mem 0x60778774
+5 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f175.mem 152 16 1 sh3_zsrt139f170_pal.mem 0x60778774
+6 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f176.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774
+7 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f177.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+8 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f178.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774
+9 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f179.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774
+10 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1710.mem 152 16 1 sh3_zsrt139f170_pal.mem 0x60778774
+11 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1711.mem 674 74 1 sh3_zsrt139f170_pal.mem 0x60778774
+12 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1712.mem 179 19 1 sh3_zsrt139f170_pal.mem 0x60778774
+13 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1713.mem 287 31 1 sh3_zsrt139f170_pal.mem 0x60778774
+14 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1714.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774
+15 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1715.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+16 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1716.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774
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+229 148919 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17229.mem 944 104 0 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8
+230 149509 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17230.mem 1115 123 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8
+231 150125 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17231.mem 1259 139 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8
+232 150741 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17232.mem 1403 155 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8
+233 151344 11264 480 sh3_zsrt139f17229_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17233.mem 1430 158 1 sh3_zsrt139f17229_pal.mem 0xcdf8a4d8
+234 152021 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17234.mem 530 58 0 sh3_zsrt139f17234_pal.mem 0xc6784386
+235 152420 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17235.mem 773 85 1 sh3_zsrt139f17234_pal.mem 0xc6784386
+236 152806 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17236.mem 818 90 1 sh3_zsrt139f17234_pal.mem 0xc6784386
+237 153218 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17237.mem 485 53 1 sh3_zsrt139f17234_pal.mem 0xc6784386
+238 153643 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17238.mem 854 94 1 sh3_zsrt139f17234_pal.mem 0xc6784386
+239 154029 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17239.mem 791 87 1 sh3_zsrt139f17234_pal.mem 0xc6784386
+240 154428 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17240.mem 665 73 1 sh3_zsrt139f17234_pal.mem 0xc6784386
+241 154853 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17241.mem 881 97 1 sh3_zsrt139f17234_pal.mem 0xc6784386
+242 155265 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17242.mem 818 90 1 sh3_zsrt139f17234_pal.mem 0xc6784386
+243 155664 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17243.mem 791 87 1 sh3_zsrt139f17234_pal.mem 0xc6784386
+244 156063 11264 480 sh3_zsrt139f17234_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f17244.mem 557 61 1 sh3_zsrt139f17234_pal.mem 0xc6784386
+245 156566 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17245.mem 1439 159 0 sh3_zsrt139f17245_pal.mem 0x00fd9028
+246 157273 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17246.mem 1295 143 1 sh3_zsrt139f17245_pal.mem 0x00fd9028
+247 157967 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17247.mem 1295 143 1 sh3_zsrt139f17245_pal.mem 0x00fd9028
+248 158674 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17248.mem 1457 161 1 sh3_zsrt139f17245_pal.mem 0x00fd9028
+249 159420 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17249.mem 1052 116 1 sh3_zsrt139f17245_pal.mem 0x00fd9028
+250 160114 10240 480 sh3_zsrt139f17245_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17250.mem 440 48 1 sh3_zsrt139f17245_pal.mem 0x00fd9028
+251 160331 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17251.mem 881 97 0 sh3_zsrt139f17251_pal.mem 0xd8d19684
+252 160769 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17252.mem 890 98 1 sh3_zsrt139f17251_pal.mem 0xd8d19684
+253 161168 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17253.mem 863 95 1 sh3_zsrt139f17251_pal.mem 0xd8d19684
+254 161567 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17254.mem 998 110 1 sh3_zsrt139f17251_pal.mem 0xd8d19684
+255 162300 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17255.mem 845 93 1 sh3_zsrt139f17251_pal.mem 0xd8d19684
+256 162725 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17256.mem 683 75 1 sh3_zsrt139f17251_pal.mem 0xd8d19684
+257 163163 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17257.mem 548 60 1 sh3_zsrt139f17251_pal.mem 0xd8d19684
+258 163575 10240 480 sh3_zsrt139f17251_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17258.mem 611 67 1 sh3_zsrt139f17251_pal.mem 0xd8d19684
+259 164204 10240 480 sh3_zsrt139f17259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17259.mem 1079 119 0 sh3_zsrt139f17259_pal.mem 0xaa4e7e05
+260 164950 10240 480 sh3_zsrt139f17259_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f17260.mem 701 77 1 sh3_zsrt139f17259_pal.mem 0xaa4e7e05
+261 175995 12288 480 sh3_zsrt139f17261_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f17261.mem 656 72 0 sh3_zsrt139f17261_pal.mem 0x56ebf1d1
+262 176446 12288 480 sh3_zsrt139f17261_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f17262.mem 782 86 1 sh3_zsrt139f17261_pal.mem 0x56ebf1d1

sim/data/top_psmct32_raster_demo/sh3_zsrt139f18_epochs.txt

@@ -0,0 +1,286 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f17', 'zsrt139f18r']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 283 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f170.mem 44 4 0 sh3_zsrt139f170_pal.mem 0x60778774
+1 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f171.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+2 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f172.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+3 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f173.mem 71 7 1 sh3_zsrt139f170_pal.mem 0x60778774
+4 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f174.mem 98 10 1 sh3_zsrt139f170_pal.mem 0x60778774
+5 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f175.mem 152 16 1 sh3_zsrt139f170_pal.mem 0x60778774
+6 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f176.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774
+7 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f177.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+8 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f178.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774
+9 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f179.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774
+10 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1710.mem 152 16 1 sh3_zsrt139f170_pal.mem 0x60778774
+11 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1711.mem 674 74 1 sh3_zsrt139f170_pal.mem 0x60778774
+12 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1712.mem 179 19 1 sh3_zsrt139f170_pal.mem 0x60778774
+13 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1713.mem 287 31 1 sh3_zsrt139f170_pal.mem 0x60778774
+14 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1714.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774
+15 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1715.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+16 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1716.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774
+17 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1717.mem 71 7 1 sh3_zsrt139f170_pal.mem 0x60778774
+18 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1718.mem 116 12 1 sh3_zsrt139f170_pal.mem 0x60778774
+19 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1719.mem 125 13 1 sh3_zsrt139f170_pal.mem 0x60778774
+20 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1720.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774
+21 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1721.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+22 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1722.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774
+23 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1723.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774
+24 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1724.mem 350 38 1 sh3_zsrt139f170_pal.mem 0x60778774
+25 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1725.mem 386 42 1 sh3_zsrt139f170_pal.mem 0x60778774
+26 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1726.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+27 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1727.mem 35 3 1 sh3_zsrt139f170_pal.mem 0x60778774
+28 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1728.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774
+29 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1729.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774
+30 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1730.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774
+31 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1731.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+32 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1732.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774
+33 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1733.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774
+34 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1734.mem 170 18 1 sh3_zsrt139f170_pal.mem 0x60778774
+35 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1735.mem 116 12 1 sh3_zsrt139f170_pal.mem 0x60778774
+36 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1736.mem 134 14 1 sh3_zsrt139f170_pal.mem 0x60778774
+37 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1737.mem 80 8 1 sh3_zsrt139f170_pal.mem 0x60778774
+38 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1738.mem 62 6 1 sh3_zsrt139f170_pal.mem 0x60778774
+39 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1739.mem 53 5 1 sh3_zsrt139f170_pal.mem 0x60778774
+40 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1740.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774
+41 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1741.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774
+42 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1742.mem 44 4 1 sh3_zsrt139f170_pal.mem 0x60778774
+43 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1743.mem 35 3 1 sh3_zsrt139f170_pal.mem 0x60778774
+44 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1744.mem 35 3 1 sh3_zsrt139f170_pal.mem 0x60778774
+45 1772 12288 480 sh3_zsrt139f170_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f1745.mem 17 1 1 sh3_zsrt139f170_pal.mem 0x60778774
+46 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1746.mem 521 57 0 sh3_zsrt139f1746_pal.mem 0x32ed74c4
+47 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1747.mem 485 53 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4
+48 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1748.mem 224 24 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4
+49 6822 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1749.mem 26 2 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4
+50 8151 11264 480 sh3_zsrt139f1746_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f1750.mem 1781 197 1 sh3_zsrt139f1746_pal.mem 0x32ed74c4
+51 12757 10240 480 sh3_zsrt139f1751_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1751.mem 2042 226 0 sh3_zsrt139f1751_pal.mem 0x3cd88c98
+52 12757 10240 480 sh3_zsrt139f1751_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f1752.mem 269 29 1 sh3_zsrt139f1751_pal.mem 0x3cd88c98
+53 15277 12288 480 sh3_zsrt139f1753_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1753.mem 2042 226 0 sh3_zsrt139f1753_pal.mem 0x4812d6f2
+54 15277 12288 480 sh3_zsrt139f1753_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1754.mem 791 87 1 sh3_zsrt139f1753_pal.mem 0x4812d6f2
+55 15931 12288 480 sh3_zsrt139f1753_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f1755.mem 710 78 1 sh3_zsrt139f1753_pal.mem 0x4812d6f2
+56 20246 11264 480 sh3_zsrt139f1756_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1756.mem 233 25 0 sh3_zsrt139f1756_pal.mem 0x5cbf8bb4
+57 20792 11264 480 sh3_zsrt139f1756_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1757.mem 845 93 1 sh3_zsrt139f1756_pal.mem 0x5cbf8bb4
+58 21386 11264 480 sh3_zsrt139f1756_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f1758.mem 1349 149 1 sh3_zsrt139f1756_pal.mem 0x5cbf8bb4
+59 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1759.mem 170 18 0 sh3_zsrt139f1759_pal.mem 0x47405cb0
+60 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1760.mem 143 15 1 sh3_zsrt139f1759_pal.mem 0x47405cb0
+61 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1761.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0
+62 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1762.mem 98 10 1 sh3_zsrt139f1759_pal.mem 0x47405cb0
+63 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1763.mem 188 20 1 sh3_zsrt139f1759_pal.mem 0x47405cb0
+64 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1764.mem 80 8 1 sh3_zsrt139f1759_pal.mem 0x47405cb0
+65 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1765.mem 332 36 1 sh3_zsrt139f1759_pal.mem 0x47405cb0
+66 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1766.mem 62 6 1 sh3_zsrt139f1759_pal.mem 0x47405cb0
+67 30461 10240 480 sh3_zsrt139f1759_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1767.mem 44 4 1 sh3_zsrt139f1759_pal.mem 0x47405cb0
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+275 75195 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r12.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+276 75195 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r13.mem 1052 116 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+277 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r14.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+278 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r15.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+279 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r16.mem 800 88 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+280 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r17.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+281 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r18.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+282 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r19.mem 458 50 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae

sim/data/top_psmct32_raster_demo/sh3_zsrt139f18r_epochs.txt

@@ -0,0 +1,26 @@
+# Ch419 epoch descriptor table (20 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 20 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 71361 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r0.mem 2042 226 0 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+1 71361 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r1.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+2 71361 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r2.mem 161 17 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+3 72213 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r3.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+4 72213 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r4.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+5 72213 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r5.mem 26 2 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+6 73278 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r6.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+7 73278 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r7.mem 1916 212 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+8 74130 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r8.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+9 74130 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r9.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+10 74130 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r10.mem 629 69 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+11 75195 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r11.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+12 75195 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r12.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+13 75195 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r13.mem 1052 116 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+14 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r14.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+15 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r15.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+16 76047 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r16.mem 800 88 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+17 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r17.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+18 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r18.mem 2042 226 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae
+19 77112 10240 480 sh3_zsrt139f18r0_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f18r19.mem 458 50 1 sh3_zsrt139f18r0_pal.mem 0x43ece1ae

sim/data/top_psmct32_raster_demo/sh3_zsrt139f19_ch424_board_run.log

@@ -0,0 +1,766 @@
+[sudo] password for terasic: [sched] feeder ready=1
+[sched] scene sh3_zsrt139f19_epochs.txt: 125 epochs, FB 307200 words, tex 65536 words/8192 beats
+[sched] epoch 0: idx1772 tbp12288 cbp480  tex crc=0x42d367ae (exp 0x42d367ae)  4 tris/44 words
+[sched] epoch 1: idx6822 tbp11264 cbp480  tex crc=0x55070afa (exp 0x55070afa)  175 tris/1583 words
+[sched] epoch 2: idx8151 tbp11264 cbp480  REUSE resident tex (crc 0x55070afa)  203 tris/1835 words
+[sched] epoch 3: idx12757 tbp10240 cbp480  tex crc=0x26a88b77 (exp 0x26a88b77)  38 tris/350 words
+[sched] epoch 4: idx15277 tbp12288 cbp480  tex crc=0x835dceb6 (exp 0x835dceb6)  146 tris/1322 words
+[sched] epoch 5: idx15277 tbp12288 cbp480  REUSE resident tex (crc 0x835dceb6)  12 tris/116 words
+[sched] epoch 6: idx15931 tbp12288 cbp480  REUSE resident tex (crc 0x835dceb6)  69 tris/629 words
+[sched] epoch 7: idx20246 tbp11264 cbp480  tex crc=0x95a83cbc (exp 0x95a83cbc)  28 tris/260 words
+[sched] epoch 8: idx20792 tbp11264 cbp480  REUSE resident tex (crc 0x95a83cbc)  65 tris/593 words
+[sched] epoch 9: idx21386 tbp11264 cbp480  REUSE resident tex (crc 0x95a83cbc)  36 tris/332 words
+[sched] epoch 10: idx30461 tbp10240 cbp480  tex crc=0xa727234d (exp 0xa727234d)  3 tris/35 words
+[sched] epoch 11: idx31915 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  38 tris/350 words
+[sched] epoch 12: idx33303 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  66 tris/602 words
+[sched] epoch 13: idx34605 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  104 tris/944 words
+[sched] epoch 14: idx35907 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  65 tris/593 words
+[sched] epoch 15: idx37209 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  81 tris/737 words
+[sched] epoch 16: idx38511 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  131 tris/1187 words
+[sched] epoch 17: idx71148 tbp10240 cbp480  tex crc=0xa727234d (exp 0xa727234d)  74 tris/674 words
+[sched] epoch 18: idx71787 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  35 tris/323 words
+[sched] epoch 19: idx72426 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  32 tris/296 words
+[sched] epoch 20: idx73065 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  57 tris/521 words
+[sched] epoch 21: idx73704 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  77 tris/701 words
+[sched] epoch 22: idx74343 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  46 tris/422 words
+[sched] epoch 23: idx74982 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  75 tris/683 words
+[sched] epoch 24: idx75621 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  118 tris/1070 words
+[sched] epoch 25: idx76260 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  59 tris/539 words
+[sched] epoch 26: idx76899 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  74 tris/674 words
+[sched] epoch 27: idx78319 tbp9216 cbp480  tex crc=0xfbdeaa32 (exp 0xfbdeaa32)  52 tris/476 words
+[sched] epoch 28: idx82720 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  49 tris/449 words
+[sched] epoch 29: idx83323 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  89 tris/809 words
+[sched] epoch 30: idx83944 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  65 tris/593 words
+[sched] epoch 31: idx84565 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  77 tris/701 words
+[sched] epoch 32: idx85186 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  52 tris/476 words
+[sched] epoch 33: idx85807 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  103 tris/935 words
+[sched] epoch 34: idx86428 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  64 tris/584 words
+[sched] epoch 35: idx87049 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  34 tris/314 words
+[sched] epoch 36: idx88918 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  2 tris/26 words
+[sched] epoch 37: idx89548 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  226 tris/2042 words
+[sched] epoch 38: idx89548 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  112 tris/1016 words
+[sched] epoch 39: idx90187 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  200 tris/1808 words
+[sched] epoch 40: idx90187 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  54 tris/494 words
+[sched] epoch 41: idx91678 tbp9216 cbp480  tex crc=0xfbdeaa32 (exp 0xfbdeaa32)  20 tris/188 words
+[sched] epoch 42: idx114431 tbp8192 cbp480  tex crc=0xcf4cae27 (exp 0xcf4cae27)  162 tris/1466 words
+[sched] epoch 43: idx115016 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  226 tris/2042 words
+[sched] epoch 44: idx115016 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  31 tris/287 words
+[sched] epoch 45: idx115655 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  226 tris/2042 words
+[sched] epoch 46: idx115655 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  45 tris/413 words
+[sched] epoch 47: idx116351 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  194 tris/1754 words
+[sched] epoch 48: idx117050 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  172 tris/1556 words
+[sched] epoch 49: idx117599 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  226 tris/2042 words
+[sched] epoch 50: idx117599 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  10 tris/98 words
+[sched] epoch 51: idx118238 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  198 tris/1790 words
+[sched] epoch 52: idx118877 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  130 tris/1178 words
+[sched] epoch 53: idx119471 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  53 tris/485 words
+[sched] epoch 54: idx120110 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  209 tris/1889 words
+[sched] epoch 55: idx120749 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  166 tris/1502 words
+[sched] epoch 56: idx120749 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  63 tris/575 words
+[sched] epoch 57: idx121388 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  112 tris/1016 words
+[sched] epoch 58: idx122027 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  96 tris/872 words
+[sched] epoch 59: idx122600 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  86 tris/782 words
+[sched] epoch 60: idx123239 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  18 tris/170 words
+[sched] epoch 61: idx123869 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  27 tris/251 words
+[sched] epoch 62: idx124508 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  35 tris/323 words
+[sched] epoch 63: idx125147 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  9 tris/89 words
+[sched] epoch 64: idx125786 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  61 tris/557 words
+[sched] epoch 65: idx126434 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  40 tris/368 words
+[sched] epoch 66: idx126968 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  71 tris/647 words
+[sched] epoch 67: idx127607 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  58 tris/530 words
+[sched] epoch 68: idx128246 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  48 tris/440 words
+[sched] epoch 69: idx128885 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  6 tris/62 words
+[sched] epoch 70: idx129389 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  165 tris/1493 words
+[sched] epoch 71: idx130028 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  135 tris/1223 words
+[sched] epoch 72: idx130667 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  180 tris/1628 words
+[sched] epoch 73: idx130667 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  24 tris/224 words
+[sched] epoch 74: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  53 tris/485 words
+[sched] epoch 75: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  62 tris/566 words
+[sched] epoch 76: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  57 tris/521 words
+[sched] epoch 77: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  83 tris/755 words
+[sched] epoch 78: idx131945 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  159 tris/1439 words
+[sched] epoch 79: idx132584 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  105 tris/953 words
+[sched] epoch 80: idx133262 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  68 tris/620 words
+[sched] epoch 81: idx133262 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  5 tris/53 words
+[sched] epoch 82: idx135869 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  2 tris/26 words
+[sched] epoch 83: idx144890 tbp12288 cbp480  tex crc=0x87415c50 (exp 0x87415c50)  19 tris/179 words
+[sched] epoch 84: idx145712 tbp12288 cbp480  REUSE resident tex (crc 0x87415c50)  12 tris/116 words
+[sched] epoch 85: idx146205 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  111 tris/1007 words
+[sched] epoch 86: idx146630 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  31 tris/287 words
+[sched] epoch 87: idx147068 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  36 tris/332 words
+[sched] epoch 88: idx147480 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  75 tris/683 words
+[sched] epoch 89: idx147888 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  73 tris/665 words
+[sched] epoch 90: idx148264 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  113 tris/1025 words
+[sched] epoch 91: idx148919 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  103 tris/935 words
+[sched] epoch 92: idx149509 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  91 tris/827 words
+[sched] epoch 93: idx150125 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  77 tris/701 words
+[sched] epoch 94: idx150741 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  78 tris/710 words
+[sched] epoch 95: idx151344 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  44 tris/404 words
+[sched] epoch 96: idx152021 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  22 tris/206 words
+[sched] epoch 97: idx152420 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  26 tris/242 words
+[sched] epoch 98: idx152806 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  32 tris/296 words
+[sched] epoch 99: idx153218 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  16 tris/152 words
+[sched] epoch 100: idx153643 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  4 tris/44 words
+[sched] epoch 101: idx154029 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  30 tris/278 words
+[sched] epoch 102: idx154428 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  21 tris/197 words
+[sched] epoch 103: idx154853 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  20 tris/188 words
+[sched] epoch 104: idx155265 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  16 tris/152 words
+[sched] epoch 105: idx155664 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  11 tris/107 words
+[sched] epoch 106: idx156063 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  8 tris/80 words
+[sched] epoch 107: idx156566 tbp10240 cbp480  tex crc=0xb710940e (exp 0xb710940e)  137 tris/1241 words
+[sched] epoch 108: idx157273 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  113 tris/1025 words
+[sched] epoch 109: idx157967 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  81 tris/737 words
+[sched] epoch 110: idx158674 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  93 tris/845 words
+[sched] epoch 111: idx159420 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  58 tris/530 words
+[sched] epoch 112: idx160114 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  10 tris/98 words
+[sched] epoch 113: idx160331 tbp10240 cbp480  tex crc=0xb710940e (exp 0xb710940e)  31 tris/287 words
+[sched] epoch 114: idx160769 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  28 tris/260 words
+[sched] epoch 115: idx161168 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  40 tris/368 words
+[sched] epoch 116: idx161567 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  26 tris/242 words
+[sched] epoch 117: idx162300 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  37 tris/341 words
+[sched] epoch 118: idx162725 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  33 tris/305 words
+[sched] epoch 119: idx163163 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  22 tris/206 words
+[sched] epoch 120: idx163575 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  26 tris/242 words
+[sched] epoch 121: idx164204 tbp10240 cbp480  tex crc=0xb710940e (exp 0xb710940e)  66 tris/602 words
+[sched] epoch 122: idx164950 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  39 tris/359 words
+[sched] epoch 123: idx175995 tbp12288 cbp480  tex crc=0xf2553358 (exp 0xf2553358)  37 tris/341 words
+[sched] epoch 124: idx176446 tbp12288 cbp480  REUSE resident tex (crc 0xf2553358)  18 tris/170 words
+[sched] preclear COLOR 307200 words (0x0..0x12c000)  wr_bresp_errs=0
+[sched] preclear Z 153600 words (0x140000..0x1d6000)  wr_bresp_errs=0
+[sched] zbuf: armed early for fresh frame Z-preclear
+[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774)
+[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096)
+[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO
+[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=295377
+[sched] epoch 0: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 1 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 1 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4)
+[sched] epoch 1: streamed 1583 words, staged_addr=1583 (exp 1583, < 4096)
+[sched] epoch 1: GO -> fresh drain frame_drained=1, records=175 (exp 175), FB beats=297460
+[sched] epoch 1: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192)
+[sched] epoch 2 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4)
+[sched] epoch 2: streamed 1835 words, staged_addr=1835 (exp 1835, < 4096)
+[sched] epoch 2: GO -> fresh drain frame_drained=1, records=203 (exp 203), FB beats=300051
+[sched] epoch 2: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 3 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 3 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98)
+[sched] epoch 3: streamed 350 words, staged_addr=350 (exp 350, < 4096)
+[sched] epoch 3: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=300517
+[sched] epoch 3: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 4 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 4 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2)
+[sched] epoch 4: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096)
+[sched] epoch 4: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=303426
+[sched] epoch 4: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192)
+[sched] epoch 5 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2)
+[sched] epoch 5: streamed 116 words, staged_addr=116 (exp 116, < 4096)
+[sched] epoch 5: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=303757
+[sched] epoch 5: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192)
+[sched] epoch 6 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2)
+[sched] epoch 6: streamed 629 words, staged_addr=629 (exp 629, < 4096)
+[sched] epoch 6: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=305178
+[sched] epoch 6: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 7 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 7 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4)
+[sched] epoch 7: streamed 260 words, staged_addr=260 (exp 260, < 4096)
+[sched] epoch 7: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=305208
+[sched] epoch 7: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192)
+[sched] epoch 8 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4)
+[sched] epoch 8: streamed 593 words, staged_addr=593 (exp 593, < 4096)
+[sched] epoch 8: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=305480
+[sched] epoch 8: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192)
+[sched] epoch 9 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4)
+[sched] epoch 9: streamed 332 words, staged_addr=332 (exp 332, < 4096)
+[sched] epoch 9: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=305720
+[sched] epoch 9: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 10 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 10 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 10: streamed 35 words, staged_addr=35 (exp 35, < 4096)
+[sched] epoch 10: drain low pulse completed between host polls; counters advanced (records 36->3, FB beats 305720->305723)
+[sched] epoch 10: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=305723
+[sched] epoch 10: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 11 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 11: streamed 350 words, staged_addr=350 (exp 350, < 4096)
+[sched] epoch 11: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=305846
+[sched] epoch 11: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 12 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 12: streamed 602 words, staged_addr=602 (exp 602, < 4096)
+[sched] epoch 12: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=306096
+[sched] epoch 12: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 13 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 13: streamed 944 words, staged_addr=944 (exp 944, < 4096)
+[sched] epoch 13: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=306492
+[sched] epoch 13: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 14 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 14: streamed 593 words, staged_addr=593 (exp 593, < 4096)
+[sched] epoch 14: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=306745
+[sched] epoch 14: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 15 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 15: streamed 737 words, staged_addr=737 (exp 737, < 4096)
+[sched] epoch 15: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=307149
+[sched] epoch 15: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 16 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 16: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096)
+[sched] epoch 16: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=307958
+[sched] epoch 16: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 17 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 17 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 17: streamed 674 words, staged_addr=674 (exp 674, < 4096)
+[sched] epoch 17: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=308303
+[sched] epoch 17: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 18 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 18: streamed 323 words, staged_addr=323 (exp 323, < 4096)
+[sched] epoch 18: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=308403
+[sched] epoch 18: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 19 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 19: streamed 296 words, staged_addr=296 (exp 296, < 4096)
+[sched] epoch 19: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=308494
+[sched] epoch 19: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 20 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 20: streamed 521 words, staged_addr=521 (exp 521, < 4096)
+[sched] epoch 20: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=308812
+[sched] epoch 20: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 21 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 21: streamed 701 words, staged_addr=701 (exp 701, < 4096)
+[sched] epoch 21: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=309214
+[sched] epoch 21: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 22 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 22: streamed 422 words, staged_addr=422 (exp 422, < 4096)
+[sched] epoch 22: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=309367
+[sched] epoch 22: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 23 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 23: streamed 683 words, staged_addr=683 (exp 683, < 4096)
+[sched] epoch 23: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=309839
+[sched] epoch 23: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 24 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 24: streamed 1070 words, staged_addr=1070 (exp 1070, < 4096)
+[sched] epoch 24: GO -> fresh drain frame_drained=1, records=118 (exp 118), FB beats=310603
+[sched] epoch 24: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 25 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 25: streamed 539 words, staged_addr=539 (exp 539, < 4096)
+[sched] epoch 25: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=310978
+[sched] epoch 25: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 26 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 26: streamed 674 words, staged_addr=674 (exp 674, < 4096)
+[sched] epoch 26: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=311360
+[sched] epoch 26: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 27 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 27 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 27: streamed 476 words, staged_addr=476 (exp 476, < 4096)
+[sched] epoch 27: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=311770
+[sched] epoch 27: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 28 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 28: streamed 449 words, staged_addr=449 (exp 449, < 4096)
+[sched] epoch 28: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=311901
+[sched] epoch 28: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 29 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 29: streamed 809 words, staged_addr=809 (exp 809, < 4096)
+[sched] epoch 29: GO -> fresh drain frame_drained=1, records=89 (exp 89), FB beats=312428
+[sched] epoch 29: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 30 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 30: streamed 593 words, staged_addr=593 (exp 593, < 4096)
+[sched] epoch 30: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=312625
+[sched] epoch 30: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 31 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 31: streamed 701 words, staged_addr=701 (exp 701, < 4096)
+[sched] epoch 31: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=312831
+[sched] epoch 31: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 32 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 32: streamed 476 words, staged_addr=476 (exp 476, < 4096)
+[sched] epoch 32: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=313040
+[sched] epoch 32: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 33 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 33: streamed 935 words, staged_addr=935 (exp 935, < 4096)
+[sched] epoch 33: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=313324
+[sched] epoch 33: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 34 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 34: streamed 584 words, staged_addr=584 (exp 584, < 4096)
+[sched] epoch 34: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=313422
+[sched] epoch 34: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 35 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 35: streamed 314 words, staged_addr=314 (exp 314, < 4096)
+[sched] epoch 35: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=313466
+[sched] epoch 35: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 36 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 36: streamed 26 words, staged_addr=26 (exp 26, < 4096)
+[sched] epoch 36: drain low pulse completed between host polls; counters advanced (records 34->2, FB beats 313466->313475)
+[sched] epoch 36: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=313475
+[sched] epoch 36: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 37 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 37: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096)
+[sched] epoch 37: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=315960
+[sched] epoch 37: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 38 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 38: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096)
+[sched] epoch 38: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=316754
+[sched] epoch 38: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 39 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 39: streamed 1808 words, staged_addr=1808 (exp 1808, < 4096)
+[sched] epoch 39: GO -> fresh drain frame_drained=1, records=200 (exp 200), FB beats=319842
+[sched] epoch 39: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 40 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 40: streamed 494 words, staged_addr=494 (exp 494, < 4096)
+[sched] epoch 40: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=320226
+[sched] epoch 40: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 41 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 41 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2)
+[sched] epoch 41: streamed 188 words, staged_addr=188 (exp 188, < 4096)
+[sched] epoch 41: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=320351
+[sched] epoch 41: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 42 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 42 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 42: streamed 1466 words, staged_addr=1466 (exp 1466, < 4096)
+[sched] epoch 42: GO -> fresh drain frame_drained=1, records=162 (exp 162), FB beats=320722
+[sched] epoch 42: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 43 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 43: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096)
+[sched] epoch 43: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=321315
+[sched] epoch 43: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 44 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 44: streamed 287 words, staged_addr=287 (exp 287, < 4096)
+[sched] epoch 44: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=321469
+[sched] epoch 44: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 45 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 45: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096)
+[sched] epoch 45: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=322696
+[sched] epoch 45: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 46: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 46 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 46: streamed 413 words, staged_addr=413 (exp 413, < 4096)
+[sched] epoch 46: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=322928
+[sched] epoch 46: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 47 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 47: streamed 1754 words, staged_addr=1754 (exp 1754, < 4096)
+[sched] epoch 47: GO -> fresh drain frame_drained=1, records=194 (exp 194), FB beats=323955
+[sched] epoch 47: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 48 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 48: streamed 1556 words, staged_addr=1556 (exp 1556, < 4096)
+[sched] epoch 48: GO -> fresh drain frame_drained=1, records=172 (exp 172), FB beats=324795
+[sched] epoch 48: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 49 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 49: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096)
+[sched] epoch 49: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=325754
+[sched] epoch 49: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 50 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 50: streamed 98 words, staged_addr=98 (exp 98, < 4096)
+[sched] epoch 50: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=325778
+[sched] epoch 50: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 51: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 51 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 51: streamed 1790 words, staged_addr=1790 (exp 1790, < 4096)
+[sched] epoch 51: GO -> fresh drain frame_drained=1, records=198 (exp 198), FB beats=326295
+[sched] epoch 51: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 52 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 52: streamed 1178 words, staged_addr=1178 (exp 1178, < 4096)
+[sched] epoch 52: GO -> fresh drain frame_drained=1, records=130 (exp 130), FB beats=327083
+[sched] epoch 52: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 53: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 53 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 53: streamed 485 words, staged_addr=485 (exp 485, < 4096)
+[sched] epoch 53: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=327484
+[sched] epoch 53: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 54 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 54: streamed 1889 words, staged_addr=1889 (exp 1889, < 4096)
+[sched] epoch 54: GO -> fresh drain frame_drained=1, records=209 (exp 209), FB beats=328517
+[sched] epoch 54: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 55 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 55: streamed 1502 words, staged_addr=1502 (exp 1502, < 4096)
+[sched] epoch 55: GO -> fresh drain frame_drained=1, records=166 (exp 166), FB beats=331437
+[sched] epoch 55: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 56: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 56 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 56: streamed 575 words, staged_addr=575 (exp 575, < 4096)
+[sched] epoch 56: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=332134
+[sched] epoch 56: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 57 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 57: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096)
+[sched] epoch 57: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=333647
+[sched] epoch 57: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 58 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 58: streamed 872 words, staged_addr=872 (exp 872, < 4096)
+[sched] epoch 58: GO -> fresh drain frame_drained=1, records=96 (exp 96), FB beats=334865
+[sched] epoch 58: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 59: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 59 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 59: streamed 782 words, staged_addr=782 (exp 782, < 4096)
+[sched] epoch 59: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=336538
+[sched] epoch 59: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 60 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 60: streamed 170 words, staged_addr=170 (exp 170, < 4096)
+[sched] epoch 60: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=336571
+[sched] epoch 60: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 61 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 61: streamed 251 words, staged_addr=251 (exp 251, < 4096)
+[sched] epoch 61: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=336661
+[sched] epoch 61: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 62 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 62: streamed 323 words, staged_addr=323 (exp 323, < 4096)
+[sched] epoch 62: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=336832
+[sched] epoch 62: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 63 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 63: streamed 89 words, staged_addr=89 (exp 89, < 4096)
+[sched] epoch 63: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=336870
+[sched] epoch 63: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 64 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 64: streamed 557 words, staged_addr=557 (exp 557, < 4096)
+[sched] epoch 64: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=337067
+[sched] epoch 64: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 65 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 65: streamed 368 words, staged_addr=368 (exp 368, < 4096)
+[sched] epoch 65: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=337319
+[sched] epoch 65: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 66 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 66: streamed 647 words, staged_addr=647 (exp 647, < 4096)
+[sched] epoch 66: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=337826
+[sched] epoch 66: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 67 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 67: streamed 530 words, staged_addr=530 (exp 530, < 4096)
+[sched] epoch 67: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=338279
+[sched] epoch 67: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 68 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 68: streamed 440 words, staged_addr=440 (exp 440, < 4096)
+[sched] epoch 68: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=338516
+[sched] epoch 68: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 69 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 69: streamed 62 words, staged_addr=62 (exp 62, < 4096)
+[sched] epoch 69: drain low pulse completed between host polls; counters advanced (records 48->6, FB beats 338516->338549)
+[sched] epoch 69: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=338549
+[sched] epoch 69: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 70 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 70: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096)
+[sched] epoch 70: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=339338
+[sched] epoch 70: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 71 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 71: streamed 1223 words, staged_addr=1223 (exp 1223, < 4096)
+[sched] epoch 71: GO -> fresh drain frame_drained=1, records=135 (exp 135), FB beats=340155
+[sched] epoch 71: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 72 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 72: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096)
+[sched] epoch 72: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=342996
+[sched] epoch 72: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 73 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 73: streamed 224 words, staged_addr=224 (exp 224, < 4096)
+[sched] epoch 73: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=343639
+[sched] epoch 73: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 74 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 74: streamed 485 words, staged_addr=485 (exp 485, < 4096)
+[sched] epoch 74: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=345657
+[sched] epoch 74: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 75 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 75: streamed 566 words, staged_addr=566 (exp 566, < 4096)
+[sched] epoch 75: GO -> fresh drain frame_drained=1, records=62 (exp 62), FB beats=347738
+[sched] epoch 75: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 76 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 76: streamed 521 words, staged_addr=521 (exp 521, < 4096)
+[sched] epoch 76: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=350017
+[sched] epoch 76: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 77 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 77: streamed 755 words, staged_addr=755 (exp 755, < 4096)
+[sched] epoch 77: GO -> fresh drain frame_drained=1, records=83 (exp 83), FB beats=351596
+[sched] epoch 77: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 78 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 78: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096)
+[sched] epoch 78: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=352982
+[sched] epoch 78: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 79 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 79: streamed 953 words, staged_addr=953 (exp 953, < 4096)
+[sched] epoch 79: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=355410
+[sched] epoch 79: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 80 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 80: streamed 620 words, staged_addr=620 (exp 620, < 4096)
+[sched] epoch 80: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=357906
+[sched] epoch 80: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 81 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 81: streamed 53 words, staged_addr=53 (exp 53, < 4096)
+[sched] epoch 81: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=358108
+[sched] epoch 81: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 82 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 82: streamed 26 words, staged_addr=26 (exp 26, < 4096)
+[sched] epoch 82: drain low pulse completed between host polls; counters advanced (records 5->2, FB beats 358108->358110)
+[sched] epoch 82: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=358110
+[sched] epoch 82: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 83 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 83 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98)
+[sched] epoch 83: streamed 179 words, staged_addr=179 (exp 179, < 4096)
+[sched] epoch 83: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=358150
+[sched] epoch 83: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192)
+[sched] epoch 84 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98)
+[sched] epoch 84: streamed 116 words, staged_addr=116 (exp 116, < 4096)
+[sched] epoch 84: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=358230
+[sched] epoch 84: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 85 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 85 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9)
+[sched] epoch 85: streamed 1007 words, staged_addr=1007 (exp 1007, < 4096)
+[sched] epoch 85: GO -> fresh drain frame_drained=1, records=111 (exp 111), FB beats=358480
+[sched] epoch 85: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 86 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9)
+[sched] epoch 86: streamed 287 words, staged_addr=287 (exp 287, < 4096)
+[sched] epoch 86: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=358582
+[sched] epoch 86: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 87 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9)
+[sched] epoch 87: streamed 332 words, staged_addr=332 (exp 332, < 4096)
+[sched] epoch 87: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=358661
+[sched] epoch 87: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 88 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 88 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff)
+[sched] epoch 88: streamed 683 words, staged_addr=683 (exp 683, < 4096)
+[sched] epoch 88: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=358934
+[sched] epoch 88: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 89 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff)
+[sched] epoch 89: streamed 665 words, staged_addr=665 (exp 665, < 4096)
+[sched] epoch 89: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=359322
+[sched] epoch 89: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 90 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff)
+[sched] epoch 90: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096)
+[sched] epoch 90: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=359857
+[sched] epoch 90: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 91 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 91 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 91: streamed 935 words, staged_addr=935 (exp 935, < 4096)
+[sched] epoch 91: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=360209
+[sched] epoch 91: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 92 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 92: streamed 827 words, staged_addr=827 (exp 827, < 4096)
+[sched] epoch 92: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=360561
+[sched] epoch 92: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 93 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 93: streamed 701 words, staged_addr=701 (exp 701, < 4096)
+[sched] epoch 93: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=360797
+[sched] epoch 93: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 94 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 94: streamed 710 words, staged_addr=710 (exp 710, < 4096)
+[sched] epoch 94: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=361033
+[sched] epoch 94: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 95 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 95: streamed 404 words, staged_addr=404 (exp 404, < 4096)
+[sched] epoch 95: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=361174
+[sched] epoch 95: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 96 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 96 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 96: streamed 206 words, staged_addr=206 (exp 206, < 4096)
+[sched] epoch 96: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=361209
+[sched] epoch 96: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 97 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 97: streamed 242 words, staged_addr=242 (exp 242, < 4096)
+[sched] epoch 97: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=361263
+[sched] epoch 97: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 98 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 98: streamed 296 words, staged_addr=296 (exp 296, < 4096)
+[sched] epoch 98: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=361310
+[sched] epoch 98: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 99 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 99: streamed 152 words, staged_addr=152 (exp 152, < 4096)
+[sched] epoch 99: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=361330
+[sched] epoch 99: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 100 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 100: streamed 44 words, staged_addr=44 (exp 44, < 4096)
+[sched] epoch 100: drain low pulse completed between host polls; counters advanced (records 16->4, FB beats 361330->361334)
+[sched] epoch 100: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=361334
+[sched] epoch 100: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 101 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 101: streamed 278 words, staged_addr=278 (exp 278, < 4096)
+[sched] epoch 101: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=361385
+[sched] epoch 101: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 102 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 102: streamed 197 words, staged_addr=197 (exp 197, < 4096)
+[sched] epoch 102: GO -> fresh drain frame_drained=1, records=21 (exp 21), FB beats=361463
+[sched] epoch 102: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 103 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 103: streamed 188 words, staged_addr=188 (exp 188, < 4096)
+[sched] epoch 103: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=361486
+[sched] epoch 103: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 104 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 104: streamed 152 words, staged_addr=152 (exp 152, < 4096)
+[sched] epoch 104: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=361562
+[sched] epoch 104: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 105 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 105: streamed 107 words, staged_addr=107 (exp 107, < 4096)
+[sched] epoch 105: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=361578
+[sched] epoch 105: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 106 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 106: streamed 80 words, staged_addr=80 (exp 80, < 4096)
+[sched] epoch 106: drain low pulse completed between host polls; counters advanced (records 11->8, FB beats 361578->361588)
+[sched] epoch 106: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=361588
+[sched] epoch 106: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 107 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 107 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 107: streamed 1241 words, staged_addr=1241 (exp 1241, < 4096)
+[sched] epoch 107: GO -> fresh drain frame_drained=1, records=137 (exp 137), FB beats=362004
+[sched] epoch 107: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 108 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 108: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096)
+[sched] epoch 108: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=362404
+[sched] epoch 108: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 109 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 109: streamed 737 words, staged_addr=737 (exp 737, < 4096)
+[sched] epoch 109: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=362733
+[sched] epoch 109: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 110 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 110: streamed 845 words, staged_addr=845 (exp 845, < 4096)
+[sched] epoch 110: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=363043
+[sched] epoch 110: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 111 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 111: streamed 530 words, staged_addr=530 (exp 530, < 4096)
+[sched] epoch 111: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=363228
+[sched] epoch 111: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 112 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 112: streamed 98 words, staged_addr=98 (exp 98, < 4096)
+[sched] epoch 112: drain low pulse completed between host polls; counters advanced (records 58->10, FB beats 363228->363259)
+[sched] epoch 112: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=363259
+[sched] epoch 112: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 113 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 113 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 113: streamed 287 words, staged_addr=287 (exp 287, < 4096)
+[sched] epoch 113: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=363317
+[sched] epoch 113: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 114 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 114: streamed 260 words, staged_addr=260 (exp 260, < 4096)
+[sched] epoch 114: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=363364
+[sched] epoch 114: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 115 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 115: streamed 368 words, staged_addr=368 (exp 368, < 4096)
+[sched] epoch 115: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=363415
+[sched] epoch 115: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 116 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 116: streamed 242 words, staged_addr=242 (exp 242, < 4096)
+[sched] epoch 116: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=363472
+[sched] epoch 116: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 117 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 117: streamed 341 words, staged_addr=341 (exp 341, < 4096)
+[sched] epoch 117: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=363514
+[sched] epoch 117: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 118 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 118: streamed 305 words, staged_addr=305 (exp 305, < 4096)
+[sched] epoch 118: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=363551
+[sched] epoch 118: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 119 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 119: streamed 206 words, staged_addr=206 (exp 206, < 4096)
+[sched] epoch 119: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=363586
+[sched] epoch 119: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 120 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 120: streamed 242 words, staged_addr=242 (exp 242, < 4096)
+[sched] epoch 120: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=363615
+[sched] epoch 120: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 121 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 121 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05)
+[sched] epoch 121: streamed 602 words, staged_addr=602 (exp 602, < 4096)
+[sched] epoch 121: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=363748
+[sched] epoch 121: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 122 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05)
+[sched] epoch 122: streamed 359 words, staged_addr=359 (exp 359, < 4096)
+[sched] epoch 122: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=363817
+[sched] epoch 122: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 123 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 123 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1)
+[sched] epoch 123: streamed 341 words, staged_addr=341 (exp 341, < 4096)
+[sched] epoch 123: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=363888
+[sched] epoch 123: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 124: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192)
+[sched] epoch 124 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1)
+[sched] epoch 124: streamed 170 words, staged_addr=170 (exp 170, < 4096)
+[sched] epoch 124: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=363923
+[sched] epoch 124: zero fragment drops (snap=0, sticky=0)
+[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f19_ch424_board_fb.mem  sum32=0x42ee1faa xor32=0x0dc19c66 nonzero=114504 bounds=(0,10)..(511,479) FB=640x480
+[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (125-epoch composite)
+[sched] DONE rc=0 (all gates passed)

sim/data/top_psmct32_raster_demo/sh3_zsrt139f19_epochs.txt

@@ -0,0 +1,131 @@
+# Ch424 epoch descriptor table (125 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 125 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98
+84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98
+85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9
+86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9
+87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9
+88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff
+89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff
+90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff
+91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386
+97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028
+108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028
+109 157967 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19109.mem 737 81 1 sh3_zsrt139f19107_pal.mem 0x00fd9028
+110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028
+111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028
+112 160114 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19112.mem 98 10 1 sh3_zsrt139f19107_pal.mem 0x00fd9028
+113 160331 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19113.mem 287 31 0 sh3_zsrt139f19113_pal.mem 0xd8d19684
+114 160769 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19114.mem 260 28 1 sh3_zsrt139f19113_pal.mem 0xd8d19684
+115 161168 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19115.mem 368 40 1 sh3_zsrt139f19113_pal.mem 0xd8d19684
+116 161567 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19116.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684
+117 162300 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19117.mem 341 37 1 sh3_zsrt139f19113_pal.mem 0xd8d19684
+118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684
+119 163163 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19119.mem 206 22 1 sh3_zsrt139f19113_pal.mem 0xd8d19684
+120 163575 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19120.mem 242 26 1 sh3_zsrt139f19113_pal.mem 0xd8d19684
+121 164204 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19121.mem 602 66 0 sh3_zsrt139f19121_pal.mem 0xaa4e7e05
+122 164950 10240 480 sh3_zsrt139f19121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19122.mem 359 39 1 sh3_zsrt139f19121_pal.mem 0xaa4e7e05
+123 175995 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19123.mem 341 37 0 sh3_zsrt139f19123_pal.mem 0x56ebf1d1
+124 176446 12288 480 sh3_zsrt139f19123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f19124.mem 170 18 1 sh3_zsrt139f19123_pal.mem 0x56ebf1d1

sim/data/top_psmct32_raster_demo/sh3_zsrt139f20_epochs.txt

@@ -0,0 +1,378 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139f11d', 'zsrt139c3', 'zsrt139e1']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 375 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
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+355 197327 10240 480 sh3_zsrt139c3210_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3210.mem 17 1 1 sh3_zsrt139c3210_pal.mem 0x158afe76
+356 197327 10240 480 sh3_zsrt139c3211_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139c3211.mem 17 1 1 sh3_zsrt139c3211_pal.mem 0x158afe76
+357 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0
+358 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0
+359 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0
+360 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0
+361 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0
+362 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0
+363 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0
+364 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0
+365 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0
+366 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0
+367 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0
+368 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0
+369 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0
+370 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0
+371 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0
+372 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0
+373 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0
+374 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0

sim/data/top_psmct32_raster_demo/sh3_zsrt139f21_epochs.txt

@@ -0,0 +1,146 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139e1']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 143 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98
+84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98
+85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9
+86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9
+87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9
+88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff
+89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff
+90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff
+91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
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+93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386
+97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+104 155265 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19104.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+105 155664 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19105.mem 107 11 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+106 156063 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19106.mem 80 8 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+107 156566 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19107.mem 1241 137 0 sh3_zsrt139f19107_pal.mem 0x00fd9028
+108 157273 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19108.mem 1025 113 1 sh3_zsrt139f19107_pal.mem 0x00fd9028
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+110 158674 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19110.mem 845 93 1 sh3_zsrt139f19107_pal.mem 0x00fd9028
+111 159420 10240 480 sh3_zsrt139f19107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19111.mem 530 58 1 sh3_zsrt139f19107_pal.mem 0x00fd9028
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+118 162725 10240 480 sh3_zsrt139f19113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f19118.mem 305 33 1 sh3_zsrt139f19113_pal.mem 0xd8d19684
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+125 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0
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+128 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0
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+130 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0
+131 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0
+132 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0
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+134 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0
+135 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0
+136 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0
+137 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0
+138 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0
+139 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0
+140 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0
+141 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0
+142 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0

sim/data/top_psmct32_raster_demo/sh3_zsrt139f22_epochs.txt

@@ -0,0 +1,224 @@
+# Ch426 epoch descriptor table (218 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 218 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f220.mem 17 1 0 sh3_zsrt139f220_pal.mem 0x158afe76
+1 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f221.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+2 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f222.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+3 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f223.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+4 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f224.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+5 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f225.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+6 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f226.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+7 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f227.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+8 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f228.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+9 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f229.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+10 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2210.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+11 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2211.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
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+17 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2217.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+18 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2218.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+19 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2219.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
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+24 196494 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2224.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
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sim/data/top_psmct32_raster_demo/sh3_zsrt139f23_epochs.txt

@@ -0,0 +1,366 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139f11d', 'zsrt139f22']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 363 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
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+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
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+9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0
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+16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae
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+22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
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sim/data/top_psmct32_raster_demo/sh3_zsrt139f24_epochs.txt

@@ -0,0 +1,346 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139f22']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 343 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
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+330 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22205.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+331 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22206.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+332 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22207.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+333 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22208.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+334 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22209.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+335 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22210.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+336 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22211.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+337 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22212.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+338 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22213.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+339 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22214.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+340 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22215.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+341 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22216.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76
+342 197327 10240 480 sh3_zsrt139f220_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f22217.mem 17 1 1 sh3_zsrt139f220_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f25_epochs.txt

@@ -0,0 +1,414 @@
+# Ch427 epoch descriptor table (408 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 408 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f250.mem 17 1 0 sh3_zsrt139f250_pal.mem 0x158afe76
+1 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f251.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+2 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f252.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+3 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f253.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+4 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f254.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+5 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f255.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+6 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f256.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+7 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f257.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+8 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f258.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+9 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f259.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+10 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2510.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+11 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2511.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+12 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2512.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+13 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2513.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+14 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2514.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+15 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2515.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+16 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2516.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+17 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2517.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+18 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2518.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+19 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2519.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+20 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2520.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+21 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2521.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+22 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2522.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+23 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2523.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+24 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2524.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+25 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2525.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+26 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2526.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+27 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2527.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+28 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2528.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+29 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2529.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+30 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2530.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+31 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2531.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+32 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2532.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+33 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2533.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+34 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2534.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+35 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2535.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+36 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2536.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+37 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2537.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+38 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2538.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+39 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2539.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+40 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2540.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+41 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2541.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+42 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2542.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+43 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2543.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+44 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2544.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+45 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2545.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+46 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2546.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+47 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2547.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+48 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2548.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+49 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2549.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+50 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2550.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+51 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2551.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+52 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2552.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+53 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2553.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+54 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2554.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+55 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2555.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+56 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2556.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+57 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2557.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+58 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2558.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+59 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2559.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+60 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2560.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+61 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2561.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+62 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2562.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+63 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2563.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+64 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2564.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+65 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2565.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+66 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2566.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+67 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2567.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+68 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2568.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+69 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2569.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+70 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2570.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+71 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2571.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+72 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2572.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+73 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2573.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+74 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2574.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+75 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2575.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+76 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2576.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+77 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2577.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+78 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2578.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+79 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2579.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+80 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2580.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+81 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2581.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+82 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2582.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+83 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2583.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+84 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2584.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+85 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2585.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+86 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2586.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+87 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2587.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+88 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2588.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+89 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2589.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+90 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2590.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
+91 196494 10240 480 sh3_zsrt139f250_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2591.mem 17 1 1 sh3_zsrt139f250_pal.mem 0x158afe76
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sim/data/top_psmct32_raster_demo/sh3_zsrt139f26_epochs.txt

@@ -0,0 +1,556 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139f11d', 'zsrt139f25']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 553 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2
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sim/data/top_psmct32_raster_demo/sh3_zsrt139f27_epochs.txt

@@ -0,0 +1,135 @@
+# Ch427 epoch descriptor table (129 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 129 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
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+114 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+115 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+116 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+117 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+118 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+119 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+120 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+121 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+122 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+123 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+124 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76
+125 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+126 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+127 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+128 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f27c_epochs.txt

@@ -0,0 +1,135 @@
+# Ch435 epoch descriptor table (129 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 129 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c0.mem 467 51 0 sh3_zsrt139f27c0_pal.mem 0x158afe76
+1 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c1.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+2 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c2.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+3 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c3.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+4 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c4.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+5 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c5.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+6 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c6.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+7 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c7.mem 521 57 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+8 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c8.mem 485 53 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+9 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c9.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+10 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c10.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+11 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c11.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+12 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c12.mem 530 58 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+13 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c13.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+14 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c14.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+15 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c15.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+16 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c16.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+17 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c17.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+18 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c18.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+19 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c19.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+20 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c20.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+21 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c21.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+22 196494 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c22.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+23 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c23.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+24 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c24.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+25 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c25.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+26 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c26.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+27 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c27.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+28 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c28.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+29 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c29.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+30 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c30.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+31 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c31.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+32 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c32.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+33 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c33.mem 440 48 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+34 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c34.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+35 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c35.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+36 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c36.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+37 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c37.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+38 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c38.mem 602 66 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+39 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c39.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+40 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c40.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+41 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c41.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+42 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c42.mem 323 35 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+43 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c43.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+44 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c44.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+45 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c45.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+46 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c46.mem 431 47 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+47 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c47.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+48 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c48.mem 710 78 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+49 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c49.mem 575 63 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+50 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c50.mem 602 66 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+51 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c51.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+52 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c52.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+53 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c53.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+54 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c54.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+55 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c55.mem 404 44 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+56 196868 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c56.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+57 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c57.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+58 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c58.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+59 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c59.mem 350 38 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+60 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c60.mem 413 45 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+61 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c61.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+62 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c62.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+63 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c63.mem 422 46 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+64 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c64.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+65 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c65.mem 377 41 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+66 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c66.mem 494 54 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+67 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c67.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+68 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c68.mem 395 43 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+69 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c69.mem 692 76 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+70 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c70.mem 665 73 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+71 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c71.mem 512 56 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+72 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c72.mem 620 68 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+73 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c73.mem 341 37 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+74 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c74.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+75 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c75.mem 449 49 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+76 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c76.mem 503 55 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+77 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c77.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+78 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c78.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+79 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c79.mem 584 64 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+80 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c80.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+81 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c81.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+82 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c82.mem 539 59 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+83 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c83.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+84 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c84.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+85 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c85.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+86 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c86.mem 386 42 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+87 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c87.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+88 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c88.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+89 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c89.mem 458 50 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+90 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c90.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+91 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c91.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+92 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c92.mem 287 31 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+93 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c93.mem 350 38 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+94 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c94.mem 233 25 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+95 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c95.mem 467 51 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+96 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c96.mem 242 26 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+97 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c97.mem 323 35 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+98 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c98.mem 647 71 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+99 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c99.mem 332 36 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+100 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c100.mem 476 52 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+101 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c101.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
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+104 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c104.mem 611 67 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+105 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c105.mem 359 39 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
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+115 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c115.mem 368 40 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
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+123 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c123.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+124 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c124.mem 161 17 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+125 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c125.mem 296 32 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+126 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c126.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+127 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c127.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+128 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c128.mem 134 14 1 sh3_zsrt139f27c0_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f28_epochs.txt

@@ -0,0 +1,277 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f19', 'zsrt139f11d', 'zsrt139f27']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 274 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
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+45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
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+50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
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sim/data/top_psmct32_raster_demo/sh3_zsrt139f29_epochs.txt

@@ -0,0 +1,164 @@
+# Ch428 epoch descriptor table (158 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 158 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
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+104 130667 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29104.mem 1628 180 1 sh3_zsrt139f2974_pal.mem 0x47097d4c
+105 130667 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29105.mem 224 24 1 sh3_zsrt139f2974_pal.mem 0x47097d4c
+106 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29106.mem 485 53 1 sh3_zsrt139f2974_pal.mem 0x47097d4c
+107 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29107.mem 566 62 1 sh3_zsrt139f2974_pal.mem 0x47097d4c
+108 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29108.mem 521 57 1 sh3_zsrt139f2974_pal.mem 0x47097d4c
+109 131306 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29109.mem 755 83 1 sh3_zsrt139f2974_pal.mem 0x47097d4c
+110 131945 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29110.mem 1439 159 1 sh3_zsrt139f2974_pal.mem 0x47097d4c
+111 132584 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29111.mem 953 105 1 sh3_zsrt139f2974_pal.mem 0x47097d4c
+112 133262 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29112.mem 620 68 1 sh3_zsrt139f2974_pal.mem 0x47097d4c
+113 133262 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29113.mem 53 5 1 sh3_zsrt139f2974_pal.mem 0x47097d4c
+114 135869 8192 480 sh3_zsrt139f2974_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f29114.mem 26 2 1 sh3_zsrt139f2974_pal.mem 0x47097d4c
+115 144890 12288 480 sh3_zsrt139f29115_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29115.mem 179 19 0 sh3_zsrt139f29115_pal.mem 0x3e849a98
+116 145712 12288 480 sh3_zsrt139f29115_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29116.mem 116 12 1 sh3_zsrt139f29115_pal.mem 0x3e849a98
+117 145913 12288 480 sh3_zsrt139f29117_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f29117.mem 143 15 0 sh3_zsrt139f29117_pal.mem 0x20ffffff
+118 146205 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29118.mem 1007 111 0 sh3_zsrt139f29118_pal.mem 0xfd978fd9
+119 146630 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29119.mem 287 31 1 sh3_zsrt139f29118_pal.mem 0xfd978fd9
+120 147068 11264 480 sh3_zsrt139f29118_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29120.mem 332 36 1 sh3_zsrt139f29118_pal.mem 0xfd978fd9
+121 147480 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29121.mem 683 75 0 sh3_zsrt139f29121_pal.mem 0xd5ed05ff
+122 147888 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29122.mem 665 73 1 sh3_zsrt139f29121_pal.mem 0xd5ed05ff
+123 148264 11264 480 sh3_zsrt139f29121_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29123.mem 1025 113 1 sh3_zsrt139f29121_pal.mem 0xd5ed05ff
+124 148919 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29124.mem 935 103 0 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8
+125 149509 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29125.mem 827 91 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8
+126 150125 11264 480 sh3_zsrt139f29124_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29126.mem 701 77 1 sh3_zsrt139f29124_pal.mem 0xcdf8a4d8
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+131 152806 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29131.mem 296 32 1 sh3_zsrt139f29129_pal.mem 0xc6784386
+132 153218 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29132.mem 152 16 1 sh3_zsrt139f29129_pal.mem 0xc6784386
+133 153643 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29133.mem 44 4 1 sh3_zsrt139f29129_pal.mem 0xc6784386
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+135 154428 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29135.mem 197 21 1 sh3_zsrt139f29129_pal.mem 0xc6784386
+136 154853 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29136.mem 188 20 1 sh3_zsrt139f29129_pal.mem 0xc6784386
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+138 155664 11264 480 sh3_zsrt139f29129_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f29138.mem 107 11 1 sh3_zsrt139f29129_pal.mem 0xc6784386
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+140 156566 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29140.mem 1241 137 0 sh3_zsrt139f29140_pal.mem 0x00fd9028
+141 157273 10240 480 sh3_zsrt139f29140_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29141.mem 1025 113 1 sh3_zsrt139f29140_pal.mem 0x00fd9028
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+146 160331 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29146.mem 287 31 0 sh3_zsrt139f29146_pal.mem 0xd8d19684
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+150 162300 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29150.mem 341 37 1 sh3_zsrt139f29146_pal.mem 0xd8d19684
+151 162725 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29151.mem 305 33 1 sh3_zsrt139f29146_pal.mem 0xd8d19684
+152 163163 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29152.mem 206 22 1 sh3_zsrt139f29146_pal.mem 0xd8d19684
+153 163575 10240 480 sh3_zsrt139f29146_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29153.mem 242 26 1 sh3_zsrt139f29146_pal.mem 0xd8d19684
+154 164204 10240 480 sh3_zsrt139f29154_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29154.mem 602 66 0 sh3_zsrt139f29154_pal.mem 0xaa4e7e05
+155 164950 10240 480 sh3_zsrt139f29154_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f29155.mem 359 39 1 sh3_zsrt139f29154_pal.mem 0xaa4e7e05
+156 175995 12288 480 sh3_zsrt139f29156_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f29156.mem 341 37 0 sh3_zsrt139f29156_pal.mem 0x56ebf1d1
+157 176446 12288 480 sh3_zsrt139f29156_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f29157.mem 170 18 1 sh3_zsrt139f29156_pal.mem 0x56ebf1d1

sim/data/top_psmct32_raster_demo/sh3_zsrt139f30_epochs.txt

@@ -0,0 +1,310 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f29', 'zsrt139f11d', 'zsrt139f27']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 307 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f290_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f290.mem 44 4 0 sh3_zsrt139f290_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f291_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f291.mem 1583 175 0 sh3_zsrt139f291_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f291_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f292.mem 1835 203 1 sh3_zsrt139f291_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f293_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f293.mem 350 38 0 sh3_zsrt139f293_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f294.mem 1322 146 0 sh3_zsrt139f294_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f295.mem 116 12 1 sh3_zsrt139f294_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f296.mem 629 69 1 sh3_zsrt139f294_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f297.mem 260 28 0 sh3_zsrt139f297_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f298.mem 593 65 1 sh3_zsrt139f297_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f299.mem 332 36 1 sh3_zsrt139f297_pal.mem 0x5cbf8bb4
+10 30859 10240 480 sh3_zsrt139f2910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2910.mem 26 2 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+11 31075 13824 480 sh3_zsrt139f2911_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2911.mem 26 2 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+12 31727 10240 480 sh3_zsrt139f2912_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2912.mem 17 1 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+13 31820 13824 480 sh3_zsrt139f2913_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2913.mem 17 1 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+14 32435 10240 480 sh3_zsrt139f2914_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2914.mem 134 14 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+15 32651 13824 480 sh3_zsrt139f2915_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2915.mem 134 14 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+16 32869 10240 480 sh3_zsrt139f2916_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2916.mem 224 24 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+17 33085 13824 480 sh3_zsrt139f2917_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2917.mem 224 24 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+18 33303 10240 480 sh3_zsrt139f2918_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2918.mem 170 18 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+19 33519 13824 480 sh3_zsrt139f2919_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2919.mem 170 18 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+20 33737 10240 480 sh3_zsrt139f2920_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2920.mem 143 15 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+21 33953 13824 480 sh3_zsrt139f2921_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2921.mem 143 15 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+22 34171 10240 480 sh3_zsrt139f2922_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2922.mem 305 33 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+23 34387 13824 480 sh3_zsrt139f2923_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2923.mem 305 33 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+24 34605 10240 480 sh3_zsrt139f2924_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2924.mem 242 26 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+25 34821 13824 480 sh3_zsrt139f2925_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2925.mem 242 26 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+26 35039 10240 480 sh3_zsrt139f2926_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2926.mem 377 41 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+27 35255 13824 480 sh3_zsrt139f2927_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2927.mem 377 41 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+28 35473 10240 480 sh3_zsrt139f2928_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2928.mem 341 37 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+29 35689 13824 480 sh3_zsrt139f2929_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2929.mem 341 37 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+30 35907 10240 480 sh3_zsrt139f2930_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2930.mem 98 10 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+31 36123 13824 480 sh3_zsrt139f2931_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2931.mem 98 10 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+32 36341 10240 480 sh3_zsrt139f2932_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2932.mem 197 21 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+33 36557 13824 480 sh3_zsrt139f2933_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2933.mem 197 21 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+34 36775 10240 480 sh3_zsrt139f2934_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2934.mem 314 34 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+35 36991 13824 480 sh3_zsrt139f2935_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2935.mem 314 34 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+36 37209 10240 480 sh3_zsrt139f2936_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2936.mem 233 25 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+37 37425 13824 480 sh3_zsrt139f2937_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2937.mem 233 25 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+38 37643 10240 480 sh3_zsrt139f2938_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2938.mem 206 22 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+39 37859 13824 480 sh3_zsrt139f2939_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2939.mem 206 22 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+40 38077 10240 480 sh3_zsrt139f2940_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2940.mem 314 34 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+41 38293 13824 480 sh3_zsrt139f2941_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2941.mem 314 34 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+42 38511 10240 480 sh3_zsrt139f2942_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2942.mem 503 55 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+43 38727 13824 480 sh3_zsrt139f2943_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2943.mem 503 55 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+44 38945 10240 480 sh3_zsrt139f2944_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2944.mem 395 43 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
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+262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76
+271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76
+272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76
+273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76
+274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76
+276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76
+277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76
+283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76
+284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76
+290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+292 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+293 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+294 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+295 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+296 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+297 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+298 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+299 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+300 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+301 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+302 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76
+303 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+304 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+305 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+306 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f31_epochs.txt

@@ -0,0 +1,9 @@
+# Ch428 epoch descriptor table (3 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 3 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f310.mem 2042 226 0 sh3_zsrt139f310_pal.mem 0x53cd543f
+1 172601 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f311.mem 395 43 1 sh3_zsrt139f310_pal.mem 0x53cd543f
+2 175765 8192 480 sh3_zsrt139f310_tex_lpddr.mem 0x200000 262144 0x68e8cb9d feeder_sh3_zsrt139f312.mem 134 14 1 sh3_zsrt139f310_pal.mem 0x53cd543f

sim/data/top_psmct32_raster_demo/sh3_zsrt139f32_epochs.txt

@@ -0,0 +1,313 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f29@0:156', 'zsrt139f31', 'zsrt139f29@156:158', 'zsrt139f11d', 'zsrt139f27']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 310 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f290_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f290.mem 44 4 0 sh3_zsrt139f290_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f291_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f291.mem 1583 175 0 sh3_zsrt139f291_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f291_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f292.mem 1835 203 1 sh3_zsrt139f291_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f293_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f293.mem 350 38 0 sh3_zsrt139f293_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f294.mem 1322 146 0 sh3_zsrt139f294_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f295.mem 116 12 1 sh3_zsrt139f294_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f294_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f296.mem 629 69 1 sh3_zsrt139f294_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f297.mem 260 28 0 sh3_zsrt139f297_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f298.mem 593 65 1 sh3_zsrt139f297_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f297_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f299.mem 332 36 1 sh3_zsrt139f297_pal.mem 0x5cbf8bb4
+10 30859 10240 480 sh3_zsrt139f2910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2910.mem 26 2 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+11 31075 13824 480 sh3_zsrt139f2911_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2911.mem 26 2 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+12 31727 10240 480 sh3_zsrt139f2912_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2912.mem 17 1 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+13 31820 13824 480 sh3_zsrt139f2913_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2913.mem 17 1 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+14 32435 10240 480 sh3_zsrt139f2914_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2914.mem 134 14 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+15 32651 13824 480 sh3_zsrt139f2915_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2915.mem 134 14 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+16 32869 10240 480 sh3_zsrt139f2916_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2916.mem 224 24 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+17 33085 13824 480 sh3_zsrt139f2917_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2917.mem 224 24 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+18 33303 10240 480 sh3_zsrt139f2918_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2918.mem 170 18 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+19 33519 13824 480 sh3_zsrt139f2919_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2919.mem 170 18 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+20 33737 10240 480 sh3_zsrt139f2920_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2920.mem 143 15 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+21 33953 13824 480 sh3_zsrt139f2921_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2921.mem 143 15 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+22 34171 10240 480 sh3_zsrt139f2922_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2922.mem 305 33 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+23 34387 13824 480 sh3_zsrt139f2923_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2923.mem 305 33 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+24 34605 10240 480 sh3_zsrt139f2924_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2924.mem 242 26 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+25 34821 13824 480 sh3_zsrt139f2925_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2925.mem 242 26 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+26 35039 10240 480 sh3_zsrt139f2926_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2926.mem 377 41 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+27 35255 13824 480 sh3_zsrt139f2927_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2927.mem 377 41 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+28 35473 10240 480 sh3_zsrt139f2928_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2928.mem 341 37 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+29 35689 13824 480 sh3_zsrt139f2929_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2929.mem 341 37 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+30 35907 10240 480 sh3_zsrt139f2930_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2930.mem 98 10 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+31 36123 13824 480 sh3_zsrt139f2931_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2931.mem 98 10 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+32 36341 10240 480 sh3_zsrt139f2932_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2932.mem 197 21 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+33 36557 13824 480 sh3_zsrt139f2933_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2933.mem 197 21 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+34 36775 10240 480 sh3_zsrt139f2934_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2934.mem 314 34 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+35 36991 13824 480 sh3_zsrt139f2935_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2935.mem 314 34 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+36 37209 10240 480 sh3_zsrt139f2936_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2936.mem 233 25 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+37 37425 13824 480 sh3_zsrt139f2937_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2937.mem 233 25 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+38 37643 10240 480 sh3_zsrt139f2938_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2938.mem 206 22 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+39 37859 13824 480 sh3_zsrt139f2939_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2939.mem 206 22 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+40 38077 10240 480 sh3_zsrt139f2940_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2940.mem 314 34 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+41 38293 13824 480 sh3_zsrt139f2941_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2941.mem 314 34 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+42 38511 10240 480 sh3_zsrt139f2942_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2942.mem 503 55 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+43 38727 13824 480 sh3_zsrt139f2943_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2943.mem 503 55 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+44 38945 10240 480 sh3_zsrt139f2944_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2944.mem 395 43 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+45 39161 13824 480 sh3_zsrt139f2945_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2945.mem 395 43 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+46 39379 10240 480 sh3_zsrt139f2946_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2946.mem 305 33 0 sh3_zsrt139f2910_pal.mem 0x47405cb0
+47 39520 13824 480 sh3_zsrt139f2947_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139f2947.mem 305 33 0 sh3_zsrt139f2911_pal.mem 0x566e7c38
+48 71148 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2948.mem 674 74 0 sh3_zsrt139f2948_pal.mem 0x43ece1ae
+49 71787 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2949.mem 323 35 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae
+50 72426 10240 480 sh3_zsrt139f2948_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f2950.mem 296 32 1 sh3_zsrt139f2948_pal.mem 0x43ece1ae
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+268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76
+274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76
+275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76
+276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76
+277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76
+279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76
+280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76
+286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76
+287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+292 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76
+293 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+294 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+295 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+296 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+297 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+298 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+299 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+300 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+301 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+302 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+303 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+304 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+305 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76
+306 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+307 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+308 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+309 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f33_epochs.txt

@@ -0,0 +1,280 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f19@0:123', 'zsrt139f31', 'zsrt139f19@123:125', 'zsrt139f11d', 'zsrt139f27']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 277 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
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sim/data/top_psmct32_raster_demo/sh3_zsrt139f34_epochs.txt

@@ -0,0 +1,298 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f33', 'zsrt139e1']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 295 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
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+222 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+223 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76
+224 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76
+225 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+226 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+227 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76
+228 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+229 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+230 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76
+231 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+232 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+233 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+234 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+235 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+236 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+237 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+238 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76
+241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76
+242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76
+243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76
+244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76
+246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76
+247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76
+253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76
+254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76
+260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76
+273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76
+277 198945 13376 480 sh3_zsrt139e10_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e10.mem 134 14 0 sh3_zsrt139e10_pal.mem 0x870d2bd0
+278 198945 13376 480 sh3_zsrt139e11_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e11.mem 134 14 1 sh3_zsrt139e11_pal.mem 0x870d2bd0
+279 198945 13376 480 sh3_zsrt139e12_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e12.mem 134 14 1 sh3_zsrt139e12_pal.mem 0x870d2bd0
+280 198945 13376 480 sh3_zsrt139e13_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e13.mem 134 14 1 sh3_zsrt139e13_pal.mem 0x870d2bd0
+281 198945 13376 480 sh3_zsrt139e14_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e14.mem 134 14 1 sh3_zsrt139e14_pal.mem 0x870d2bd0
+282 198945 13376 480 sh3_zsrt139e15_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e15.mem 134 14 1 sh3_zsrt139e15_pal.mem 0x870d2bd0
+283 198945 13376 480 sh3_zsrt139e16_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e16.mem 134 14 1 sh3_zsrt139e16_pal.mem 0x870d2bd0
+284 198945 13376 480 sh3_zsrt139e17_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e17.mem 134 14 1 sh3_zsrt139e17_pal.mem 0x870d2bd0
+285 198945 13376 480 sh3_zsrt139e18_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e18.mem 134 14 1 sh3_zsrt139e18_pal.mem 0x870d2bd0
+286 198945 13376 480 sh3_zsrt139e19_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e19.mem 134 14 1 sh3_zsrt139e19_pal.mem 0x870d2bd0
+287 198945 13376 480 sh3_zsrt139e110_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e110.mem 134 14 1 sh3_zsrt139e110_pal.mem 0x870d2bd0
+288 198945 13376 480 sh3_zsrt139e111_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e111.mem 134 14 1 sh3_zsrt139e111_pal.mem 0x870d2bd0
+289 198945 13376 480 sh3_zsrt139e112_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e112.mem 134 14 1 sh3_zsrt139e112_pal.mem 0x870d2bd0
+290 198945 13376 480 sh3_zsrt139e113_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e113.mem 134 14 1 sh3_zsrt139e113_pal.mem 0x870d2bd0
+291 198945 13376 480 sh3_zsrt139e114_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e114.mem 134 14 1 sh3_zsrt139e114_pal.mem 0x870d2bd0
+292 198945 13376 480 sh3_zsrt139e115_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e115.mem 134 14 1 sh3_zsrt139e115_pal.mem 0x870d2bd0
+293 198945 13376 480 sh3_zsrt139e116_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e116.mem 134 14 1 sh3_zsrt139e116_pal.mem 0x870d2bd0
+294 198945 13376 480 sh3_zsrt139e117_tex_lpddr.mem 0x200000 262144 0x1388759c feeder_sh3_zsrt139e117.mem 26 2 1 sh3_zsrt139e117_pal.mem 0x870d2bd0

sim/data/top_psmct32_raster_demo/sh3_zsrt139f35_epochs.txt

@@ -0,0 +1,19 @@
+# Ch429 epoch descriptor table (13 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 13 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 165536 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f350.mem 908 100 0 sh3_zsrt139f350_pal.mem 0x81cb400c
+1 166269 9216 480 sh3_zsrt139f350_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f351.mem 665 73 1 sh3_zsrt139f350_pal.mem 0x81cb400c
+2 166950 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f352.mem 728 80 0 sh3_zsrt139f352_pal.mem 0x815145a3
+3 167670 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f353.mem 278 30 1 sh3_zsrt139f352_pal.mem 0x815145a3
+4 168416 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f354.mem 521 57 1 sh3_zsrt139f352_pal.mem 0x815145a3
+5 168815 9216 480 sh3_zsrt139f352_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f355.mem 125 13 1 sh3_zsrt139f352_pal.mem 0x815145a3
+6 169227 9216 480 sh3_zsrt139f356_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f356.mem 656 72 0 sh3_zsrt139f356_pal.mem 0x829b8725
+7 169830 9216 480 sh3_zsrt139f357_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f357.mem 323 35 0 sh3_zsrt139f357_pal.mem 0x84317595
+8 170177 9216 480 sh3_zsrt139f358_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f358.mem 116 12 0 sh3_zsrt139f358_pal.mem 0x8504a80c
+9 170637 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f359.mem 1205 133 0 sh3_zsrt139f359_pal.mem 0x83c0ed22
+10 171088 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3510.mem 962 106 1 sh3_zsrt139f359_pal.mem 0x83c0ed22
+11 171678 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3511.mem 539 59 1 sh3_zsrt139f359_pal.mem 0x83c0ed22
+12 172233 9216 480 sh3_zsrt139f359_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f3512.mem 278 30 1 sh3_zsrt139f359_pal.mem 0x83c0ed22

sim/data/top_psmct32_raster_demo/sh3_zsrt139f35c_epochs.txt

@@ -0,0 +1,19 @@
+# Ch435 epoch descriptor table (13 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 13 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 165536 9216 480 sh3_zsrt139f35c0_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c0.mem 908 100 0 sh3_zsrt139f35c0_pal.mem 0x81cb400c
+1 166269 9216 480 sh3_zsrt139f35c0_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c1.mem 665 73 1 sh3_zsrt139f35c0_pal.mem 0x81cb400c
+2 166950 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c2.mem 728 80 0 sh3_zsrt139f35c2_pal.mem 0x815145a3
+3 167670 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c3.mem 278 30 1 sh3_zsrt139f35c2_pal.mem 0x815145a3
+4 168416 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c4.mem 521 57 1 sh3_zsrt139f35c2_pal.mem 0x815145a3
+5 168815 9216 480 sh3_zsrt139f35c2_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c5.mem 125 13 1 sh3_zsrt139f35c2_pal.mem 0x815145a3
+6 169227 9216 480 sh3_zsrt139f35c6_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c6.mem 656 72 0 sh3_zsrt139f35c6_pal.mem 0x829b8725
+7 169830 9216 480 sh3_zsrt139f35c7_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c7.mem 323 35 0 sh3_zsrt139f35c7_pal.mem 0x84317595
+8 170177 9216 480 sh3_zsrt139f35c8_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c8.mem 116 12 0 sh3_zsrt139f35c8_pal.mem 0x8504a80c
+9 170637 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c9.mem 1205 133 0 sh3_zsrt139f35c9_pal.mem 0x83c0ed22
+10 171088 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c10.mem 962 106 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22
+11 171678 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c11.mem 539 59 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22
+12 172233 9216 480 sh3_zsrt139f35c9_tex_lpddr.mem 0x200000 262144 0x9ecc08f5 feeder_sh3_zsrt139f35c12.mem 278 30 1 sh3_zsrt139f35c9_pal.mem 0x83c0ed22

sim/data/top_psmct32_raster_demo/sh3_zsrt139f36_epochs.txt

@@ -0,0 +1,293 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f19@0:123', 'zsrt139f35', 'zsrt139f31', 'zsrt139f19@123:125', 'zsrt139f11d', 'zsrt139f27']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 290 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+63 125147 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1963.mem 89 9 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+64 125786 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1964.mem 557 61 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+65 126434 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1965.mem 368 40 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+66 126968 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1966.mem 647 71 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+67 127607 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1967.mem 530 58 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+68 128246 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1968.mem 440 48 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+69 128885 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1969.mem 62 6 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+70 129389 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1970.mem 1493 165 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+71 130028 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1971.mem 1223 135 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+72 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1972.mem 1628 180 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+73 130667 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1973.mem 224 24 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+74 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1974.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+75 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1975.mem 566 62 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+76 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1976.mem 521 57 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+77 131306 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1977.mem 755 83 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+78 131945 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1978.mem 1439 159 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+79 132584 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1979.mem 953 105 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+80 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1980.mem 620 68 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+81 133262 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1981.mem 53 5 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+82 135869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1982.mem 26 2 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+83 144890 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1983.mem 179 19 0 sh3_zsrt139f1983_pal.mem 0x3e849a98
+84 145712 12288 480 sh3_zsrt139f1983_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f1984.mem 116 12 1 sh3_zsrt139f1983_pal.mem 0x3e849a98
+85 146205 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1985.mem 1007 111 0 sh3_zsrt139f1985_pal.mem 0xfd978fd9
+86 146630 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1986.mem 287 31 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9
+87 147068 11264 480 sh3_zsrt139f1985_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1987.mem 332 36 1 sh3_zsrt139f1985_pal.mem 0xfd978fd9
+88 147480 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1988.mem 683 75 0 sh3_zsrt139f1988_pal.mem 0xd5ed05ff
+89 147888 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1989.mem 665 73 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff
+90 148264 11264 480 sh3_zsrt139f1988_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1990.mem 1025 113 1 sh3_zsrt139f1988_pal.mem 0xd5ed05ff
+91 148919 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1991.mem 935 103 0 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+92 149509 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1992.mem 827 91 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+93 150125 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1993.mem 701 77 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+94 150741 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1994.mem 710 78 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+95 151344 11264 480 sh3_zsrt139f1991_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1995.mem 404 44 1 sh3_zsrt139f1991_pal.mem 0xcdf8a4d8
+96 152021 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1996.mem 206 22 0 sh3_zsrt139f1996_pal.mem 0xc6784386
+97 152420 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1997.mem 242 26 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+98 152806 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1998.mem 296 32 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+99 153218 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f1999.mem 152 16 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+100 153643 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19100.mem 44 4 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+101 154029 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19101.mem 278 30 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+102 154428 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19102.mem 197 21 1 sh3_zsrt139f1996_pal.mem 0xc6784386
+103 154853 11264 480 sh3_zsrt139f1996_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f19103.mem 188 20 1 sh3_zsrt139f1996_pal.mem 0xc6784386
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+288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
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sim/data/top_psmct32_raster_demo/sh3_zsrt139f37_epochs.txt

@@ -0,0 +1,8 @@
+# Ch430 epoch descriptor table (2 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 2 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 198700 9216 480 sh3_zsrt139f370_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f370.mem 476 52 0 sh3_zsrt139f370_pal.mem 0xcb75e100
+1 198700 9216 480 sh3_zsrt139f370_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f371.mem 71 7 1 sh3_zsrt139f370_pal.mem 0xcb75e100

sim/data/top_psmct32_raster_demo/sh3_zsrt139f38_epochs.txt

@@ -0,0 +1,295 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f36', 'zsrt139f37']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 292 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
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+245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76
+254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76
+255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76
+256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76
+257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76
+259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76
+260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
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+265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76
+266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76
+267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
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+273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
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+288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76
+290 198700 9216 480 sh3_zsrt139f370_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f370.mem 476 52 0 sh3_zsrt139f370_pal.mem 0xcb75e100
+291 198700 9216 480 sh3_zsrt139f370_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f371.mem 71 7 1 sh3_zsrt139f370_pal.mem 0xcb75e100

sim/data/top_psmct32_raster_demo/sh3_zsrt139f39_epochs.txt

@@ -0,0 +1,10 @@
+# Ch430 epoch descriptor table (4 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 4 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f390.mem 242 26 0 sh3_zsrt139f390_pal.mem 0xcb75e100
+1 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f391.mem 197 21 1 sh3_zsrt139f390_pal.mem 0xcb75e100
+2 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f392.mem 89 9 1 sh3_zsrt139f390_pal.mem 0xcb75e100
+3 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f393.mem 35 3 1 sh3_zsrt139f390_pal.mem 0xcb75e100

sim/data/top_psmct32_raster_demo/sh3_zsrt139f40_epochs.txt

@@ -0,0 +1,297 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f36', 'zsrt139f39']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 294 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
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+35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
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+270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76
+273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76
+286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76
+290 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f390.mem 242 26 0 sh3_zsrt139f390_pal.mem 0xcb75e100
+291 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f391.mem 197 21 1 sh3_zsrt139f390_pal.mem 0xcb75e100
+292 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f392.mem 89 9 1 sh3_zsrt139f390_pal.mem 0xcb75e100
+293 198700 9216 480 sh3_zsrt139f390_tex_lpddr.mem 0x200000 262144 0xe0044692 feeder_sh3_zsrt139f393.mem 35 3 1 sh3_zsrt139f390_pal.mem 0xcb75e100

sim/data/top_psmct32_raster_demo/sh3_zsrt139f41_epochs.txt

@@ -0,0 +1,8 @@
+# Ch431 epoch descriptor table (2 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 2 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 165358 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f410.mem 17 1 0 sh3_zsrt139f410_pal.mem 0x00000000
+1 170407 13760 480 sh3_zsrt139f410_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f411.mem 116 12 1 sh3_zsrt139f410_pal.mem 0x00000000

sim/data/top_psmct32_raster_demo/sh3_zsrt139f41c_epochs.txt

@@ -0,0 +1,7 @@
+# Ch435 epoch descriptor table (1 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 1 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 165358 13760 480 sh3_zsrt139f41c0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41c0.mem 125 13 0 sh3_zsrt139f41c0_pal.mem 0x00000000

sim/data/top_psmct32_raster_demo/sh3_zsrt139f41d_epochs.txt

@@ -0,0 +1,8 @@
+# Ch435 epoch descriptor table (2 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 2 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 165358 13760 480 sh3_zsrt139f41d0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41d0.mem 17 1 0 sh3_zsrt139f41d0_pal.mem 0x00000000
+1 170407 13760 480 sh3_zsrt139f41d0_tex_lpddr.mem 0x200000 262144 0xb0a82094 feeder_sh3_zsrt139f41d1.mem 116 12 1 sh3_zsrt139f41d0_pal.mem 0x00000000

sim/data/top_psmct32_raster_demo/sh3_zsrt139f42_epochs.txt

@@ -0,0 +1,295 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f19@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f19@123:125', 'zsrt139f11d', 'zsrt139f27']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 292 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f190_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f190.mem 44 4 0 sh3_zsrt139f190_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f191.mem 1583 175 0 sh3_zsrt139f191_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f191_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f192.mem 1835 203 1 sh3_zsrt139f191_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f193_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f193.mem 350 38 0 sh3_zsrt139f193_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f194.mem 1322 146 0 sh3_zsrt139f194_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f195.mem 116 12 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f194_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f196.mem 629 69 1 sh3_zsrt139f194_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f197.mem 260 28 0 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f198.mem 593 65 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f197_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f199.mem 332 36 1 sh3_zsrt139f197_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1910.mem 35 3 0 sh3_zsrt139f1910_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1911.mem 350 38 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1912.mem 602 66 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1913.mem 944 104 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1914.mem 593 65 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1915.mem 737 81 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f1910_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1916.mem 1187 131 1 sh3_zsrt139f1910_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1917.mem 674 74 0 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1918.mem 323 35 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1919.mem 296 32 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1920.mem 521 57 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1921.mem 701 77 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1922.mem 422 46 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1923.mem 683 75 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1924.mem 1070 118 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1925.mem 539 59 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f1917_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f1926.mem 674 74 1 sh3_zsrt139f1917_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1927.mem 476 52 0 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1928.mem 449 49 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1929.mem 809 89 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1930.mem 593 65 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1931.mem 701 77 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1932.mem 476 52 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1933.mem 935 103 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1934.mem 584 64 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1935.mem 314 34 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1936.mem 26 2 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1937.mem 2042 226 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1938.mem 1016 112 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1939.mem 1808 200 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f1927_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1940.mem 494 54 1 sh3_zsrt139f1927_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f1941_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f1941.mem 188 20 0 sh3_zsrt139f1941_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1942.mem 1466 162 0 sh3_zsrt139f1942_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1943.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1944.mem 287 31 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1945.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1946.mem 413 45 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1947.mem 1754 194 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1948.mem 1556 172 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+49 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1949.mem 2042 226 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+50 117599 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1950.mem 98 10 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+51 118238 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1951.mem 1790 198 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+52 118877 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1952.mem 1178 130 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+53 119471 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1953.mem 485 53 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+54 120110 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1954.mem 1889 209 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1955.mem 1502 166 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+56 120749 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1956.mem 575 63 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+57 121388 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1957.mem 1016 112 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+58 122027 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1958.mem 872 96 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+59 122600 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1959.mem 782 86 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+60 123239 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1960.mem 170 18 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+61 123869 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1961.mem 251 27 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
+62 124508 8192 480 sh3_zsrt139f1942_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f1962.mem 323 35 1 sh3_zsrt139f1942_pal.mem 0x47097d4c
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+285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76
+288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f43_ch433_board_run.log

@@ -0,0 +1,764 @@
+[sched] feeder ready=1
+[sched] scene sh3_zsrt139f43_epochs.txt: 125 epochs, FB 307200 words, tex 65536 words/8192 beats
+[sched] epoch 0: idx1772 tbp12288 cbp480  tex crc=0x42d367ae (exp 0x42d367ae)  4 tris/44 words
+[sched] epoch 1: idx6822 tbp11264 cbp480  tex crc=0x55070afa (exp 0x55070afa)  175 tris/1583 words
+[sched] epoch 2: idx8151 tbp11264 cbp480  REUSE resident tex (crc 0x55070afa)  203 tris/1835 words
+[sched] epoch 3: idx12757 tbp10240 cbp480  tex crc=0x26a88b77 (exp 0x26a88b77)  38 tris/350 words
+[sched] epoch 4: idx15277 tbp12288 cbp480  tex crc=0x835dceb6 (exp 0x835dceb6)  146 tris/1322 words
+[sched] epoch 5: idx15277 tbp12288 cbp480  REUSE resident tex (crc 0x835dceb6)  12 tris/116 words
+[sched] epoch 6: idx15931 tbp12288 cbp480  REUSE resident tex (crc 0x835dceb6)  69 tris/629 words
+[sched] epoch 7: idx20246 tbp11264 cbp480  tex crc=0x95a83cbc (exp 0x95a83cbc)  28 tris/260 words
+[sched] epoch 8: idx20792 tbp11264 cbp480  REUSE resident tex (crc 0x95a83cbc)  65 tris/593 words
+[sched] epoch 9: idx21386 tbp11264 cbp480  REUSE resident tex (crc 0x95a83cbc)  36 tris/332 words
+[sched] epoch 10: idx30461 tbp10240 cbp480  tex crc=0xa727234d (exp 0xa727234d)  3 tris/35 words
+[sched] epoch 11: idx31915 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  38 tris/350 words
+[sched] epoch 12: idx33303 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  66 tris/602 words
+[sched] epoch 13: idx34605 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  104 tris/944 words
+[sched] epoch 14: idx35907 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  65 tris/593 words
+[sched] epoch 15: idx37209 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  81 tris/737 words
+[sched] epoch 16: idx38511 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  131 tris/1187 words
+[sched] epoch 17: idx71148 tbp10240 cbp480  tex crc=0xa727234d (exp 0xa727234d)  74 tris/674 words
+[sched] epoch 18: idx71787 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  35 tris/323 words
+[sched] epoch 19: idx72426 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  32 tris/296 words
+[sched] epoch 20: idx73065 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  57 tris/521 words
+[sched] epoch 21: idx73704 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  77 tris/701 words
+[sched] epoch 22: idx74343 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  46 tris/422 words
+[sched] epoch 23: idx74982 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  75 tris/683 words
+[sched] epoch 24: idx75621 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  118 tris/1070 words
+[sched] epoch 25: idx76260 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  59 tris/539 words
+[sched] epoch 26: idx76899 tbp10240 cbp480  REUSE resident tex (crc 0xa727234d)  74 tris/674 words
+[sched] epoch 27: idx78319 tbp9216 cbp480  tex crc=0xfbdeaa32 (exp 0xfbdeaa32)  52 tris/476 words
+[sched] epoch 28: idx82720 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  49 tris/449 words
+[sched] epoch 29: idx83323 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  89 tris/809 words
+[sched] epoch 30: idx83944 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  65 tris/593 words
+[sched] epoch 31: idx84565 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  77 tris/701 words
+[sched] epoch 32: idx85186 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  52 tris/476 words
+[sched] epoch 33: idx85807 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  103 tris/935 words
+[sched] epoch 34: idx86428 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  64 tris/584 words
+[sched] epoch 35: idx87049 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  34 tris/314 words
+[sched] epoch 36: idx88918 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  2 tris/26 words
+[sched] epoch 37: idx89548 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  226 tris/2042 words
+[sched] epoch 38: idx89548 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  112 tris/1016 words
+[sched] epoch 39: idx90187 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  200 tris/1808 words
+[sched] epoch 40: idx90187 tbp9216 cbp480  REUSE resident tex (crc 0xfbdeaa32)  54 tris/494 words
+[sched] epoch 41: idx91678 tbp9216 cbp480  tex crc=0xfbdeaa32 (exp 0xfbdeaa32)  20 tris/188 words
+[sched] epoch 42: idx114431 tbp8192 cbp480  tex crc=0xcf4cae27 (exp 0xcf4cae27)  162 tris/1466 words
+[sched] epoch 43: idx115016 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  226 tris/2042 words
+[sched] epoch 44: idx115016 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  31 tris/287 words
+[sched] epoch 45: idx115655 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  226 tris/2042 words
+[sched] epoch 46: idx115655 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  45 tris/413 words
+[sched] epoch 47: idx116351 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  194 tris/1754 words
+[sched] epoch 48: idx117050 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  172 tris/1556 words
+[sched] epoch 49: idx117599 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  226 tris/2042 words
+[sched] epoch 50: idx117599 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  10 tris/98 words
+[sched] epoch 51: idx118238 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  198 tris/1790 words
+[sched] epoch 52: idx118877 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  130 tris/1178 words
+[sched] epoch 53: idx119471 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  53 tris/485 words
+[sched] epoch 54: idx120110 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  209 tris/1889 words
+[sched] epoch 55: idx120749 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  166 tris/1502 words
+[sched] epoch 56: idx120749 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  63 tris/575 words
+[sched] epoch 57: idx121388 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  112 tris/1016 words
+[sched] epoch 58: idx122027 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  96 tris/872 words
+[sched] epoch 59: idx122600 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  86 tris/782 words
+[sched] epoch 60: idx123239 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  18 tris/170 words
+[sched] epoch 61: idx123869 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  27 tris/251 words
+[sched] epoch 62: idx124508 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  35 tris/323 words
+[sched] epoch 63: idx125147 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  9 tris/89 words
+[sched] epoch 64: idx125786 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  61 tris/557 words
+[sched] epoch 65: idx126434 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  40 tris/368 words
+[sched] epoch 66: idx126968 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  71 tris/647 words
+[sched] epoch 67: idx127607 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  58 tris/530 words
+[sched] epoch 68: idx128246 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  48 tris/440 words
+[sched] epoch 69: idx128885 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  6 tris/62 words
+[sched] epoch 70: idx129389 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  165 tris/1493 words
+[sched] epoch 71: idx130028 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  135 tris/1223 words
+[sched] epoch 72: idx130667 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  180 tris/1628 words
+[sched] epoch 73: idx130667 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  24 tris/224 words
+[sched] epoch 74: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  53 tris/485 words
+[sched] epoch 75: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  62 tris/566 words
+[sched] epoch 76: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  57 tris/521 words
+[sched] epoch 77: idx131306 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  83 tris/755 words
+[sched] epoch 78: idx131945 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  159 tris/1439 words
+[sched] epoch 79: idx132584 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  105 tris/953 words
+[sched] epoch 80: idx133262 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  68 tris/620 words
+[sched] epoch 81: idx133262 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  5 tris/53 words
+[sched] epoch 82: idx135869 tbp8192 cbp480  REUSE resident tex (crc 0xcf4cae27)  2 tris/26 words
+[sched] epoch 83: idx144890 tbp12288 cbp480  tex crc=0x87415c50 (exp 0x87415c50)  19 tris/179 words
+[sched] epoch 84: idx145712 tbp12288 cbp480  REUSE resident tex (crc 0x87415c50)  12 tris/116 words
+[sched] epoch 85: idx146205 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  111 tris/1007 words
+[sched] epoch 86: idx146630 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  31 tris/287 words
+[sched] epoch 87: idx147068 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  36 tris/332 words
+[sched] epoch 88: idx147480 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  75 tris/683 words
+[sched] epoch 89: idx147888 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  73 tris/665 words
+[sched] epoch 90: idx148264 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  113 tris/1025 words
+[sched] epoch 91: idx148919 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  103 tris/935 words
+[sched] epoch 92: idx149509 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  91 tris/827 words
+[sched] epoch 93: idx150125 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  77 tris/701 words
+[sched] epoch 94: idx150741 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  78 tris/710 words
+[sched] epoch 95: idx151344 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  44 tris/404 words
+[sched] epoch 96: idx152021 tbp11264 cbp480  tex crc=0xeadeb012 (exp 0xeadeb012)  22 tris/206 words
+[sched] epoch 97: idx152420 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  26 tris/242 words
+[sched] epoch 98: idx152806 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  32 tris/296 words
+[sched] epoch 99: idx153218 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  16 tris/152 words
+[sched] epoch 100: idx153643 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  4 tris/44 words
+[sched] epoch 101: idx154029 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  30 tris/278 words
+[sched] epoch 102: idx154428 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  21 tris/197 words
+[sched] epoch 103: idx154853 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  20 tris/188 words
+[sched] epoch 104: idx155265 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  16 tris/152 words
+[sched] epoch 105: idx155664 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  11 tris/107 words
+[sched] epoch 106: idx156063 tbp11264 cbp480  REUSE resident tex (crc 0xeadeb012)  8 tris/80 words
+[sched] epoch 107: idx156566 tbp10240 cbp480  tex crc=0xb710940e (exp 0xb710940e)  137 tris/1241 words
+[sched] epoch 108: idx157273 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  113 tris/1025 words
+[sched] epoch 109: idx157967 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  81 tris/737 words
+[sched] epoch 110: idx158674 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  93 tris/845 words
+[sched] epoch 111: idx159420 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  58 tris/530 words
+[sched] epoch 112: idx160114 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  10 tris/98 words
+[sched] epoch 113: idx160331 tbp10240 cbp480  tex crc=0xb710940e (exp 0xb710940e)  31 tris/287 words
+[sched] epoch 114: idx160769 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  28 tris/260 words
+[sched] epoch 115: idx161168 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  40 tris/368 words
+[sched] epoch 116: idx161567 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  26 tris/242 words
+[sched] epoch 117: idx162300 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  37 tris/341 words
+[sched] epoch 118: idx162725 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  33 tris/305 words
+[sched] epoch 119: idx163163 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  22 tris/206 words
+[sched] epoch 120: idx163575 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  26 tris/242 words
+[sched] epoch 121: idx164204 tbp10240 cbp480  tex crc=0xb710940e (exp 0xb710940e)  66 tris/602 words
+[sched] epoch 122: idx164950 tbp10240 cbp480  REUSE resident tex (crc 0xb710940e)  39 tris/359 words
+[sched] epoch 123: idx175995 tbp12288 cbp480  tex crc=0xf2553358 (exp 0xf2553358)  37 tris/341 words
+[sched] epoch 124: idx176446 tbp12288 cbp480  REUSE resident tex (crc 0xf2553358)  18 tris/170 words
+[sched] preclear COLOR 307200 words (0x0..0x12c000)  wr_bresp_errs=0
+[sched] preclear Z 153600 words (0x140000..0x1d6000)  wr_bresp_errs=0
+[sched] zbuf: armed early for fresh frame Z-preclear
+[sched] epoch 0 tex: upload wr_errs=0 ; fill crc=0x42d367ae (exp 0x42d367ae) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 0 pal: runtime copy sum32=0x60778774 (exp 0x60778774)
+[sched] epoch 0: streamed 44 words, staged_addr=44 (exp 44, < 4096)
+[sched] zbuf: Z preclear complete (0x02C[7]) — safe to GO
+[sched] epoch 0: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2183533
+[sched] epoch 0: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 1 tex: upload wr_errs=0 ; fill crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 1 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4)
+[sched] epoch 1: streamed 1583 words, staged_addr=1583 (exp 1583, < 4096)
+[sched] epoch 1: GO -> fresh drain frame_drained=1, records=175 (exp 175), FB beats=2185701
+[sched] epoch 1: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 2: REUSE resident texture (no upload/fill): crc=0x55070afa (exp 0x55070afa) beats=8192 (exp 8192)
+[sched] epoch 2 pal: runtime copy sum32=0x32ed74c4 (exp 0x32ed74c4)
+[sched] epoch 2: streamed 1835 words, staged_addr=1835 (exp 1835, < 4096)
+[sched] epoch 2: GO -> fresh drain frame_drained=1, records=203 (exp 203), FB beats=2188375
+[sched] epoch 2: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 3 tex: upload wr_errs=0 ; fill crc=0x26a88b77 (exp 0x26a88b77) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 3 pal: runtime copy sum32=0x3cd88c98 (exp 0x3cd88c98)
+[sched] epoch 3: streamed 350 words, staged_addr=350 (exp 350, < 4096)
+[sched] epoch 3: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=2188866
+[sched] epoch 3: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 4 tex: upload wr_errs=0 ; fill crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 4 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2)
+[sched] epoch 4: streamed 1322 words, staged_addr=1322 (exp 1322, < 4096)
+[sched] epoch 4: GO -> fresh drain frame_drained=1, records=146 (exp 146), FB beats=2191844
+[sched] epoch 4: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 5: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192)
+[sched] epoch 5 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2)
+[sched] epoch 5: streamed 116 words, staged_addr=116 (exp 116, < 4096)
+[sched] epoch 5: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2192175
+[sched] epoch 5: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 6: REUSE resident texture (no upload/fill): crc=0x835dceb6 (exp 0x835dceb6) beats=8192 (exp 8192)
+[sched] epoch 6 pal: runtime copy sum32=0x4812d6f2 (exp 0x4812d6f2)
+[sched] epoch 6: streamed 629 words, staged_addr=629 (exp 629, < 4096)
+[sched] epoch 6: GO -> fresh drain frame_drained=1, records=69 (exp 69), FB beats=2193628
+[sched] epoch 6: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 7 tex: upload wr_errs=0 ; fill crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 7 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4)
+[sched] epoch 7: streamed 260 words, staged_addr=260 (exp 260, < 4096)
+[sched] epoch 7: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=2193663
+[sched] epoch 7: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 8: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192)
+[sched] epoch 8 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4)
+[sched] epoch 8: streamed 593 words, staged_addr=593 (exp 593, < 4096)
+[sched] epoch 8: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2193943
+[sched] epoch 8: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 9: REUSE resident texture (no upload/fill): crc=0x95a83cbc (exp 0x95a83cbc) beats=8192 (exp 8192)
+[sched] epoch 9 pal: runtime copy sum32=0x5cbf8bb4 (exp 0x5cbf8bb4)
+[sched] epoch 9: streamed 332 words, staged_addr=332 (exp 332, < 4096)
+[sched] epoch 9: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=2194188
+[sched] epoch 9: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 10 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 10 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 10: streamed 35 words, staged_addr=35 (exp 35, < 4096)
+[sched] epoch 10: drain low pulse completed between host polls; counters advanced (records 36->3, FB beats 2194188->2194191)
+[sched] epoch 10: GO -> fresh drain frame_drained=1, records=3 (exp 3), FB beats=2194191
+[sched] epoch 10: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 11: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 11 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 11: streamed 350 words, staged_addr=350 (exp 350, < 4096)
+[sched] epoch 11: GO -> fresh drain frame_drained=1, records=38 (exp 38), FB beats=2194317
+[sched] epoch 11: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 12: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 12 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 12: streamed 602 words, staged_addr=602 (exp 602, < 4096)
+[sched] epoch 12: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=2194580
+[sched] epoch 12: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 13: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 13 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 13: streamed 944 words, staged_addr=944 (exp 944, < 4096)
+[sched] epoch 13: GO -> fresh drain frame_drained=1, records=104 (exp 104), FB beats=2194984
+[sched] epoch 13: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 14: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 14 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 14: streamed 593 words, staged_addr=593 (exp 593, < 4096)
+[sched] epoch 14: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2195241
+[sched] epoch 14: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 15: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 15 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 15: streamed 737 words, staged_addr=737 (exp 737, < 4096)
+[sched] epoch 15: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=2195677
+[sched] epoch 15: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 16: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 16 pal: runtime copy sum32=0x47405cb0 (exp 0x47405cb0)
+[sched] epoch 16: streamed 1187 words, staged_addr=1187 (exp 1187, < 4096)
+[sched] epoch 16: GO -> fresh drain frame_drained=1, records=131 (exp 131), FB beats=2196539
+[sched] epoch 16: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 17 tex: upload wr_errs=0 ; fill crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 17 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 17: streamed 674 words, staged_addr=674 (exp 674, < 4096)
+[sched] epoch 17: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=2196888
+[sched] epoch 17: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 18: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 18 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 18: streamed 323 words, staged_addr=323 (exp 323, < 4096)
+[sched] epoch 18: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=2196981
+[sched] epoch 18: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 19: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 19 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 19: streamed 296 words, staged_addr=296 (exp 296, < 4096)
+[sched] epoch 19: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2197066
+[sched] epoch 19: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 20: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 20 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 20: streamed 521 words, staged_addr=521 (exp 521, < 4096)
+[sched] epoch 20: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2197391
+[sched] epoch 20: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 21: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 21 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 21: streamed 701 words, staged_addr=701 (exp 701, < 4096)
+[sched] epoch 21: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2197795
+[sched] epoch 21: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 22: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 22 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 22: streamed 422 words, staged_addr=422 (exp 422, < 4096)
+[sched] epoch 22: GO -> fresh drain frame_drained=1, records=46 (exp 46), FB beats=2197939
+[sched] epoch 22: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 23: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 23 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 23: streamed 683 words, staged_addr=683 (exp 683, < 4096)
+[sched] epoch 23: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=2198432
+[sched] epoch 23: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 24: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 24 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 24: streamed 1070 words, staged_addr=1070 (exp 1070, < 4096)
+[sched] epoch 24: GO -> fresh drain frame_drained=1, records=118 (exp 118), FB beats=2199235
+[sched] epoch 24: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 25: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 25 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 25: streamed 539 words, staged_addr=539 (exp 539, < 4096)
+[sched] epoch 25: GO -> fresh drain frame_drained=1, records=59 (exp 59), FB beats=2199627
+[sched] epoch 25: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 26: REUSE resident texture (no upload/fill): crc=0xa727234d (exp 0xa727234d) beats=8192 (exp 8192)
+[sched] epoch 26 pal: runtime copy sum32=0x43ece1ae (exp 0x43ece1ae)
+[sched] epoch 26: streamed 674 words, staged_addr=674 (exp 674, < 4096)
+[sched] epoch 26: GO -> fresh drain frame_drained=1, records=74 (exp 74), FB beats=2200010
+[sched] epoch 26: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 27 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 27 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 27: streamed 476 words, staged_addr=476 (exp 476, < 4096)
+[sched] epoch 27: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=2200431
+[sched] epoch 27: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 28: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 28 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 28: streamed 449 words, staged_addr=449 (exp 449, < 4096)
+[sched] epoch 28: GO -> fresh drain frame_drained=1, records=49 (exp 49), FB beats=2200524
+[sched] epoch 28: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 29: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 29 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 29: streamed 809 words, staged_addr=809 (exp 809, < 4096)
+[sched] epoch 29: GO -> fresh drain frame_drained=1, records=89 (exp 89), FB beats=2201006
+[sched] epoch 29: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 30: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 30 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 30: streamed 593 words, staged_addr=593 (exp 593, < 4096)
+[sched] epoch 30: GO -> fresh drain frame_drained=1, records=65 (exp 65), FB beats=2201141
+[sched] epoch 30: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 31: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 31 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 31: streamed 701 words, staged_addr=701 (exp 701, < 4096)
+[sched] epoch 31: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2201335
+[sched] epoch 31: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 32: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 32 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 32: streamed 476 words, staged_addr=476 (exp 476, < 4096)
+[sched] epoch 32: GO -> fresh drain frame_drained=1, records=52 (exp 52), FB beats=2201513
+[sched] epoch 32: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 33: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 33 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 33: streamed 935 words, staged_addr=935 (exp 935, < 4096)
+[sched] epoch 33: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=2201805
+[sched] epoch 33: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 34: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 34 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 34: streamed 584 words, staged_addr=584 (exp 584, < 4096)
+[sched] epoch 34: GO -> fresh drain frame_drained=1, records=64 (exp 64), FB beats=2201890
+[sched] epoch 34: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 35: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 35 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 35: streamed 314 words, staged_addr=314 (exp 314, < 4096)
+[sched] epoch 35: GO -> fresh drain frame_drained=1, records=34 (exp 34), FB beats=2201926
+[sched] epoch 35: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 36: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 36 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 36: streamed 26 words, staged_addr=26 (exp 26, < 4096)
+[sched] epoch 36: drain low pulse completed between host polls; counters advanced (records 34->2, FB beats 2201926->2201935)
+[sched] epoch 36: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=2201935
+[sched] epoch 36: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 37: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 37 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 37: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096)
+[sched] epoch 37: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2204479
+[sched] epoch 37: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 38: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 38 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 38: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096)
+[sched] epoch 38: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=2205248
+[sched] epoch 38: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 39: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 39 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 39: streamed 1808 words, staged_addr=1808 (exp 1808, < 4096)
+[sched] epoch 39: GO -> fresh drain frame_drained=1, records=200 (exp 200), FB beats=2208214
+[sched] epoch 39: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 40: REUSE resident texture (no upload/fill): crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192)
+[sched] epoch 40 pal: runtime copy sum32=0x5dfce0a2 (exp 0x5dfce0a2)
+[sched] epoch 40: streamed 494 words, staged_addr=494 (exp 494, < 4096)
+[sched] epoch 40: GO -> fresh drain frame_drained=1, records=54 (exp 54), FB beats=2208537
+[sched] epoch 40: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 41 tex: upload wr_errs=0 ; fill crc=0xfbdeaa32 (exp 0xfbdeaa32) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 41 pal: runtime copy sum32=0x181b2ac2 (exp 0x181b2ac2)
+[sched] epoch 41: streamed 188 words, staged_addr=188 (exp 188, < 4096)
+[sched] epoch 41: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=2208646
+[sched] epoch 41: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 42 tex: upload wr_errs=0 ; fill crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 42 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 42: streamed 1466 words, staged_addr=1466 (exp 1466, < 4096)
+[sched] epoch 42: GO -> fresh drain frame_drained=1, records=162 (exp 162), FB beats=2208864
+[sched] epoch 42: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 43: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 43 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 43: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096)
+[sched] epoch 43: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2209333
+[sched] epoch 43: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 44: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 44 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 44: streamed 287 words, staged_addr=287 (exp 287, < 4096)
+[sched] epoch 44: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2209468
+[sched] epoch 44: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 45: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 45 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 45: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096)
+[sched] epoch 45: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2210735
+[sched] epoch 45: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 46: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 46 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 46: streamed 413 words, staged_addr=413 (exp 413, < 4096)
+[sched] epoch 46: GO -> fresh drain frame_drained=1, records=45 (exp 45), FB beats=2210997
+[sched] epoch 46: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 47: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 47 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 47: streamed 1754 words, staged_addr=1754 (exp 1754, < 4096)
+[sched] epoch 47: GO -> fresh drain frame_drained=1, records=194 (exp 194), FB beats=2212057
+[sched] epoch 47: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 48: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 48 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 48: streamed 1556 words, staged_addr=1556 (exp 1556, < 4096)
+[sched] epoch 48: GO -> fresh drain frame_drained=1, records=172 (exp 172), FB beats=2212792
+[sched] epoch 48: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 49: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 49 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 49: streamed 2042 words, staged_addr=2042 (exp 2042, < 4096)
+[sched] epoch 49: GO -> fresh drain frame_drained=1, records=226 (exp 226), FB beats=2213624
+[sched] epoch 49: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 50: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 50 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 50: streamed 98 words, staged_addr=98 (exp 98, < 4096)
+[sched] epoch 50: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=2213643
+[sched] epoch 50: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 51: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 51 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 51: streamed 1790 words, staged_addr=1790 (exp 1790, < 4096)
+[sched] epoch 51: GO -> fresh drain frame_drained=1, records=198 (exp 198), FB beats=2214018
+[sched] epoch 51: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 52: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 52 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 52: streamed 1178 words, staged_addr=1178 (exp 1178, < 4096)
+[sched] epoch 52: GO -> fresh drain frame_drained=1, records=130 (exp 130), FB beats=2214357
+[sched] epoch 52: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 53: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 53 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 53: streamed 485 words, staged_addr=485 (exp 485, < 4096)
+[sched] epoch 53: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2214725
+[sched] epoch 53: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 54: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 54 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 54: streamed 1889 words, staged_addr=1889 (exp 1889, < 4096)
+[sched] epoch 54: GO -> fresh drain frame_drained=1, records=209 (exp 209), FB beats=2215757
+[sched] epoch 54: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 55: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 55 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 55: streamed 1502 words, staged_addr=1502 (exp 1502, < 4096)
+[sched] epoch 55: GO -> fresh drain frame_drained=1, records=166 (exp 166), FB beats=2218437
+[sched] epoch 55: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 56: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 56 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 56: streamed 575 words, staged_addr=575 (exp 575, < 4096)
+[sched] epoch 56: GO -> fresh drain frame_drained=1, records=63 (exp 63), FB beats=2218995
+[sched] epoch 56: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 57: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 57 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 57: streamed 1016 words, staged_addr=1016 (exp 1016, < 4096)
+[sched] epoch 57: GO -> fresh drain frame_drained=1, records=112 (exp 112), FB beats=2220336
+[sched] epoch 57: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 58: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 58 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 58: streamed 872 words, staged_addr=872 (exp 872, < 4096)
+[sched] epoch 58: GO -> fresh drain frame_drained=1, records=96 (exp 96), FB beats=2221587
+[sched] epoch 58: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 59: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 59 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 59: streamed 782 words, staged_addr=782 (exp 782, < 4096)
+[sched] epoch 59: GO -> fresh drain frame_drained=1, records=86 (exp 86), FB beats=2223259
+[sched] epoch 59: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 60: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 60 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 60: streamed 170 words, staged_addr=170 (exp 170, < 4096)
+[sched] epoch 60: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=2223287
+[sched] epoch 60: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 61: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 61 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 61: streamed 251 words, staged_addr=251 (exp 251, < 4096)
+[sched] epoch 61: GO -> fresh drain frame_drained=1, records=27 (exp 27), FB beats=2223364
+[sched] epoch 61: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 62: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 62 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 62: streamed 323 words, staged_addr=323 (exp 323, < 4096)
+[sched] epoch 62: GO -> fresh drain frame_drained=1, records=35 (exp 35), FB beats=2223499
+[sched] epoch 62: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 63: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 63 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 63: streamed 89 words, staged_addr=89 (exp 89, < 4096)
+[sched] epoch 63: GO -> fresh drain frame_drained=1, records=9 (exp 9), FB beats=2223537
+[sched] epoch 63: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 64: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 64 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 64: streamed 557 words, staged_addr=557 (exp 557, < 4096)
+[sched] epoch 64: GO -> fresh drain frame_drained=1, records=61 (exp 61), FB beats=2223727
+[sched] epoch 64: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 65: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 65 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 65: streamed 368 words, staged_addr=368 (exp 368, < 4096)
+[sched] epoch 65: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=2223943
+[sched] epoch 65: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 66: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 66 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 66: streamed 647 words, staged_addr=647 (exp 647, < 4096)
+[sched] epoch 66: GO -> fresh drain frame_drained=1, records=71 (exp 71), FB beats=2224299
+[sched] epoch 66: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 67: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 67 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 67: streamed 530 words, staged_addr=530 (exp 530, < 4096)
+[sched] epoch 67: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=2224613
+[sched] epoch 67: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 68: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 68 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 68: streamed 440 words, staged_addr=440 (exp 440, < 4096)
+[sched] epoch 68: GO -> fresh drain frame_drained=1, records=48 (exp 48), FB beats=2224855
+[sched] epoch 68: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 69: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 69 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 69: streamed 62 words, staged_addr=62 (exp 62, < 4096)
+[sched] epoch 69: GO -> fresh drain frame_drained=1, records=6 (exp 6), FB beats=2224889
+[sched] epoch 69: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 70: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 70 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 70: streamed 1493 words, staged_addr=1493 (exp 1493, < 4096)
+[sched] epoch 70: GO -> fresh drain frame_drained=1, records=165 (exp 165), FB beats=2225654
+[sched] epoch 70: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 71: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 71 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 71: streamed 1223 words, staged_addr=1223 (exp 1223, < 4096)
+[sched] epoch 71: GO -> fresh drain frame_drained=1, records=135 (exp 135), FB beats=2226431
+[sched] epoch 71: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 72: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 72 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 72: streamed 1628 words, staged_addr=1628 (exp 1628, < 4096)
+[sched] epoch 72: GO -> fresh drain frame_drained=1, records=180 (exp 180), FB beats=2229086
+[sched] epoch 72: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 73: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 73 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 73: streamed 224 words, staged_addr=224 (exp 224, < 4096)
+[sched] epoch 73: GO -> fresh drain frame_drained=1, records=24 (exp 24), FB beats=2229719
+[sched] epoch 73: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 74: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 74 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 74: streamed 485 words, staged_addr=485 (exp 485, < 4096)
+[sched] epoch 74: GO -> fresh drain frame_drained=1, records=53 (exp 53), FB beats=2231610
+[sched] epoch 74: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 75: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 75 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 75: streamed 566 words, staged_addr=566 (exp 566, < 4096)
+[sched] epoch 75: GO -> fresh drain frame_drained=1, records=62 (exp 62), FB beats=2233605
+[sched] epoch 75: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 76: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 76 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 76: streamed 521 words, staged_addr=521 (exp 521, < 4096)
+[sched] epoch 76: GO -> fresh drain frame_drained=1, records=57 (exp 57), FB beats=2235855
+[sched] epoch 76: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 77: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 77 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 77: streamed 755 words, staged_addr=755 (exp 755, < 4096)
+[sched] epoch 77: GO -> fresh drain frame_drained=1, records=83 (exp 83), FB beats=2237382
+[sched] epoch 77: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 78: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 78 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 78: streamed 1439 words, staged_addr=1439 (exp 1439, < 4096)
+[sched] epoch 78: GO -> fresh drain frame_drained=1, records=159 (exp 159), FB beats=2238410
+[sched] epoch 78: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 79: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 79 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 79: streamed 953 words, staged_addr=953 (exp 953, < 4096)
+[sched] epoch 79: GO -> fresh drain frame_drained=1, records=105 (exp 105), FB beats=2240850
+[sched] epoch 79: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 80: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 80 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 80: streamed 620 words, staged_addr=620 (exp 620, < 4096)
+[sched] epoch 80: GO -> fresh drain frame_drained=1, records=68 (exp 68), FB beats=2243384
+[sched] epoch 80: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 81: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 81 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 81: streamed 53 words, staged_addr=53 (exp 53, < 4096)
+[sched] epoch 81: GO -> fresh drain frame_drained=1, records=5 (exp 5), FB beats=2243590
+[sched] epoch 81: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 82: REUSE resident texture (no upload/fill): crc=0xcf4cae27 (exp 0xcf4cae27) beats=8192 (exp 8192)
+[sched] epoch 82 pal: runtime copy sum32=0x47097d4c (exp 0x47097d4c)
+[sched] epoch 82: streamed 26 words, staged_addr=26 (exp 26, < 4096)
+[sched] epoch 82: drain low pulse completed between host polls; counters advanced (records 5->2, FB beats 2243590->2243592)
+[sched] epoch 82: GO -> fresh drain frame_drained=1, records=2 (exp 2), FB beats=2243592
+[sched] epoch 82: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 83 tex: upload wr_errs=0 ; fill crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 83 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98)
+[sched] epoch 83: streamed 179 words, staged_addr=179 (exp 179, < 4096)
+[sched] epoch 83: GO -> fresh drain frame_drained=1, records=19 (exp 19), FB beats=2243621
+[sched] epoch 83: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 84: REUSE resident texture (no upload/fill): crc=0x87415c50 (exp 0x87415c50) beats=8192 (exp 8192)
+[sched] epoch 84 pal: runtime copy sum32=0x3e849a98 (exp 0x3e849a98)
+[sched] epoch 84: streamed 116 words, staged_addr=116 (exp 116, < 4096)
+[sched] epoch 84: GO -> fresh drain frame_drained=1, records=12 (exp 12), FB beats=2243627
+[sched] epoch 84: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 85 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 85 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9)
+[sched] epoch 85: streamed 1007 words, staged_addr=1007 (exp 1007, < 4096)
+[sched] epoch 85: GO -> fresh drain frame_drained=1, records=111 (exp 111), FB beats=2243887
+[sched] epoch 85: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 86: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 86 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9)
+[sched] epoch 86: streamed 287 words, staged_addr=287 (exp 287, < 4096)
+[sched] epoch 86: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2243992
+[sched] epoch 86: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 87: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 87 pal: runtime copy sum32=0xfd978fd9 (exp 0xfd978fd9)
+[sched] epoch 87: streamed 332 words, staged_addr=332 (exp 332, < 4096)
+[sched] epoch 87: GO -> fresh drain frame_drained=1, records=36 (exp 36), FB beats=2244076
+[sched] epoch 87: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 88 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 88 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff)
+[sched] epoch 88: streamed 683 words, staged_addr=683 (exp 683, < 4096)
+[sched] epoch 88: GO -> fresh drain frame_drained=1, records=75 (exp 75), FB beats=2244366
+[sched] epoch 88: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 89: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 89 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff)
+[sched] epoch 89: streamed 665 words, staged_addr=665 (exp 665, < 4096)
+[sched] epoch 89: GO -> fresh drain frame_drained=1, records=73 (exp 73), FB beats=2244763
+[sched] epoch 89: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 90: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 90 pal: runtime copy sum32=0xd5ed05ff (exp 0xd5ed05ff)
+[sched] epoch 90: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096)
+[sched] epoch 90: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=2245314
+[sched] epoch 90: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 91 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 91 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 91: streamed 935 words, staged_addr=935 (exp 935, < 4096)
+[sched] epoch 91: GO -> fresh drain frame_drained=1, records=103 (exp 103), FB beats=2245673
+[sched] epoch 91: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 92: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 92 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 92: streamed 827 words, staged_addr=827 (exp 827, < 4096)
+[sched] epoch 92: GO -> fresh drain frame_drained=1, records=91 (exp 91), FB beats=2246041
+[sched] epoch 92: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 93: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 93 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 93: streamed 701 words, staged_addr=701 (exp 701, < 4096)
+[sched] epoch 93: GO -> fresh drain frame_drained=1, records=77 (exp 77), FB beats=2246282
+[sched] epoch 93: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 94: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 94 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 94: streamed 710 words, staged_addr=710 (exp 710, < 4096)
+[sched] epoch 94: GO -> fresh drain frame_drained=1, records=78 (exp 78), FB beats=2246527
+[sched] epoch 94: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 95: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 95 pal: runtime copy sum32=0xcdf8a4d8 (exp 0xcdf8a4d8)
+[sched] epoch 95: streamed 404 words, staged_addr=404 (exp 404, < 4096)
+[sched] epoch 95: GO -> fresh drain frame_drained=1, records=44 (exp 44), FB beats=2246673
+[sched] epoch 95: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 96 tex: upload wr_errs=0 ; fill crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 96 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 96: streamed 206 words, staged_addr=206 (exp 206, < 4096)
+[sched] epoch 96: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=2246711
+[sched] epoch 96: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 97: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 97 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 97: streamed 242 words, staged_addr=242 (exp 242, < 4096)
+[sched] epoch 97: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2246771
+[sched] epoch 97: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 98: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 98 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 98: streamed 296 words, staged_addr=296 (exp 296, < 4096)
+[sched] epoch 98: GO -> fresh drain frame_drained=1, records=32 (exp 32), FB beats=2246819
+[sched] epoch 98: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 99: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 99 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 99: streamed 152 words, staged_addr=152 (exp 152, < 4096)
+[sched] epoch 99: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=2246840
+[sched] epoch 99: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 100: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 100 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 100: streamed 44 words, staged_addr=44 (exp 44, < 4096)
+[sched] epoch 100: drain low pulse completed between host polls; counters advanced (records 16->4, FB beats 2246840->2246844)
+[sched] epoch 100: GO -> fresh drain frame_drained=1, records=4 (exp 4), FB beats=2246844
+[sched] epoch 100: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 101: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 101 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 101: streamed 278 words, staged_addr=278 (exp 278, < 4096)
+[sched] epoch 101: GO -> fresh drain frame_drained=1, records=30 (exp 30), FB beats=2246895
+[sched] epoch 101: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 102: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 102 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 102: streamed 197 words, staged_addr=197 (exp 197, < 4096)
+[sched] epoch 102: GO -> fresh drain frame_drained=1, records=21 (exp 21), FB beats=2246976
+[sched] epoch 102: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 103: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 103 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 103: streamed 188 words, staged_addr=188 (exp 188, < 4096)
+[sched] epoch 103: GO -> fresh drain frame_drained=1, records=20 (exp 20), FB beats=2246999
+[sched] epoch 103: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 104: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 104 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 104: streamed 152 words, staged_addr=152 (exp 152, < 4096)
+[sched] epoch 104: GO -> fresh drain frame_drained=1, records=16 (exp 16), FB beats=2247075
+[sched] epoch 104: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 105: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 105 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 105: streamed 107 words, staged_addr=107 (exp 107, < 4096)
+[sched] epoch 105: GO -> fresh drain frame_drained=1, records=11 (exp 11), FB beats=2247091
+[sched] epoch 105: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 106: REUSE resident texture (no upload/fill): crc=0xeadeb012 (exp 0xeadeb012) beats=8192 (exp 8192)
+[sched] epoch 106 pal: runtime copy sum32=0xc6784386 (exp 0xc6784386)
+[sched] epoch 106: streamed 80 words, staged_addr=80 (exp 80, < 4096)
+[sched] epoch 106: drain low pulse completed between host polls; counters advanced (records 11->8, FB beats 2247091->2247103)
+[sched] epoch 106: GO -> fresh drain frame_drained=1, records=8 (exp 8), FB beats=2247103
+[sched] epoch 106: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 107 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 107 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 107: streamed 1241 words, staged_addr=1241 (exp 1241, < 4096)
+[sched] epoch 107: GO -> fresh drain frame_drained=1, records=137 (exp 137), FB beats=2247533
+[sched] epoch 107: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 108: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 108 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 108: streamed 1025 words, staged_addr=1025 (exp 1025, < 4096)
+[sched] epoch 108: GO -> fresh drain frame_drained=1, records=113 (exp 113), FB beats=2247955
+[sched] epoch 108: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 109: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 109 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 109: streamed 737 words, staged_addr=737 (exp 737, < 4096)
+[sched] epoch 109: GO -> fresh drain frame_drained=1, records=81 (exp 81), FB beats=2248303
+[sched] epoch 109: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 110: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 110 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 110: streamed 845 words, staged_addr=845 (exp 845, < 4096)
+[sched] epoch 110: GO -> fresh drain frame_drained=1, records=93 (exp 93), FB beats=2248620
+[sched] epoch 110: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 111: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 111 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 111: streamed 530 words, staged_addr=530 (exp 530, < 4096)
+[sched] epoch 111: GO -> fresh drain frame_drained=1, records=58 (exp 58), FB beats=2248823
+[sched] epoch 111: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 112: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 112 pal: runtime copy sum32=0x00fd9028 (exp 0x00fd9028)
+[sched] epoch 112: streamed 98 words, staged_addr=98 (exp 98, < 4096)
+[sched] epoch 112: GO -> fresh drain frame_drained=1, records=10 (exp 10), FB beats=2248857
+[sched] epoch 112: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 113 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 113 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 113: streamed 287 words, staged_addr=287 (exp 287, < 4096)
+[sched] epoch 113: GO -> fresh drain frame_drained=1, records=31 (exp 31), FB beats=2248915
+[sched] epoch 113: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 114: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 114 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 114: streamed 260 words, staged_addr=260 (exp 260, < 4096)
+[sched] epoch 114: GO -> fresh drain frame_drained=1, records=28 (exp 28), FB beats=2248966
+[sched] epoch 114: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 115: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 115 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 115: streamed 368 words, staged_addr=368 (exp 368, < 4096)
+[sched] epoch 115: GO -> fresh drain frame_drained=1, records=40 (exp 40), FB beats=2249019
+[sched] epoch 115: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 116: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 116 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 116: streamed 242 words, staged_addr=242 (exp 242, < 4096)
+[sched] epoch 116: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2249080
+[sched] epoch 116: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 117: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 117 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 117: streamed 341 words, staged_addr=341 (exp 341, < 4096)
+[sched] epoch 117: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=2249125
+[sched] epoch 117: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 118: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 118 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 118: streamed 305 words, staged_addr=305 (exp 305, < 4096)
+[sched] epoch 118: GO -> fresh drain frame_drained=1, records=33 (exp 33), FB beats=2249164
+[sched] epoch 118: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 119: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 119 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 119: streamed 206 words, staged_addr=206 (exp 206, < 4096)
+[sched] epoch 119: GO -> fresh drain frame_drained=1, records=22 (exp 22), FB beats=2249200
+[sched] epoch 119: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 120: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 120 pal: runtime copy sum32=0xd8d19684 (exp 0xd8d19684)
+[sched] epoch 120: streamed 242 words, staged_addr=242 (exp 242, < 4096)
+[sched] epoch 120: GO -> fresh drain frame_drained=1, records=26 (exp 26), FB beats=2249229
+[sched] epoch 120: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 121 tex: upload wr_errs=0 ; fill crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 121 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05)
+[sched] epoch 121: streamed 602 words, staged_addr=602 (exp 602, < 4096)
+[sched] epoch 121: GO -> fresh drain frame_drained=1, records=66 (exp 66), FB beats=2249369
+[sched] epoch 121: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 122: REUSE resident texture (no upload/fill): crc=0xb710940e (exp 0xb710940e) beats=8192 (exp 8192)
+[sched] epoch 122 pal: runtime copy sum32=0xaa4e7e05 (exp 0xaa4e7e05)
+[sched] epoch 122: streamed 359 words, staged_addr=359 (exp 359, < 4096)
+[sched] epoch 122: GO -> fresh drain frame_drained=1, records=39 (exp 39), FB beats=2249439
+[sched] epoch 122: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 123 tex: upload wr_errs=0 ; fill crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192) bytes=262144 rd_errs=0
+[sched] epoch 123 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1)
+[sched] epoch 123: streamed 341 words, staged_addr=341 (exp 341, < 4096)
+[sched] epoch 123: GO -> fresh drain frame_drained=1, records=37 (exp 37), FB beats=2249516
+[sched] epoch 123: zero fragment drops (snap=0, sticky=0)
+[sched] epoch 124: REUSE resident texture (no upload/fill): crc=0xf2553358 (exp 0xf2553358) beats=8192 (exp 8192)
+[sched] epoch 124 pal: runtime copy sum32=0x56ebf1d1 (exp 0x56ebf1d1)
+[sched] epoch 124: streamed 170 words, staged_addr=170 (exp 170, < 4096)
+[sched] epoch 124: GO -> fresh drain frame_drained=1, records=18 (exp 18), FB beats=2249552
+[sched] epoch 124: zero fragment drops (snap=0, sticky=0)
+[sched] dump-fb: wrote 307200 words -> sh3_zsrt139f43_ch433_board_fb.mem  sum32=0xde2efc28 xor32=0x5519867c nonzero=174090 bounds=(0,10)..(511,479) FB=640x480
+[sched] video_src=1 -> HDMI sources the LPDDR line-buffer scanout (125-epoch composite)
+[sched] DONE rc=0 (all gates passed)

sim/data/top_psmct32_raster_demo/sh3_zsrt139f43_epochs.txt

@@ -0,0 +1,131 @@
+# Ch433 epoch descriptor table (125 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 125 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4332.mem 476 52 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4333.mem 935 103 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4334.mem 584 64 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4335.mem 314 34 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4336.mem 26 2 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4337.mem 2042 226 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4338.mem 1016 112 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4339.mem 1808 200 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4340.mem 494 54 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f4341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4341.mem 188 20 0 sh3_zsrt139f4341_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4342.mem 1466 162 0 sh3_zsrt139f4342_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4343.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4344.mem 287 31 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4345.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4346.mem 413 45 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4347.mem 1754 194 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4348.mem 1556 172 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+49 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4349.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+50 117599 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4350.mem 98 10 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+51 118238 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4351.mem 1790 198 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+52 118877 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4352.mem 1178 130 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+53 119471 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4353.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+54 120110 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4354.mem 1889 209 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4355.mem 1502 166 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+56 120749 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4356.mem 575 63 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+57 121388 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4357.mem 1016 112 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+58 122027 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4358.mem 872 96 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+59 122600 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4359.mem 782 86 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+60 123239 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4360.mem 170 18 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+61 123869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4361.mem 251 27 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+62 124508 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4362.mem 323 35 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+63 125147 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4363.mem 89 9 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+64 125786 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4364.mem 557 61 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+65 126434 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4365.mem 368 40 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+66 126968 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4366.mem 647 71 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+67 127607 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4367.mem 530 58 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+68 128246 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4368.mem 440 48 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+69 128885 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4369.mem 62 6 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+70 129389 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4370.mem 1493 165 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+71 130028 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4371.mem 1223 135 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+72 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4372.mem 1628 180 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+73 130667 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4373.mem 224 24 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+74 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4374.mem 485 53 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+75 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4375.mem 566 62 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+76 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4376.mem 521 57 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+77 131306 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4377.mem 755 83 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+78 131945 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4378.mem 1439 159 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+79 132584 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4379.mem 953 105 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+80 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4380.mem 620 68 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+81 133262 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4381.mem 53 5 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+82 135869 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4382.mem 26 2 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+83 144890 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4383.mem 179 19 0 sh3_zsrt139f4383_pal.mem 0x3e849a98
+84 145712 12288 480 sh3_zsrt139f4383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f4384.mem 116 12 1 sh3_zsrt139f4383_pal.mem 0x3e849a98
+85 146205 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4385.mem 1007 111 0 sh3_zsrt139f4385_pal.mem 0xfd978fd9
+86 146630 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4386.mem 287 31 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9
+87 147068 11264 480 sh3_zsrt139f4385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4387.mem 332 36 1 sh3_zsrt139f4385_pal.mem 0xfd978fd9
+88 147480 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4388.mem 683 75 0 sh3_zsrt139f4388_pal.mem 0xd5ed05ff
+89 147888 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4389.mem 665 73 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff
+90 148264 11264 480 sh3_zsrt139f4388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4390.mem 1025 113 1 sh3_zsrt139f4388_pal.mem 0xd5ed05ff
+91 148919 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4391.mem 935 103 0 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8
+92 149509 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4392.mem 827 91 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8
+93 150125 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4393.mem 701 77 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8
+94 150741 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4394.mem 710 78 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8
+95 151344 11264 480 sh3_zsrt139f4391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4395.mem 404 44 1 sh3_zsrt139f4391_pal.mem 0xcdf8a4d8
+96 152021 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4396.mem 206 22 0 sh3_zsrt139f4396_pal.mem 0xc6784386
+97 152420 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4397.mem 242 26 1 sh3_zsrt139f4396_pal.mem 0xc6784386
+98 152806 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4398.mem 296 32 1 sh3_zsrt139f4396_pal.mem 0xc6784386
+99 153218 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f4399.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386
+100 153643 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43100.mem 44 4 1 sh3_zsrt139f4396_pal.mem 0xc6784386
+101 154029 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43101.mem 278 30 1 sh3_zsrt139f4396_pal.mem 0xc6784386
+102 154428 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43102.mem 197 21 1 sh3_zsrt139f4396_pal.mem 0xc6784386
+103 154853 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43103.mem 188 20 1 sh3_zsrt139f4396_pal.mem 0xc6784386
+104 155265 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43104.mem 152 16 1 sh3_zsrt139f4396_pal.mem 0xc6784386
+105 155664 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43105.mem 107 11 1 sh3_zsrt139f4396_pal.mem 0xc6784386
+106 156063 11264 480 sh3_zsrt139f4396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f43106.mem 80 8 1 sh3_zsrt139f4396_pal.mem 0xc6784386
+107 156566 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43107.mem 1241 137 0 sh3_zsrt139f43107_pal.mem 0x00fd9028
+108 157273 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43108.mem 1025 113 1 sh3_zsrt139f43107_pal.mem 0x00fd9028
+109 157967 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43109.mem 737 81 1 sh3_zsrt139f43107_pal.mem 0x00fd9028
+110 158674 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43110.mem 845 93 1 sh3_zsrt139f43107_pal.mem 0x00fd9028
+111 159420 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43111.mem 530 58 1 sh3_zsrt139f43107_pal.mem 0x00fd9028
+112 160114 10240 480 sh3_zsrt139f43107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43112.mem 98 10 1 sh3_zsrt139f43107_pal.mem 0x00fd9028
+113 160331 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43113.mem 287 31 0 sh3_zsrt139f43113_pal.mem 0xd8d19684
+114 160769 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43114.mem 260 28 1 sh3_zsrt139f43113_pal.mem 0xd8d19684
+115 161168 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43115.mem 368 40 1 sh3_zsrt139f43113_pal.mem 0xd8d19684
+116 161567 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43116.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684
+117 162300 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43117.mem 341 37 1 sh3_zsrt139f43113_pal.mem 0xd8d19684
+118 162725 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43118.mem 305 33 1 sh3_zsrt139f43113_pal.mem 0xd8d19684
+119 163163 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43119.mem 206 22 1 sh3_zsrt139f43113_pal.mem 0xd8d19684
+120 163575 10240 480 sh3_zsrt139f43113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43120.mem 242 26 1 sh3_zsrt139f43113_pal.mem 0xd8d19684
+121 164204 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43121.mem 602 66 0 sh3_zsrt139f43121_pal.mem 0xaa4e7e05
+122 164950 10240 480 sh3_zsrt139f43121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f43122.mem 359 39 1 sh3_zsrt139f43121_pal.mem 0xaa4e7e05
+123 175995 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43123.mem 341 37 0 sh3_zsrt139f43123_pal.mem 0x56ebf1d1
+124 176446 12288 480 sh3_zsrt139f43123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f43124.mem 170 18 1 sh3_zsrt139f43123_pal.mem 0x56ebf1d1

sim/data/top_psmct32_raster_demo/sh3_zsrt139f44_epochs.txt

@@ -0,0 +1,295 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139f11d', 'zsrt139f27']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 292 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4332.mem 476 52 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4333.mem 935 103 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4334.mem 584 64 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4335.mem 314 34 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4336.mem 26 2 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4337.mem 2042 226 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4338.mem 1016 112 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4339.mem 1808 200 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4340.mem 494 54 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f4341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4341.mem 188 20 0 sh3_zsrt139f4341_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4342.mem 1466 162 0 sh3_zsrt139f4342_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4343.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4344.mem 287 31 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f4342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f4345.mem 2042 226 1 sh3_zsrt139f4342_pal.mem 0x47097d4c
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+265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76
+268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76
+269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76
+275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76
+288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f45_epochs.txt

@@ -0,0 +1,637 @@
+# Ch434 epoch descriptor table (631 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 631 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 177272 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f450.mem 206 22 0 sh3_zsrt139f450_pal.mem 0x00000000
+1 177291 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f451.mem 962 106 1 sh3_zsrt139f450_pal.mem 0x00000000
+2 177331 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f452.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000
+3 177350 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f453.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+4 177364 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f454.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000
+5 177397 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f455.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000
+6 177638 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f456.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000
+7 177671 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f457.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000
+8 177690 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f458.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000
+9 177704 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f459.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000
+10 177723 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4510.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000
+11 177737 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4511.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000
+12 177756 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4512.mem 503 55 1 sh3_zsrt139f450_pal.mem 0x00000000
+13 177763 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4513.mem 1466 162 1 sh3_zsrt139f450_pal.mem 0x00000000
+14 177803 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4514.mem 629 69 1 sh3_zsrt139f450_pal.mem 0x00000000
+15 177810 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4515.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000
+16 177822 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4516.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000
+17 177836 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4517.mem 350 38 1 sh3_zsrt139f450_pal.mem 0x00000000
+18 177855 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4518.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000
+19 177862 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4519.mem 530 58 1 sh3_zsrt139f450_pal.mem 0x00000000
+20 177895 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4520.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000
+21 177909 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4521.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000
+22 177928 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4522.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000
+23 178041 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4523.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+24 178067 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4524.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000
+25 178099 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4525.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000
+26 178138 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4526.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000
+27 178152 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4527.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000
+28 178191 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4528.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000
+29 178205 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4529.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000
+30 178224 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4530.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000
+31 178250 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4531.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000
+32 178257 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4532.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000
+33 178290 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4533.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+34 178304 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4534.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000
+35 178323 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4535.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+36 178337 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4536.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000
+37 178356 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4537.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+38 178370 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4538.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+39 178389 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4539.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+40 178403 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4540.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000
+41 178415 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4541.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000
+42 178422 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4542.mem 215 23 1 sh3_zsrt139f450_pal.mem 0x00000000
+43 178448 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4543.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000
+44 178455 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4544.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000
+45 178481 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4545.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000
+46 178488 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4546.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000
+47 178502 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4547.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000
+48 178514 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4548.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+49 178528 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4549.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000
+50 178547 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4550.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000
+51 178554 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4551.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000
+52 178568 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4552.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+53 178580 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4553.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000
+54 178587 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4554.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000
+55 178601 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4555.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000
+56 178957 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4556.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000
+57 178964 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4557.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000
+58 178978 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4558.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000
+59 178997 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4559.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000
+60 179011 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4560.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000
+61 179030 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4561.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000
+62 179044 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4562.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000
+63 179063 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4563.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000
+64 179077 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4564.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000
+65 179096 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4565.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+66 179110 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4566.mem 53 5 1 sh3_zsrt139f450_pal.mem 0x00000000
+67 179129 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4567.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+68 179143 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4568.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+69 179162 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4569.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+70 179228 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4570.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+71 179242 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4571.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+72 179261 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4572.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+73 179275 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4573.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+74 179308 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4574.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+75 179327 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4575.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+76 179341 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4576.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000
+77 179360 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4577.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
+78 179374 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4578.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000
+79 179393 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4579.mem 35 3 1 sh3_zsrt139f450_pal.mem 0x00000000
+80 179407 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4580.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000
+81 179426 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4581.mem 17 1 1 sh3_zsrt139f450_pal.mem 0x00000000
+82 179440 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f4582.mem 26 2 1 sh3_zsrt139f450_pal.mem 0x00000000
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+555 194911 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45555.mem 206 22 1 sh3_zsrt139f450_pal.mem 0x00000000
+556 194918 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45556.mem 251 27 1 sh3_zsrt139f450_pal.mem 0x00000000
+557 194925 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45557.mem 323 35 1 sh3_zsrt139f450_pal.mem 0x00000000
+558 194939 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45558.mem 665 73 1 sh3_zsrt139f450_pal.mem 0x00000000
+559 194965 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45559.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000
+560 194984 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45560.mem 476 52 1 sh3_zsrt139f450_pal.mem 0x00000000
+561 194998 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45561.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000
+562 195005 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45562.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000
+563 195012 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45563.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000
+564 195031 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45564.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000
+565 195038 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45565.mem 377 41 1 sh3_zsrt139f450_pal.mem 0x00000000
+566 195069 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45566.mem 566 62 1 sh3_zsrt139f450_pal.mem 0x00000000
+567 195090 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45567.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000
+568 195104 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45568.mem 188 20 1 sh3_zsrt139f450_pal.mem 0x00000000
+569 195111 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45569.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000
+570 195118 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45570.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+571 195125 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45571.mem 278 30 1 sh3_zsrt139f450_pal.mem 0x00000000
+572 195139 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45572.mem 359 39 1 sh3_zsrt139f450_pal.mem 0x00000000
+573 195163 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45573.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000
+574 195170 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45574.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+575 195177 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45575.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000
+576 195194 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45576.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000
+577 195201 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45577.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000
+578 195215 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45578.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000
+579 195222 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45579.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000
+580 195229 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45580.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000
+581 195236 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45581.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000
+582 195243 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45582.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000
+583 195250 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45583.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000
+584 195257 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45584.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000
+585 195264 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45585.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000
+586 195271 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45586.mem 386 42 1 sh3_zsrt139f450_pal.mem 0x00000000
+587 195292 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45587.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+588 195306 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45588.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000
+589 195313 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45589.mem 71 7 1 sh3_zsrt139f450_pal.mem 0x00000000
+590 195320 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45590.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000
+591 195327 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45591.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000
+592 195334 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45592.mem 368 40 1 sh3_zsrt139f450_pal.mem 0x00000000
+593 195374 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45593.mem 89 9 1 sh3_zsrt139f450_pal.mem 0x00000000
+594 195381 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45594.mem 44 4 1 sh3_zsrt139f450_pal.mem 0x00000000
+595 195388 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45595.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000
+596 195402 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45596.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000
+597 195409 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45597.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000
+598 195416 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45598.mem 323 35 1 sh3_zsrt139f450_pal.mem 0x00000000
+599 195440 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45599.mem 296 32 1 sh3_zsrt139f450_pal.mem 0x00000000
+600 195461 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45600.mem 332 36 1 sh3_zsrt139f450_pal.mem 0x00000000
+601 195489 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45601.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000
+602 195496 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45602.mem 341 37 1 sh3_zsrt139f450_pal.mem 0x00000000
+603 195517 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45603.mem 197 21 1 sh3_zsrt139f450_pal.mem 0x00000000
+604 195531 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45604.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000
+605 195538 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45605.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000
+606 195545 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45606.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000
+607 195552 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45607.mem 98 10 1 sh3_zsrt139f450_pal.mem 0x00000000
+608 195559 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45608.mem 152 16 1 sh3_zsrt139f450_pal.mem 0x00000000
+609 195566 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45609.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000
+610 195594 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45610.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000
+611 195608 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45611.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000
+612 195622 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45612.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000
+613 195634 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45613.mem 233 25 1 sh3_zsrt139f450_pal.mem 0x00000000
+614 195655 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45614.mem 116 12 1 sh3_zsrt139f450_pal.mem 0x00000000
+615 195662 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45615.mem 80 8 1 sh3_zsrt139f450_pal.mem 0x00000000
+616 195669 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45616.mem 305 33 1 sh3_zsrt139f450_pal.mem 0x00000000
+617 195693 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45617.mem 341 37 1 sh3_zsrt139f450_pal.mem 0x00000000
+618 195714 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45618.mem 287 31 1 sh3_zsrt139f450_pal.mem 0x00000000
+619 195728 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45619.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000
+620 195735 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45620.mem 62 6 1 sh3_zsrt139f450_pal.mem 0x00000000
+621 195742 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45621.mem 125 13 1 sh3_zsrt139f450_pal.mem 0x00000000
+622 195756 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45622.mem 143 15 1 sh3_zsrt139f450_pal.mem 0x00000000
+623 195763 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45623.mem 269 29 1 sh3_zsrt139f450_pal.mem 0x00000000
+624 195777 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45624.mem 161 17 1 sh3_zsrt139f450_pal.mem 0x00000000
+625 195789 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45625.mem 260 28 1 sh3_zsrt139f450_pal.mem 0x00000000
+626 195803 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45626.mem 440 48 1 sh3_zsrt139f450_pal.mem 0x00000000
+627 195824 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45627.mem 224 24 1 sh3_zsrt139f450_pal.mem 0x00000000
+628 195838 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45628.mem 170 18 1 sh3_zsrt139f450_pal.mem 0x00000000
+629 195867 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45629.mem 107 11 1 sh3_zsrt139f450_pal.mem 0x00000000
+630 195874 14336 480 sh3_zsrt139f450_tex_lpddr.mem 0x200000 262144 0x00000000 feeder_sh3_zsrt139f45630.mem 134 14 1 sh3_zsrt139f450_pal.mem 0x00000000

sim/data/top_psmct32_raster_demo/sh3_zsrt139f46_epochs.txt

@@ -0,0 +1,926 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139f45', 'zsrt139f11d', 'zsrt139f27']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 923 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
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+840 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2746.mem 431 47 1 sh3_zsrt139f270_pal.mem 0x158afe76
+841 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2747.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76
+842 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2748.mem 710 78 1 sh3_zsrt139f270_pal.mem 0x158afe76
+843 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2749.mem 575 63 1 sh3_zsrt139f270_pal.mem 0x158afe76
+844 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2750.mem 602 66 1 sh3_zsrt139f270_pal.mem 0x158afe76
+845 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2751.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76
+846 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2752.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+847 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76
+848 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76
+849 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+850 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76
+851 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+852 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+853 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76
+854 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76
+855 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76
+856 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+857 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76
+858 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76
+859 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76
+860 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76
+861 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76
+862 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76
+863 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76
+864 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76
+865 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76
+866 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76
+867 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+868 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+869 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76
+870 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76
+871 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+872 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+873 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76
+874 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+875 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+876 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76
+877 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+878 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+879 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+880 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+881 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+882 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+883 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+884 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+885 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+886 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76
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+888 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76
+889 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76
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+895 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+896 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
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+899 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76
+900 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+901 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
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+903 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+904 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+905 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76
+906 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
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+911 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
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+913 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+914 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+915 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+916 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+917 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+918 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76
+919 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+920 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+921 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+922 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f48_epochs.txt

@@ -0,0 +1,314 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139l7', 'zsrt139f27']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 311 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
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+235 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2753.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76
+236 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2754.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76
+237 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2755.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+238 196868 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2756.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76
+239 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2757.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76
+242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76
+243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76
+244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76
+246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76
+247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76
+248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76
+249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76
+250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76
+251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76
+252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76
+253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76
+254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76
+255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76
+258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76
+259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76
+262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76
+265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76
+275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76
+276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76
+277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76
+278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76
+280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76
+281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76
+287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76
+288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+292 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+293 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76
+294 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+295 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+296 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+297 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+298 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+299 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+300 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+301 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+302 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+303 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+304 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+305 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+306 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76
+307 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+308 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+309 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+310 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f49_epochs.txt

@@ -0,0 +1,314 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139l7c', 'zsrt139f27']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 311 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
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+240 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2758.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+241 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2759.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76
+242 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2760.mem 413 45 1 sh3_zsrt139f270_pal.mem 0x158afe76
+243 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2761.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76
+244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76
+246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76
+247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76
+248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76
+249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76
+250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76
+251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76
+252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76
+253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76
+254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76
+255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76
+258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76
+259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76
+262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76
+265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76
+275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76
+276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76
+277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76
+278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76
+280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76
+281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76
+287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76
+288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+292 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+293 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76
+294 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+295 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+296 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+297 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+298 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+299 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+300 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+301 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+302 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+303 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+304 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+305 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+306 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76
+307 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+308 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+309 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+310 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f50_epochs.txt

@@ -0,0 +1,314 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f43@0:123', 'zsrt139f41@0:1', 'zsrt139f35@0:9', 'zsrt139f41@1:2', 'zsrt139f35@9:13', 'zsrt139f31', 'zsrt139f43@123:125', 'zsrt139l7d', 'zsrt139f27']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 311 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f430_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f430.mem 44 4 0 sh3_zsrt139f430_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f431.mem 1583 175 0 sh3_zsrt139f431_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f431_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f432.mem 1835 203 1 sh3_zsrt139f431_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f433_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f433.mem 350 38 0 sh3_zsrt139f433_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f434.mem 1322 146 0 sh3_zsrt139f434_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f435.mem 116 12 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f434_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f436.mem 629 69 1 sh3_zsrt139f434_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f437.mem 260 28 0 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f438.mem 593 65 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f437_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f439.mem 332 36 1 sh3_zsrt139f437_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4310.mem 35 3 0 sh3_zsrt139f4310_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4311.mem 350 38 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4312.mem 602 66 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4313.mem 944 104 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4314.mem 593 65 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4315.mem 737 81 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f4310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4316.mem 1187 131 1 sh3_zsrt139f4310_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4317.mem 674 74 0 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4318.mem 323 35 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4319.mem 296 32 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4320.mem 521 57 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4321.mem 701 77 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4322.mem 422 46 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4323.mem 683 75 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4324.mem 1070 118 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4325.mem 539 59 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f4317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f4326.mem 674 74 1 sh3_zsrt139f4317_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4327.mem 476 52 0 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4328.mem 449 49 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4329.mem 809 89 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4330.mem 593 65 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f4327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f4331.mem 701 77 1 sh3_zsrt139f4327_pal.mem 0x5dfce0a2
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+244 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2762.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+245 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2763.mem 422 46 1 sh3_zsrt139f270_pal.mem 0x158afe76
+246 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2764.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76
+247 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2765.mem 377 41 1 sh3_zsrt139f270_pal.mem 0x158afe76
+248 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2766.mem 494 54 1 sh3_zsrt139f270_pal.mem 0x158afe76
+249 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2767.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76
+250 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2768.mem 395 43 1 sh3_zsrt139f270_pal.mem 0x158afe76
+251 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2769.mem 692 76 1 sh3_zsrt139f270_pal.mem 0x158afe76
+252 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2770.mem 665 73 1 sh3_zsrt139f270_pal.mem 0x158afe76
+253 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2771.mem 512 56 1 sh3_zsrt139f270_pal.mem 0x158afe76
+254 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2772.mem 620 68 1 sh3_zsrt139f270_pal.mem 0x158afe76
+255 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2773.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+256 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2774.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+257 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2775.mem 449 49 1 sh3_zsrt139f270_pal.mem 0x158afe76
+258 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2776.mem 503 55 1 sh3_zsrt139f270_pal.mem 0x158afe76
+259 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2777.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+260 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2778.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+261 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2779.mem 584 64 1 sh3_zsrt139f270_pal.mem 0x158afe76
+262 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2780.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+263 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2781.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+264 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2782.mem 539 59 1 sh3_zsrt139f270_pal.mem 0x158afe76
+265 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2783.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+266 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2784.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+267 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2785.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+268 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2786.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+269 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2787.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+270 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2788.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+271 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2789.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+272 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2790.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+273 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2791.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+274 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2792.mem 287 31 1 sh3_zsrt139f270_pal.mem 0x158afe76
+275 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2793.mem 350 38 1 sh3_zsrt139f270_pal.mem 0x158afe76
+276 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2794.mem 233 25 1 sh3_zsrt139f270_pal.mem 0x158afe76
+277 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2795.mem 467 51 1 sh3_zsrt139f270_pal.mem 0x158afe76
+278 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2796.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+279 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2797.mem 323 35 1 sh3_zsrt139f270_pal.mem 0x158afe76
+280 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2798.mem 647 71 1 sh3_zsrt139f270_pal.mem 0x158afe76
+281 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f2799.mem 332 36 1 sh3_zsrt139f270_pal.mem 0x158afe76
+282 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27100.mem 476 52 1 sh3_zsrt139f270_pal.mem 0x158afe76
+283 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27101.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+284 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27102.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+285 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27103.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+286 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27104.mem 611 67 1 sh3_zsrt139f270_pal.mem 0x158afe76
+287 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27105.mem 359 39 1 sh3_zsrt139f270_pal.mem 0x158afe76
+288 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27106.mem 458 50 1 sh3_zsrt139f270_pal.mem 0x158afe76
+289 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27107.mem 386 42 1 sh3_zsrt139f270_pal.mem 0x158afe76
+290 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27108.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+291 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27109.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+292 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27110.mem 404 44 1 sh3_zsrt139f270_pal.mem 0x158afe76
+293 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27111.mem 440 48 1 sh3_zsrt139f270_pal.mem 0x158afe76
+294 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27112.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+295 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27113.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+296 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27114.mem 224 24 1 sh3_zsrt139f270_pal.mem 0x158afe76
+297 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27115.mem 368 40 1 sh3_zsrt139f270_pal.mem 0x158afe76
+298 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27116.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+299 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27117.mem 341 37 1 sh3_zsrt139f270_pal.mem 0x158afe76
+300 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27118.mem 314 34 1 sh3_zsrt139f270_pal.mem 0x158afe76
+301 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27119.mem 278 30 1 sh3_zsrt139f270_pal.mem 0x158afe76
+302 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27120.mem 269 29 1 sh3_zsrt139f270_pal.mem 0x158afe76
+303 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27121.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+304 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27122.mem 242 26 1 sh3_zsrt139f270_pal.mem 0x158afe76
+305 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27123.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+306 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27124.mem 161 17 1 sh3_zsrt139f270_pal.mem 0x158afe76
+307 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27125.mem 296 32 1 sh3_zsrt139f270_pal.mem 0x158afe76
+308 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27126.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+309 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27127.mem 251 27 1 sh3_zsrt139f270_pal.mem 0x158afe76
+310 197327 10240 480 sh3_zsrt139f270_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27128.mem 134 14 1 sh3_zsrt139f270_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f51_epochs.txt

@@ -0,0 +1,314 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f51b@0:123', 'zsrt139f41d@0:1', 'zsrt139f35c@0:9', 'zsrt139f41d@1:2', 'zsrt139f35c@9:13', 'zsrt139f31', 'zsrt139f51b@123:125', 'zsrt139l7c', 'zsrt139f27c']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 311 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f51b0_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f51b0.mem 44 4 0 sh3_zsrt139f51b0_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b1.mem 1583 175 0 sh3_zsrt139f51b1_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b2.mem 1835 203 1 sh3_zsrt139f51b1_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f51b3_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f51b3.mem 350 38 0 sh3_zsrt139f51b3_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b4.mem 1322 146 0 sh3_zsrt139f51b4_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b5.mem 116 12 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b6.mem 629 69 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b7.mem 260 28 0 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b8.mem 593 65 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b9.mem 332 36 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b10.mem 35 3 0 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b11.mem 350 38 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b12.mem 602 66 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b13.mem 944 104 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b14.mem 593 65 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b15.mem 737 81 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b16.mem 1187 131 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b17.mem 674 74 0 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b18.mem 323 35 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b19.mem 296 32 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b20.mem 521 57 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b21.mem 701 77 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b22.mem 422 46 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b23.mem 683 75 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b24.mem 1070 118 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b25.mem 539 59 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b26.mem 674 74 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b27.mem 476 52 0 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b28.mem 449 49 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b29.mem 809 89 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b30.mem 593 65 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b31.mem 701 77 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b32.mem 476 52 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b33.mem 935 103 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
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sim/data/top_psmct32_raster_demo/sh3_zsrt139f51b_epochs.txt

@@ -0,0 +1,131 @@
+# Ch435 epoch descriptor table (125 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 125 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
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+123 175995 12288 480 sh3_zsrt139f51b123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f51b123.mem 341 37 0 sh3_zsrt139f51b123_pal.mem 0x56ebf1d1
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sim/data/top_psmct32_raster_demo/sh3_zsrt139f52_epochs.txt

@@ -0,0 +1,314 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f51b@0:123', 'zsrt139f41d@0:1', 'zsrt139f35c@0:9', 'zsrt139f41d@1:2', 'zsrt139f35c@9:13', 'zsrt139f31', 'zsrt139f51b@123:125', 'zsrt139l7e', 'zsrt139f27c']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 311 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f51b0_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f51b0.mem 44 4 0 sh3_zsrt139f51b0_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b1.mem 1583 175 0 sh3_zsrt139f51b1_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b2.mem 1835 203 1 sh3_zsrt139f51b1_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f51b3_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f51b3.mem 350 38 0 sh3_zsrt139f51b3_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b4.mem 1322 146 0 sh3_zsrt139f51b4_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b5.mem 116 12 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b6.mem 629 69 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b7.mem 260 28 0 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b8.mem 593 65 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b9.mem 332 36 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b10.mem 35 3 0 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b11.mem 350 38 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b12.mem 602 66 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b13.mem 944 104 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b14.mem 593 65 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b15.mem 737 81 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b16.mem 1187 131 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b17.mem 674 74 0 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b18.mem 323 35 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b19.mem 296 32 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b20.mem 521 57 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b21.mem 701 77 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b22.mem 422 46 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b23.mem 683 75 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b24.mem 1070 118 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b25.mem 539 59 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b26.mem 674 74 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b27.mem 476 52 0 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b28.mem 449 49 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b29.mem 809 89 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b30.mem 593 65 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b31.mem 701 77 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b32.mem 476 52 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b33.mem 935 103 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b34.mem 584 64 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b35.mem 314 34 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b36.mem 26 2 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b37.mem 2042 226 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b38.mem 1016 112 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b39.mem 1808 200 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b40.mem 494 54 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f51b41_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b41.mem 188 20 0 sh3_zsrt139f51b41_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b42.mem 1466 162 0 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b43.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b44.mem 287 31 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b45.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b46.mem 413 45 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b47.mem 1754 194 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b48.mem 1556 172 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+49 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b49.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+50 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b50.mem 98 10 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+51 118238 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b51.mem 1790 198 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+52 118877 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b52.mem 1178 130 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+53 119471 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b53.mem 485 53 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+54 120110 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b54.mem 1889 209 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b55.mem 1502 166 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+56 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b56.mem 575 63 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+57 121388 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b57.mem 1016 112 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+58 122027 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b58.mem 872 96 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+59 122600 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b59.mem 782 86 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+60 123239 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b60.mem 170 18 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+61 123869 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b61.mem 251 27 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+62 124508 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b62.mem 323 35 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+63 125147 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b63.mem 89 9 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+64 125786 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b64.mem 557 61 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+65 126434 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b65.mem 368 40 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+66 126968 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b66.mem 647 71 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+67 127607 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b67.mem 530 58 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+68 128246 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b68.mem 440 48 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+69 128885 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b69.mem 62 6 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+70 129389 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b70.mem 1493 165 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+71 130028 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b71.mem 1223 135 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+72 130667 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b72.mem 1628 180 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+73 130667 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b73.mem 224 24 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+74 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b74.mem 485 53 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+75 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b75.mem 566 62 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+76 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b76.mem 521 57 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+77 131306 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b77.mem 755 83 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+78 131945 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b78.mem 1439 159 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+79 132584 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b79.mem 953 105 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+80 133262 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b80.mem 620 68 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+81 133262 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b81.mem 53 5 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+82 135869 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b82.mem 26 2 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+83 144890 12288 480 sh3_zsrt139f51b83_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f51b83.mem 179 19 0 sh3_zsrt139f51b83_pal.mem 0x3e849a98
+84 145712 12288 480 sh3_zsrt139f51b83_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f51b84.mem 116 12 1 sh3_zsrt139f51b83_pal.mem 0x3e849a98
+85 146205 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b85.mem 1007 111 0 sh3_zsrt139f51b85_pal.mem 0xfd978fd9
+86 146630 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b86.mem 287 31 1 sh3_zsrt139f51b85_pal.mem 0xfd978fd9
+87 147068 11264 480 sh3_zsrt139f51b85_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b87.mem 332 36 1 sh3_zsrt139f51b85_pal.mem 0xfd978fd9
+88 147480 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b88.mem 683 75 0 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff
+89 147888 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b89.mem 665 73 1 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff
+90 148264 11264 480 sh3_zsrt139f51b88_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b90.mem 1025 113 1 sh3_zsrt139f51b88_pal.mem 0xd5ed05ff
+91 148919 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b91.mem 935 103 0 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8
+92 149509 11264 480 sh3_zsrt139f51b91_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f51b92.mem 827 91 1 sh3_zsrt139f51b91_pal.mem 0xcdf8a4d8
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+299 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c117.mem 341 37 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+300 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c118.mem 314 34 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+301 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c119.mem 278 30 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+302 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c120.mem 269 29 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+303 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c121.mem 296 32 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+304 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c122.mem 242 26 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+305 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c123.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+306 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c124.mem 161 17 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+307 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c125.mem 296 32 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+308 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c126.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+309 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c127.mem 251 27 1 sh3_zsrt139f27c0_pal.mem 0x158afe76
+310 197327 10240 480 sh3_zsrt139f27c0_tex_lpddr.mem 0x200000 262144 0x13cfe390 feeder_sh3_zsrt139f27c128.mem 134 14 1 sh3_zsrt139f27c0_pal.mem 0x158afe76

sim/data/top_psmct32_raster_demo/sh3_zsrt139f53_epochs.txt

@@ -0,0 +1,131 @@
+# Ch438 epoch descriptor table (125 epochs, dump order). CLUT=runtime HPS staging;
+# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
+# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
+# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
+META n_epochs 125 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+0 603072 12288 480 sh3_zsrt139f530_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f530.mem 44 4 0 sh3_zsrt139f530_pal.mem 0x60778774
+1 608122 11264 480 sh3_zsrt139f531_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f531.mem 1583 175 0 sh3_zsrt139f531_pal.mem 0x32ed74c4
+2 609451 11264 480 sh3_zsrt139f531_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f532.mem 1835 203 1 sh3_zsrt139f531_pal.mem 0x32ed74c4
+3 614057 10240 480 sh3_zsrt139f533_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f533.mem 350 38 0 sh3_zsrt139f533_pal.mem 0x3cd88c98
+4 616577 12288 480 sh3_zsrt139f534_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f534.mem 1322 146 0 sh3_zsrt139f534_pal.mem 0x4812d6f2
+5 616577 12288 480 sh3_zsrt139f534_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f535.mem 116 12 1 sh3_zsrt139f534_pal.mem 0x4812d6f2
+6 617231 12288 480 sh3_zsrt139f534_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f536.mem 629 69 1 sh3_zsrt139f534_pal.mem 0x4812d6f2
+7 621546 11264 480 sh3_zsrt139f537_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f537.mem 260 28 0 sh3_zsrt139f537_pal.mem 0x5cbf8bb4
+8 622092 11264 480 sh3_zsrt139f537_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f538.mem 593 65 1 sh3_zsrt139f537_pal.mem 0x5cbf8bb4
+9 622686 11264 480 sh3_zsrt139f537_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f539.mem 341 37 1 sh3_zsrt139f537_pal.mem 0x5cbf8bb4
+10 631761 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5310.mem 35 3 0 sh3_zsrt139f5310_pal.mem 0x47405cb0
+11 633215 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5311.mem 350 38 1 sh3_zsrt139f5310_pal.mem 0x47405cb0
+12 634603 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5312.mem 602 66 1 sh3_zsrt139f5310_pal.mem 0x47405cb0
+13 635905 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5313.mem 944 104 1 sh3_zsrt139f5310_pal.mem 0x47405cb0
+14 637207 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5314.mem 593 65 1 sh3_zsrt139f5310_pal.mem 0x47405cb0
+15 638509 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5315.mem 728 80 1 sh3_zsrt139f5310_pal.mem 0x47405cb0
+16 639811 10240 480 sh3_zsrt139f5310_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5316.mem 1196 132 1 sh3_zsrt139f5310_pal.mem 0x47405cb0
+17 672448 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5317.mem 683 75 0 sh3_zsrt139f5317_pal.mem 0x43ece1ae
+18 673087 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5318.mem 323 35 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae
+19 673726 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5319.mem 296 32 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae
+20 674365 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5320.mem 530 58 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae
+21 675004 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5321.mem 701 77 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae
+22 675643 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5322.mem 422 46 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae
+23 676282 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5323.mem 683 75 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae
+24 676921 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5324.mem 1070 118 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae
+25 677560 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5325.mem 539 59 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae
+26 678199 10240 480 sh3_zsrt139f5317_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f5326.mem 674 74 1 sh3_zsrt139f5317_pal.mem 0x43ece1ae
+27 679619 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5327.mem 476 52 0 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+28 684020 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5328.mem 449 49 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+29 684623 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5329.mem 809 89 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+30 685244 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5330.mem 593 65 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+31 685865 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5331.mem 701 77 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+32 686486 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5332.mem 476 52 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+33 687107 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5333.mem 935 103 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+34 687728 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5334.mem 584 64 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+35 688349 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5335.mem 314 34 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+36 690218 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5336.mem 26 2 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+37 690848 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5337.mem 2042 226 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+38 690848 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5338.mem 1016 112 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+39 691487 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5339.mem 1808 200 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+40 691487 9216 480 sh3_zsrt139f5327_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5340.mem 494 54 1 sh3_zsrt139f5327_pal.mem 0x5dfce0a2
+41 692978 9216 480 sh3_zsrt139f5341_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f5341.mem 188 20 0 sh3_zsrt139f5341_pal.mem 0x181b2ac2
+42 715731 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5342.mem 1466 162 0 sh3_zsrt139f5342_pal.mem 0x47097d4c
+43 716316 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5343.mem 2042 226 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+44 716316 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5344.mem 287 31 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+45 716955 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5345.mem 2042 226 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+46 716955 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5346.mem 395 43 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+47 717651 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5347.mem 1754 194 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+48 718350 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5348.mem 1556 172 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+49 718899 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5349.mem 2042 226 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+50 718899 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5350.mem 98 10 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+51 719538 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5351.mem 1808 200 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+52 720177 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5352.mem 1178 130 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+53 720771 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5353.mem 485 53 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+54 721410 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5354.mem 1889 209 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+55 722049 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5355.mem 1502 166 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+56 722049 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5356.mem 575 63 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+57 722688 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5357.mem 1016 112 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+58 723327 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5358.mem 872 96 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+59 723900 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5359.mem 782 86 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+60 724539 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5360.mem 161 17 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+61 725169 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5361.mem 251 27 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+62 725808 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5362.mem 323 35 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+63 726447 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5363.mem 89 9 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+64 727086 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5364.mem 557 61 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+65 727734 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5365.mem 368 40 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+66 728268 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5366.mem 647 71 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+67 728907 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5367.mem 530 58 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+68 729546 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5368.mem 431 47 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+69 730185 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5369.mem 62 6 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+70 730689 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5370.mem 1493 165 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+71 731328 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5371.mem 1214 134 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+72 731967 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5372.mem 1628 180 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+73 731967 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5373.mem 224 24 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+74 732606 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5374.mem 485 53 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+75 732606 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5375.mem 566 62 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+76 732606 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5376.mem 512 56 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+77 732606 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5377.mem 764 84 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+78 733245 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5378.mem 1439 159 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+79 733884 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5379.mem 953 105 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+80 734562 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5380.mem 620 68 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+81 734562 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5381.mem 53 5 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+82 737169 8192 480 sh3_zsrt139f5342_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f5382.mem 26 2 1 sh3_zsrt139f5342_pal.mem 0x47097d4c
+83 746190 12288 480 sh3_zsrt139f5383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f5383.mem 179 19 0 sh3_zsrt139f5383_pal.mem 0x3e849a98
+84 747012 12288 480 sh3_zsrt139f5383_tex_lpddr.mem 0x200000 262144 0x87415c50 feeder_sh3_zsrt139f5384.mem 116 12 1 sh3_zsrt139f5383_pal.mem 0x3e849a98
+85 747505 11264 480 sh3_zsrt139f5385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5385.mem 998 110 0 sh3_zsrt139f5385_pal.mem 0xfd978fd9
+86 747930 11264 480 sh3_zsrt139f5385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5386.mem 287 31 1 sh3_zsrt139f5385_pal.mem 0xfd978fd9
+87 748368 11264 480 sh3_zsrt139f5385_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5387.mem 332 36 1 sh3_zsrt139f5385_pal.mem 0xfd978fd9
+88 748780 11264 480 sh3_zsrt139f5388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5388.mem 674 74 0 sh3_zsrt139f5388_pal.mem 0xd5ed05ff
+89 749188 11264 480 sh3_zsrt139f5388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5389.mem 665 73 1 sh3_zsrt139f5388_pal.mem 0xd5ed05ff
+90 749564 11264 480 sh3_zsrt139f5388_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5390.mem 980 108 1 sh3_zsrt139f5388_pal.mem 0xd5ed05ff
+91 750219 11264 480 sh3_zsrt139f5391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5391.mem 1016 112 0 sh3_zsrt139f5391_pal.mem 0xcdf8a4d8
+92 750809 11264 480 sh3_zsrt139f5391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5392.mem 809 89 1 sh3_zsrt139f5391_pal.mem 0xcdf8a4d8
+93 751425 11264 480 sh3_zsrt139f5391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5393.mem 737 81 1 sh3_zsrt139f5391_pal.mem 0xcdf8a4d8
+94 752041 11264 480 sh3_zsrt139f5391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5394.mem 674 74 1 sh3_zsrt139f5391_pal.mem 0xcdf8a4d8
+95 752644 11264 480 sh3_zsrt139f5391_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5395.mem 458 50 1 sh3_zsrt139f5391_pal.mem 0xcdf8a4d8
+96 753321 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5396.mem 188 20 0 sh3_zsrt139f5396_pal.mem 0xc6784386
+97 753720 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5397.mem 251 27 1 sh3_zsrt139f5396_pal.mem 0xc6784386
+98 754106 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5398.mem 359 39 1 sh3_zsrt139f5396_pal.mem 0xc6784386
+99 754518 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f5399.mem 143 15 1 sh3_zsrt139f5396_pal.mem 0xc6784386
+100 754943 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53100.mem 35 3 1 sh3_zsrt139f5396_pal.mem 0xc6784386
+101 755329 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53101.mem 278 30 1 sh3_zsrt139f5396_pal.mem 0xc6784386
+102 755728 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53102.mem 188 20 1 sh3_zsrt139f5396_pal.mem 0xc6784386
+103 756153 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53103.mem 134 14 1 sh3_zsrt139f5396_pal.mem 0xc6784386
+104 756565 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53104.mem 161 17 1 sh3_zsrt139f5396_pal.mem 0xc6784386
+105 756964 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53105.mem 98 10 1 sh3_zsrt139f5396_pal.mem 0xc6784386
+106 757363 11264 480 sh3_zsrt139f5396_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139f53106.mem 62 6 1 sh3_zsrt139f5396_pal.mem 0xc6784386
+107 757866 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53107.mem 1232 136 0 sh3_zsrt139f53107_pal.mem 0x00fd9028
+108 758573 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53108.mem 1034 114 1 sh3_zsrt139f53107_pal.mem 0x00fd9028
+109 759267 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53109.mem 755 83 1 sh3_zsrt139f53107_pal.mem 0x00fd9028
+110 759974 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53110.mem 863 95 1 sh3_zsrt139f53107_pal.mem 0x00fd9028
+111 760720 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53111.mem 503 55 1 sh3_zsrt139f53107_pal.mem 0x00fd9028
+112 761414 10240 480 sh3_zsrt139f53107_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53112.mem 116 12 1 sh3_zsrt139f53107_pal.mem 0x00fd9028
+113 761631 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53113.mem 269 29 0 sh3_zsrt139f53113_pal.mem 0xd8d19684
+114 762069 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53114.mem 269 29 1 sh3_zsrt139f53113_pal.mem 0xd8d19684
+115 762468 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53115.mem 314 34 1 sh3_zsrt139f53113_pal.mem 0xd8d19684
+116 762867 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53116.mem 287 31 1 sh3_zsrt139f53113_pal.mem 0xd8d19684
+117 763600 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53117.mem 332 36 1 sh3_zsrt139f53113_pal.mem 0xd8d19684
+118 764025 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53118.mem 287 31 1 sh3_zsrt139f53113_pal.mem 0xd8d19684
+119 764463 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53119.mem 215 23 1 sh3_zsrt139f53113_pal.mem 0xd8d19684
+120 764875 10240 480 sh3_zsrt139f53113_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53120.mem 206 22 1 sh3_zsrt139f53113_pal.mem 0xd8d19684
+121 765504 10240 480 sh3_zsrt139f53121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53121.mem 629 69 0 sh3_zsrt139f53121_pal.mem 0xaa4e7e05
+122 766250 10240 480 sh3_zsrt139f53121_tex_lpddr.mem 0x200000 262144 0xb710940e feeder_sh3_zsrt139f53122.mem 341 37 1 sh3_zsrt139f53121_pal.mem 0xaa4e7e05
+123 777295 12288 480 sh3_zsrt139f53123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f53123.mem 386 42 0 sh3_zsrt139f53123_pal.mem 0x56ebf1d1
+124 777746 12288 480 sh3_zsrt139f53123_tex_lpddr.mem 0x200000 262144 0xf2553358 feeder_sh3_zsrt139f53124.mem 206 22 1 sh3_zsrt139f53123_pal.mem 0x56ebf1d1

sim/data/top_psmct32_raster_demo/sh3_zsrt139f54_epochs.txt

@@ -0,0 +1,332 @@
+# merged runtime-CLUT scheduler fixture: ['zsrt139f52', 'zsrt139e1']
+# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
+META n_epochs 329 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
+0 1772 12288 480 sh3_zsrt139f51b0_tex_lpddr.mem 0x200000 262144 0x42d367ae feeder_sh3_zsrt139f51b0.mem 44 4 0 sh3_zsrt139f51b0_pal.mem 0x60778774
+1 6822 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b1.mem 1583 175 0 sh3_zsrt139f51b1_pal.mem 0x32ed74c4
+2 8151 11264 480 sh3_zsrt139f51b1_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139f51b2.mem 1835 203 1 sh3_zsrt139f51b1_pal.mem 0x32ed74c4
+3 12757 10240 480 sh3_zsrt139f51b3_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139f51b3.mem 350 38 0 sh3_zsrt139f51b3_pal.mem 0x3cd88c98
+4 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b4.mem 1322 146 0 sh3_zsrt139f51b4_pal.mem 0x4812d6f2
+5 15277 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b5.mem 116 12 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2
+6 15931 12288 480 sh3_zsrt139f51b4_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139f51b6.mem 629 69 1 sh3_zsrt139f51b4_pal.mem 0x4812d6f2
+7 20246 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b7.mem 260 28 0 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4
+8 20792 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b8.mem 593 65 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4
+9 21386 11264 480 sh3_zsrt139f51b7_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139f51b9.mem 332 36 1 sh3_zsrt139f51b7_pal.mem 0x5cbf8bb4
+10 30461 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b10.mem 35 3 0 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+11 31915 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b11.mem 350 38 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+12 33303 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b12.mem 602 66 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+13 34605 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b13.mem 944 104 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+14 35907 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b14.mem 593 65 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+15 37209 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b15.mem 737 81 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+16 38511 10240 480 sh3_zsrt139f51b10_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b16.mem 1187 131 1 sh3_zsrt139f51b10_pal.mem 0x47405cb0
+17 71148 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b17.mem 674 74 0 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+18 71787 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b18.mem 323 35 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+19 72426 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b19.mem 296 32 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+20 73065 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b20.mem 521 57 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+21 73704 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b21.mem 701 77 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+22 74343 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b22.mem 422 46 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+23 74982 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b23.mem 683 75 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+24 75621 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b24.mem 1070 118 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+25 76260 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b25.mem 539 59 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+26 76899 10240 480 sh3_zsrt139f51b17_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139f51b26.mem 674 74 1 sh3_zsrt139f51b17_pal.mem 0x43ece1ae
+27 78319 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b27.mem 476 52 0 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+28 82720 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b28.mem 449 49 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+29 83323 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b29.mem 809 89 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+30 83944 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b30.mem 593 65 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+31 84565 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b31.mem 701 77 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+32 85186 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b32.mem 476 52 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+33 85807 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b33.mem 935 103 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+34 86428 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b34.mem 584 64 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+35 87049 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b35.mem 314 34 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+36 88918 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b36.mem 26 2 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+37 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b37.mem 2042 226 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+38 89548 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b38.mem 1016 112 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+39 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b39.mem 1808 200 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+40 90187 9216 480 sh3_zsrt139f51b27_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b40.mem 494 54 1 sh3_zsrt139f51b27_pal.mem 0x5dfce0a2
+41 91678 9216 480 sh3_zsrt139f51b41_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139f51b41.mem 188 20 0 sh3_zsrt139f51b41_pal.mem 0x181b2ac2
+42 114431 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b42.mem 1466 162 0 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+43 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b43.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+44 115016 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b44.mem 287 31 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+45 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b45.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+46 115655 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b46.mem 413 45 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+47 116351 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b47.mem 1754 194 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+48 117050 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b48.mem 1556 172 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+49 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b49.mem 2042 226 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+50 117599 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b50.mem 98 10 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+51 118238 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b51.mem 1790 198 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+52 118877 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b52.mem 1178 130 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+53 119471 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b53.mem 485 53 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+54 120110 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b54.mem 1889 209 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+55 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b55.mem 1502 166 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+56 120749 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b56.mem 575 63 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+57 121388 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b57.mem 1016 112 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
+58 122027 8192 480 sh3_zsrt139f51b42_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139f51b58.mem 872 96 1 sh3_zsrt139f51b42_pal.mem 0x47097d4c
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