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Ch443: combined timing repair for both Ch442 setup families

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Ch442's fit exposed two failing setup families (plus a stale max-skew).
Attack both structurally; no reseeding.

Family 1 - AWREADY -> Z-FSM (-0.410): gen_p2c_ff[23] (EMIF AWREADY)
reached u_zc_emit|u_z's S_SFLUSH_AW/S_FILL_R next-state combinationally.
Ch441 registered only the W channel; add the AW twin:
- new gs_axi_aw_regbuf (one-entry fully-registered AW buffer), inserted
  in zc_emit between u_z's AW output and the arbiter s2 AW port. The FSM
  now sees registered occupancy, never EMIF's combinational AWREADY.

Family 2 - texcache drain_idx_q -> tex_mem (-0.370, x7): a single index
fanned across the whole 65536x32, 128-M20K macro. Split by WIDTH into
four 65536x8 banks, each with its own (* preserve, dont_merge *) write-
address launch register; write the four byte lanes together in F_WRITE;
reconstruct the sample word by concatenating four registered read bytes.
Selector structure and 1-cycle read latency unchanged; total M20Ks
unchanged (4x32 == 128); fill_crc still sums the full 32-bit word.

Max-skew: relax ONLY the Ch357 tile-write CDC set_max_skew 2.0 -> 2.5
(quasi-static bundle, >=2 dclk stability window); retain set_net_delay
2.0 (the real arrival bound). SDC comment updated.

Tests: new tb_gs_axi_aw_regbuf (AW scoreboard: exactly-once/order/no-
combinational-AWREADY-bypass/stable-while-stalled); tb_gs_texture_cache
strengthened to distinct-per-byte-bank data + per-bank + full-word
checks. All pass: aw/w regbuf, texture_cache, texture_psmt8_clut,
scanout_diag, ps2_hps_bridge, and the complete f52 replay BYTE-IDENTICAL
(Z 0/307200, COLOR 0/245760).

No Quartus, board, or push from here. Ready for one owner GUI fit.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
This commit is contained in:
thejayman77
2026-07-22 11:19:09 -04:00
parent 194f45bd05
commit 27dfd0b0cf
8 changed files with 316 additions and 15 deletions
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sim/Makefile
+11 -1
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@@ -586,6 +586,7 @@ RTL_SRCS := \
$(RTL_ROOT)/gif_gs/gs_lpddr_axi_master.sv \
$(RTL_ROOT)/gif_gs/gs_lpddr_z_rmw.sv \
$(RTL_ROOT)/gif_gs/gs_axi_w_regbuf.sv \
$(RTL_ROOT)/gif_gs/gs_axi_aw_regbuf.sv \
$(RTL_ROOT)/gif_gs/gs_lpddr_zc_emit.sv \
$(RTL_ROOT)/gif_gs/gs_lpddr_rd_probe.sv \
$(RTL_ROOT)/gif_gs/gs_lpddr_scanout.sv \
@@ -1153,6 +1154,15 @@ tb_gs_axi_w_regbuf: dirs
@echo "=== run tb_gs_axi_w_regbuf ==="
@cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_axi_w_regbuf.vvp
tb_gs_axi_aw_regbuf: dirs
@echo "=== build tb_gs_axi_aw_regbuf ==="
$(IVERILOG) $(IVERILOG_FLGS) \
-o $(BUILD_DIR)/tb_gs_axi_aw_regbuf.vvp \
-s tb_gs_axi_aw_regbuf \
$(RTL_SRCS) $(TB_ROOT)/gif_gs/tb_gs_axi_aw_regbuf.sv
@echo "=== run tb_gs_axi_aw_regbuf ==="
@cd $(TRACE_DIR) && $(VVP) $(BUILD_DIR)/tb_gs_axi_aw_regbuf.vvp
tb_gs_grad_divider: dirs
@echo "=== build tb_gs_grad_divider ==="
$(IVERILOG) $(IVERILOG_FLGS) \
@@ -6282,7 +6292,7 @@ run: tb_top_psmct32_sh3_zs640c12_cap tb_top_psmct32_sh3_zint640c12
run: tb_top_psmct32_sh3_zs640b24_cap tb_top_psmct32_sh3_zint640b24
.PHONY: tb_top_psmct32_sh3_zs640c24c_cap tb_top_psmct32_sh3_zint640c24c sh3_zs640c24c_fixture sh3_zs640motionabc_bootlet
run: tb_top_psmct32_sh3_zs640c24c_cap tb_top_psmct32_sh3_zint640c24c tb_gs_axi_w_regbuf
run: tb_top_psmct32_sh3_zs640c24c_cap tb_top_psmct32_sh3_zint640c24c tb_gs_axi_w_regbuf tb_gs_axi_aw_regbuf
run: tb_ee_fetch tb_gs tb_intc tb_platform_video tb_bgcolor_via_dma tb_sif_mailbox \
tb_sif_command_echo tb_sif_command_echo_rearm tb_sif_negative_path \