harden sensor acquisition after audit
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@@ -4,10 +4,19 @@ The enclosure was tested with the battery end treated as the bottom of the
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reference orientation. The shared enclosure frame is +X right, +Y toward the
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top, and +Z toward the cover.
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## Audit clarification
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The timing results below validate the ESP32-C3 polling loop, not the independent
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sensor sample clocks. A subsequent review of the capture found a coherent repeated
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ADXL345 sample approximately every 27 polls, consistent with an actual device ODR
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near 96.3 Hz. This does not affect the static six-position axis result. Firmware v2
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adds ADXL345 and L3G4200D freshness/overrun status to every record so dynamic data
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can be interpreted correctly.
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## Capture integrity
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- 50,001 consecutive samples over 500.000 seconds
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- Effective sample rate: exactly 100 Hz
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- Effective MCU polling rate: exactly 100 Hz
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- Timestamp interval: 10,000 us for every sample
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- Sequence gaps: 0
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- Axis-mapping mismatches between mapped and native columns: 0
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