ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
224 lines
8.7 KiB
Systemverilog
224 lines
8.7 KiB
Systemverilog
// retroDE_ps2 — tb_top_psmct32_textured_demo (Brick 1)
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//
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// TOP-LEVEL textured-sprite demo TB. Proves the synthesizable textured
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// SPRITE path renders end-to-end through the REAL hardware top
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// (top_psmct32_raster_demo), exactly as a board load would:
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//
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// EE bootlet (bios_textured.mem) configures DISPFB1/DISPLAY1/PMODE
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// and kicks DMAC ch2 to stream the GIF payload (payload_textured.mem):
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// U1 BITBLT/TRX -> uploads an 8x8 PSMCT32 texture to VRAM (DBP=8)
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// U2 IMAGE -> 16 qwords = the 64 texels
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// U3/U4 PACKED -> PRIM(SPRITE+TME) + TEX0 + UV + XYZ2: a textured
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// 8x8 sprite at screen (0,0)..(7,7)
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// U5 PACKED -> a FLAT green control sprite at (8,0)..(15,7)
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//
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// The top is built with PSMCT32_SWIZZLE=0 so the LINEAR gs_texel_addr
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// fetch and the BITBLT upload share one VRAM layout (v1 scope; the
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// swizzle reconciliation is the gs_stub TODO, out of scope here).
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//
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// Verification is via the PCRTC scanout RGB (the same r/g/b/de a board
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// wires to a video PHY) — so a PASS means the board would SHOW the
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// texture:
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// - Textured region x in [0..7]: scanout pixel == the uploaded texel
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// for (x,y). Texel(x,y) ABGR = {A=FF, B=y, G=x, R=0x40}, and PCRTC
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// PSMCT32 emits r=texel[7:0]=0x40, g=texel[15:8]=x, b=texel[23:16]=y.
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// - Flat region x in [8..15]: scanout pixel == the flat green color
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// (proves the TME=0 path still works alongside texturing).
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// - The textured region must NOT be uniform (it's a real sampled
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// gradient, not a flat fill) — guards against "texturing silently
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// collapsed to flat."
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`timescale 1ns/1ps
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module tb_top_psmct32_textured_demo;
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localparam int H_ACTIVE = 16;
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localparam int V_ACTIVE = 8;
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logic clk;
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logic rst_n;
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initial clk = 1'b0;
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always #5 clk = ~clk;
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logic core_go;
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logic [7:0] r, g, b;
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logic hsync, vsync, de;
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logic core_halt;
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logic dma_done_seen;
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logic frame_seen;
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logic raster_overflow;
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logic frame_toggle;
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logic dma_done_toggle;
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// PSMCT32_SWIZZLE=0 so texture-upload (BITBLT) and texel-fetch
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// (gs_texel_addr, linear) share one VRAM layout.
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top_psmct32_raster_demo #(
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.H_ACTIVE (H_ACTIVE),
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.V_ACTIVE (V_ACTIVE),
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.PSMCT32_SWIZZLE(1'b0)
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) dut (
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.clk(clk), .rst_n(rst_n),
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.core_go(core_go),
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.r(r), .g(g), .b(b),
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.hsync(hsync), .vsync(vsync), .de(de),
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.core_halt(core_halt),
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.dma_done_seen(dma_done_seen),
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.frame_seen(frame_seen),
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.raster_overflow(raster_overflow),
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.frame_toggle(frame_toggle),
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.dma_done_toggle(dma_done_toggle)
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);
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// ----- Expected texel/scanout for the textured region -----
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// Bold 2x2-quadrant texture (mirrors bake.py tex_demo_texel):
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// (x<4,y<4)=RED (x>=4,y<4)=GREEN (x<4,y>=4)=BLUE (x>=4,y>=4)=YELLOW
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// PCRTC PSMCT32 -> r=texel[7:0], g=texel[15:8], b=texel[23:16].
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function automatic logic [7:0] tex_exp_r(input int x, input int y); return ((x<4)==(y<4)) ? 8'hFF : 8'h00; endfunction
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function automatic logic [7:0] tex_exp_g(input int x, input int y); return (x>=4) ? 8'hFF : 8'h00; endfunction
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function automatic logic [7:0] tex_exp_b(input int x, input int y); return ((x<4)&&(y>=4)) ? 8'hFF : 8'h00; endfunction
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// Flat control sprite color: rgbaq_data(0x20, 0xC0, 0x40).
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localparam logic [7:0] FLAT_R = 8'h20;
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localparam logic [7:0] FLAT_G = 8'hC0;
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localparam logic [7:0] FLAT_B = 8'h40;
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// ----- Frame capture -----
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logic [7:0] cap_r [0:V_ACTIVE-1][0:H_ACTIVE-1];
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logic [7:0] cap_g [0:V_ACTIVE-1][0:H_ACTIVE-1];
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logic [7:0] cap_b [0:V_ACTIVE-1][0:H_ACTIVE-1];
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logic cap_de[0:V_ACTIVE-1][0:H_ACTIVE-1];
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bit capture_armed;
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initial begin
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for (int y = 0; y < V_ACTIVE; y++)
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for (int x = 0; x < H_ACTIVE; x++) begin
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cap_r[y][x] = 8'd0;
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cap_g[y][x] = 8'd0;
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cap_b[y][x] = 8'd0;
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cap_de[y][x] = 1'b0;
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end
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capture_armed = 1'b0;
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end
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always_ff @(posedge clk) begin
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if (rst_n && capture_armed && de
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&& (dut.u_pcrtc.vcnt < V_ACTIVE)
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&& (dut.u_pcrtc.hcnt < H_ACTIVE)) begin
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cap_r [dut.u_pcrtc.vcnt][dut.u_pcrtc.hcnt] <= r;
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cap_g [dut.u_pcrtc.vcnt][dut.u_pcrtc.hcnt] <= g;
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cap_b [dut.u_pcrtc.vcnt][dut.u_pcrtc.hcnt] <= b;
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cap_de[dut.u_pcrtc.vcnt][dut.u_pcrtc.hcnt] <= 1'b1;
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end
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end
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int errors;
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int tex_pixels_ok;
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int distinct_tex_values;
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logic [7:0] first_tex_g;
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initial begin
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errors = 0;
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tex_pixels_ok = 0;
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distinct_tex_values = 0;
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end
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initial begin
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rst_n = 1'b0;
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core_go = 1'b0;
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repeat (4) @(posedge clk);
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rst_n = 1'b1;
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repeat (8) @(posedge clk);
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@(negedge clk);
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core_go = 1'b1;
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@(negedge clk);
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core_go = 1'b0;
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wait (core_halt == 1'b1);
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repeat (4) @(posedge clk);
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wait (dma_done_seen == 1'b1);
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repeat (10) @(posedge clk);
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if (dut.xfer_busy == 1'b1)
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wait (dut.xfer_busy == 1'b0);
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if (dut.u_gs.raster_active == 1'b1)
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wait (dut.u_gs.raster_active == 1'b0);
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repeat (10) @(posedge clk);
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@(posedge dut.u_pcrtc.end_of_frame);
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@(posedge clk);
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capture_armed = 1'b1;
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@(posedge dut.u_pcrtc.end_of_frame);
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@(posedge clk);
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capture_armed = 1'b0;
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// --- Textured region (x in [0..7]) must match the uploaded texel. ---
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for (int y = 0; y < 8; y++) begin
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for (int x = 0; x < 8; x++) begin
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logic [7:0] er, eg, eb;
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er = tex_exp_r(x, y);
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eg = tex_exp_g(x, y);
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eb = tex_exp_b(x, y);
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if (!cap_de[y][x]) begin
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$error("textured (%0d,%0d) DE never asserted", x, y);
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errors = errors + 1;
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end else if (cap_r[y][x] !== er || cap_g[y][x] !== eg || cap_b[y][x] !== eb) begin
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$error("[textured] (%0d,%0d) got (%02x,%02x,%02x) expected (%02x,%02x,%02x)",
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x, y, cap_r[y][x], cap_g[y][x], cap_b[y][x], er, eg, eb);
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errors = errors + 1;
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end else begin
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tex_pixels_ok = tex_pixels_ok + 1;
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end
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end
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end
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// --- The textured region must be a real gradient, not flat. ---
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// (Guards against "texturing collapsed to a single texel / flat
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// color".) Count how many distinct G values (= sampled u) appear
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// across row 0.
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first_tex_g = cap_g[0][0];
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for (int x = 1; x < 8; x++)
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if (cap_g[0][x] !== first_tex_g)
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distinct_tex_values = distinct_tex_values + 1;
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if (distinct_tex_values == 0) begin
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$error("textured region is uniform (G all = %02x) — texturing collapsed to flat",
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first_tex_g);
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errors = errors + 1;
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end
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// --- Flat control region (x in [8..15]) must be the flat color. ---
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for (int y = 0; y < 8; y++) begin
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for (int x = 8; x < 16; x++) begin
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if (!cap_de[y][x]) begin
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$error("flat (%0d,%0d) DE never asserted", x, y);
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errors = errors + 1;
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end else if (cap_r[y][x] !== FLAT_R || cap_g[y][x] !== FLAT_G || cap_b[y][x] !== FLAT_B) begin
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$error("[flat] (%0d,%0d) got (%02x,%02x,%02x) expected (%02x,%02x,%02x)",
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x, y, cap_r[y][x], cap_g[y][x], cap_b[y][x], FLAT_R, FLAT_G, FLAT_B);
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errors = errors + 1;
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end
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end
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end
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// --- Status bundle. ---
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if (!core_halt) begin $error("core_halt low at end"); errors = errors + 1; end
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if (!dma_done_seen) begin $error("dma_done_seen never latched"); errors = errors + 1; end
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if (!frame_seen) begin $error("frame_seen never latched"); errors = errors + 1; end
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if (raster_overflow) begin $error("raster_overflow set"); errors = errors + 1; end
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$display("[tb_top_psmct32_textured_demo] tex_ok=%0d/64 gradient_distinct=%0d raster_emits=%0d errors=%0d",
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tex_pixels_ok, distinct_tex_values,
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dut.u_gs.raster_pixel_emit_count, errors);
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if (errors == 0)
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$display("[tb_top_psmct32_textured_demo] PASS");
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else
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$display("[tb_top_psmct32_textured_demo] FAIL");
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$finish;
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end
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initial begin
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#20000000;
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$error("[tb_top_psmct32_textured_demo] TIMEOUT");
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$finish;
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end
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endmodule : tb_top_psmct32_textured_demo
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