thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
94 lines
3.8 KiB
C
94 lines
3.8 KiB
C
// ============================================================================
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// lpddr_dump.c — Ch319 Brick 3 — HPS reads FPGA-private LPDDR4B back THROUGH
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// THE HPS BRIDGE (never /dev/mem of the framebuffer itself).
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//
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// mmaps ONLY the PS2 HPS-bridge register window (the same window ps2_status.sh
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// uses), then drives the LPDDR4B read-probe one 32-bit word at a time:
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// write LPDDR_RDADDR (0x03C) = byte addr -> sets address + triggers a read
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// poll LPDDR_STATUS (0x02C) bit3 (rd_pending) until 0
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// read LPDDR_RDATA (0x03C) -> the 32-bit word
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//
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// Output:
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// default : raw little-endian bytes to stdout (pipe to md5sum / save .bin)
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// --ppm W H: decode PSMCT16 (RGB5A1) -> binary PPM (P6) on stdout
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//
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// Disarm the writer first (the FB must be static while dumping):
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// busybox devmem 0x40000018 w 0x2
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//
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// Build on the HPS: gcc -O2 -o lpddr_dump lpddr_dump.c
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// Usage:
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// sudo ./lpddr_dump 0 8192 > fb.bin ; md5sum fb.bin # acceptance (expect 3b12baff...)
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// sudo ./lpddr_dump --ppm 64 64 0 > fb.ppm # screen-dump (64x64 PSMCT16)
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// Env: PS2_BRIDGE_BASE (default 0x40000000).
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// ============================================================================
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <sys/mman.h>
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#define OFF_LPDDR_STATUS 0x02C // bit3 = rd_pending
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#define OFF_LPDDR_RDPORT 0x03C // write = addr+trigger, read = data
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#define MAP_SPAN 0x1000
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static volatile uint32_t *g_reg;
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static uint32_t rd_word(uint32_t byte_addr) {
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long spin = 0;
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g_reg[OFF_LPDDR_RDPORT/4] = byte_addr; // set addr + trigger read
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while (g_reg[OFF_LPDDR_STATUS/4] & 0x8) { // wait rd_pending -> 0
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if (++spin > 100000000L) {
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fprintf(stderr, "lpddr_dump: TIMEOUT waiting for read @0x%x\n", byte_addr);
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exit(2);
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}
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}
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return g_reg[OFF_LPDDR_RDPORT/4];
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}
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int main(int argc, char **argv) {
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const char *base_env = getenv("PS2_BRIDGE_BASE");
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unsigned long bridge_base = base_env ? strtoul(base_env, NULL, 0) : 0x40000000UL;
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int ppm = 0, ai = 1, w = 0, h = 0;
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if (argc > ai && strcmp(argv[ai], "--ppm") == 0) {
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ppm = 1; ai++;
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if (argc < ai + 3) { fprintf(stderr, "usage: %s --ppm W H START\n", argv[0]); return 1; }
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w = atoi(argv[ai++]); h = atoi(argv[ai++]);
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}
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if (argc <= ai) { fprintf(stderr, "usage: %s [--ppm W H] START [LEN]\n", argv[0]); return 1; }
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uint32_t start = (uint32_t)strtoul(argv[ai++], NULL, 0);
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uint32_t len = ppm ? (uint32_t)(w * h * 2) : (argc > ai ? (uint32_t)strtoul(argv[ai], NULL, 0) : 8192);
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int fd = open("/dev/mem", O_RDWR | O_SYNC);
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if (fd < 0) { perror("/dev/mem"); return 1; }
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void *map = mmap(NULL, MAP_SPAN, PROT_READ | PROT_WRITE, MAP_SHARED, fd, bridge_base);
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if (map == MAP_FAILED) { perror("mmap bridge"); return 1; }
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g_reg = (volatile uint32_t *)map;
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if (ppm) printf("P6\n%d %d\n255\n", w, h);
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// Read in 32-bit words; LEN is byte count (word-aligned up).
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for (uint32_t a = 0; a < len; a += 4) {
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uint32_t word = rd_word(start + a);
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uint8_t b[4] = { word & 0xff, (word >> 8) & 0xff, (word >> 16) & 0xff, (word >> 24) & 0xff };
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if (!ppm) {
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fwrite(b, 1, 4, stdout);
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} else {
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// two PSMCT16 (RGB5A1) pixels per word, little-endian halfwords.
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for (int p = 0; p < 2; p++) {
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uint16_t px = b[p*2] | (b[p*2+1] << 8);
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uint8_t r = ((px >> 0) & 0x1f) << 3;
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uint8_t g = ((px >> 5) & 0x1f) << 3;
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uint8_t bl= ((px >> 10) & 0x1f) << 3;
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uint8_t rgb[3] = { r, g, bl };
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fwrite(rgb, 1, 3, stdout);
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}
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}
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}
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munmap(map, MAP_SPAN);
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close(fd);
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return 0;
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}
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