thejayman77 547811e89b Z-req FIFO REQ_DEPTH 8192->1024: kill zc_emit EMIF setup path, free 32 M20Ks ...

The 8K request FIFO was 8x oversized (measured peak ~478; Codex's TB uses 1024).
Its read address routed to 8 spread M20K blocks -> 310MHz EMIF setup miss (-0.103,
MAX_FANOUT can't help: Quartus refuses to duplicate RAM-address regs, Warning 22471).
Shrinking to 1024 (2 blocks): 26.1 fit shows that path GONE, design clk +0.631->+5.693,
RAM 309/358 (86%) -> 277/358 (77%). New worst is a DIFFERENT, skew-dominated EMIF->
texcache-FSM path at -0.074 (TNS -2.032 -> -0.164).

SAFETY GATE before board load: confirm the full zsrt139f52 scene never bursts >1024
Z-requests in flight (peak I have is 478 from a smaller scene). Bump to 2048 if unsure.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

2026-07-21 05:43:25 -04:00

..

de25_nano_pll_stub.sv

Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)

2026-06-29 20:10:50 -04:00

de25_nano_psmct32_raster_demo_top.sv

Z-req FIFO REQ_DEPTH 8192->1024: kill zc_emit EMIF setup path, free 32 M20Ks

2026-07-21 05:43:25 -04:00

top_psmct32_raster_demo_bram.sv

Add FOG_ENABLE param, prune fog cone on the board profile (fix -6.165ns setup)

2026-07-20 21:31:14 -04:00

top_psmct32_raster_demo.sv

Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)

2026-06-29 20:10:50 -04:00