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thejayman77 ba74bbd5aa Snapshot: fog implementation + fidelity tooling baseline (pre bilinear-clamp fix)

Per-vertex GS fog end-to-end (gs_stub emit incl. persp_emit5, gs_prim_list_feeder
XYZ2->XYZF2 on PRIM.FGE, gs_make_sh3_scheduler_fixture.py F/FGE packing), new fog
TBs, fidelity attribution tooling. Functional baseline before removing the dead
bilinear lerp8 clamps (Codex: 161-node comb loop -> -0.042ns setup fail).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

2026-07-20 19:56:46 -04:00

3.2 KiB

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Ch424 — restore the full scene population under native 12.4 coverage

Root cause

Ch416 was described as a one-variable native-subpixel conversion of Ch415, but its fixture was regenerated from only 113 draw IDs. Ch415 actually fed 766 captured draws grouped into 254 compatible state runs. The 113 IDs were only the surviving groups' representative indices, so treating them as the source draw list silently discarded most of the scene. The resulting software reference already contained the long spike/band geometry later seen bit-exactly in simulation and on the board; this was not an FPGA timing fault.

The --legacy-strip-kicks compatibility switch also ignored captured ADC kick suppression. Ch424 uses the parsed kick semantics and does not enable that switch.

Fixture repair

sh3_zsrt139f19 starts from the audited 766-draw / 254-group plan in /tmp/sh3_opaque_qclip_plan.json, retains authentic chronological grouping, and enables the already-proven production feature set:

authentic Z, color modulation, zero-color fog fold, and bilinear reference;
native GS XYZ 12.4 coordinates and pixel-center coverage;
authentic scissor clipping and normalized full-region clamp;
runtime CLUT staging and 14,500-fragment capacity epochs;
parsed ADC/kick behavior, with no legacy strip override.

The repaired fixture schedules 125 epochs. Its software reference restores the coherent booth, floor, lamp, character, fence, and bench geometry. With the accepted Ch418 scanout mapping, comparison against the PCSX2 224139 frame is MAE 18.5560 / RMSE 26.2740. The raw 640x480 buffer is MAE 21.0802 / RMSE 32.3348.

Acceptance gates

Production-gradient full RTL replay must finish all 125 epochs with zero drops and exact final Z/color comparisons.
The unchanged, timing-clean Ch423 RBF must pass the same fixture on hardware.
The board framebuffer must match the production-gradient RTL framebuffer bit for bit before Ch424 becomes the visible baseline.

Production RTL acceptance

The production registered-gradient Verilator replay completed all 125 epochs: 157,208 fragments were fed, 138,825 passed Z, fragment drops remained zero, and the final comparisons reported 0/307,200 Z mismatches and 0/114,550 color mismatches. Marker/drain counts were complete, col_ovf=0, bresp_err=0, and the testbench finished PASS.

The raw RTL frame measures MAE 22.9740 / RMSE 33.6203 against PCSX2. Through the accepted Ch418 scanout mapping it measures MAE 20.9469 / RMSE 29.7626. Unlike the lower scalar score previously claimed for Ch416, this frame also passes the essential visual gate: its scene topology is coherent rather than dominated by false long triangles.

Board acceptance

No new fit was required. The timing-clean Ch423 RBF ran the new assets and passed every one of the 125 texture CRC, runtime-palette, staging-record, drain, and zero-drop gates. The board dumped 307,200 words with 114,504 nonzero pixels, bounds (0,10)..(511,479), sum32 0x42ee1faa, and xor32 0x0dc19c66; HDMI was switched to the resulting line-buffer scanout.

The board and production RTL framebuffer dumps are byte-identical. Both have SHA-256 2bd7a81d3650c00b1397d5196713634bbd4c87a5e607b75bcf0df346cb7b3126. Ch424 is accepted as the new visible baseline.

3.2 KiB Raw Blame History