thejayman77
ba74bbd5aa
Per-vertex GS fog end-to-end (gs_stub emit incl. persp_emit5, gs_prim_list_feeder XYZ2->XYZF2 on PRIM.FGE, gs_make_sh3_scheduler_fixture.py F/FGE packing), new fog TBs, fidelity attribution tooling. Functional baseline before removing the dead bilinear lerp8 clamps (Codex: 161-node comb loop -> -0.042ns setup fail). Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
61 lines
2.3 KiB
Systemverilog
61 lines
2.3 KiB
Systemverilog
// Integration proof for the runtime CLUT writer mux in the BRAM board top.
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`timescale 1ns/1ps
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module tb_top_psmct32_runtime_clut;
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logic clk = 1'b0;
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always #5 clk = ~clk;
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logic rst_n, core_go;
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logic runtime_wr_en, runtime_busy;
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logic [7:0] runtime_wr_idx;
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logic [31:0] runtime_wr_data;
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logic [7:0] r,g,b;
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logic hsync,vsync,de,core_halt,dma_done_seen,frame_seen,raster_overflow,frame_toggle,dma_done_toggle;
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int errors;
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top_psmct32_raster_demo_bram #(.PSMCT32_SWIZZLE(1'b0)) dut (
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.clk, .rst_n, .core_go, .r, .g, .b, .hsync, .vsync, .de,
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.core_halt, .dma_done_seen, .frame_seen, .raster_overflow,
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.frame_toggle, .dma_done_toggle,
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.joy_a_pressed_i(1'b0), .joy_b_pressed_i(1'b0),
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.runtime_clut_wr_en_i(runtime_wr_en),
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.runtime_clut_wr_idx_i(runtime_wr_idx),
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.runtime_clut_wr_data_i(runtime_wr_data),
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.runtime_clut_busy_i(runtime_busy)
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);
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task automatic runtime_write(input logic [7:0] idx, input logic [31:0] data);
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@(posedge clk);
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runtime_wr_idx <= idx;
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runtime_wr_data <= data;
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runtime_wr_en <= 1'b1;
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@(posedge clk);
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runtime_wr_en <= 1'b0;
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endtask
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task automatic check(input string label, input logic [31:0] got, input logic [31:0] want);
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if (got !== want) begin
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$error("[%s] got 0x%08x expected 0x%08x",label,got,want);
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errors = errors + 1;
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end
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endtask
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initial begin
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rst_n=0; core_go=0; runtime_wr_en=0; runtime_wr_idx=0; runtime_wr_data=0; runtime_busy=0; errors=0;
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repeat(4) @(posedge clk);
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rst_n=1;
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runtime_write(8'h00,32'h10203040);
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runtime_write(8'h37,32'hA1B2C3D4);
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runtime_write(8'hFF,32'h55667788);
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repeat(2) @(posedge clk);
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check("clut[0]",dut.u_clut.mem[0],32'h10203040);
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check("clut[55]",dut.u_clut.mem[8'h37],32'hA1B2C3D4);
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check("clut[255]",dut.u_clut.mem[8'hFF],32'h55667788);
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runtime_busy=1;
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repeat(2) @(posedge clk);
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if (dut.clut_busy !== 1'b1) begin $error("runtime busy did not stall CLUT consumer"); errors=errors+1; end
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if(errors) $fatal(1,"tb_top_psmct32_runtime_clut FAILED: %0d errors",errors);
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$display("tb_top_psmct32_runtime_clut PASS: writer mux + busy gate");
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$finish;
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end
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endmodule
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