thejayman77
ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
89 lines
2.9 KiB
Systemverilog
89 lines
2.9 KiB
Systemverilog
// retroDE_ps2 — trace_sink_stub
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//
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// Simulation-only text trace writer for Wave 1 stubs.
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//
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// Purpose, owns, success condition, replacement path: see
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// docs/stub_module_plan.md (Wave 1, item 1)
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// docs/contracts/validation.md
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// docs/decisions/0000-trace-format.md
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//
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// Interface shape:
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// - One sink instance per output file. A testbench instantiates multiple
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// sinks (one per stub under test) and wires each stub's event port to
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// its own sink. Offline tooling merges files by cycle when needed.
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// - The cycle counter is internal and advances on clk while rst_n is high.
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// Multi-clock-domain correlation is a later-wave concern.
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//
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// Line format (docs/decisions/0000):
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// cycle subsys event arg0 arg1 arg2 arg3 flags
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// where flags is rendered as `-` when zero.
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`timescale 1ns/1ps
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module trace_sink_stub
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import trace_pkg::*;
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#(
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parameter string FILENAME = "trace.txt",
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parameter int SCHEMA_VERSION = 1,
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parameter string SINK_LABEL = "trace"
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) (
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input logic clk,
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input logic rst_n,
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input logic ev_valid,
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input subsys_e ev_subsys,
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input event_e ev_event,
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input logic [63:0] ev_arg0,
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input logic [63:0] ev_arg1,
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input logic [63:0] ev_arg2,
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input logic [63:0] ev_arg3,
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input logic [31:0] ev_flags
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);
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integer fd;
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longint unsigned cycle_count;
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initial begin
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fd = $fopen(FILENAME, "w");
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if (fd == 0) begin
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$fatal(1, "[trace_sink_stub %0s] cannot open %0s", SINK_LABEL, FILENAME);
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end
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$fdisplay(fd, "# retroDE_ps2 trace, schema v%0d, sink=%0s",
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SCHEMA_VERSION, SINK_LABEL);
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$fdisplay(fd, "# columns: cycle subsystem event arg0 arg1 arg2 arg3 flags");
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cycle_count = 64'd0;
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end
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always_ff @(posedge clk) begin
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if (!rst_n) begin
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cycle_count <= 64'd0;
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end else begin
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cycle_count <= cycle_count + 64'd1;
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if (ev_valid) begin
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if (ev_flags == 32'd0) begin
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$fdisplay(fd,
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"%0d %0s %0s 0x%016h 0x%016h 0x%016h 0x%016h -",
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cycle_count,
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subsys_str(ev_subsys),
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event_str(ev_event),
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ev_arg0, ev_arg1, ev_arg2, ev_arg3);
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end else begin
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$fdisplay(fd,
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"%0d %0s %0s 0x%016h 0x%016h 0x%016h 0x%016h 0x%08h",
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cycle_count,
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subsys_str(ev_subsys),
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event_str(ev_event),
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ev_arg0, ev_arg1, ev_arg2, ev_arg3,
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ev_flags);
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end
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end
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end
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end
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final begin
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if (fd != 0) $fclose(fd);
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end
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endmodule : trace_sink_stub
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