ec82764bef
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression (272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps, and all dump-derived textures/traces) is excluded via .gitignore and stays local. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
24 lines
2.0 KiB
Plaintext
24 lines
2.0 KiB
Plaintext
component peripheral_subsys is
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port (
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button_pio_external_connection_export : in std_logic_vector(3 downto 0) := (others => 'X'); -- export
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button_pio_irq_irq : out std_logic; -- irq
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dipsw_pio_external_connection_export : in std_logic_vector(3 downto 0) := (others => 'X'); -- export
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dipsw_pio_irq_irq : out std_logic; -- irq
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led_pio_external_connection_in_port : in std_logic_vector(2 downto 0) := (others => 'X'); -- in_port
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led_pio_external_connection_out_port : out std_logic_vector(2 downto 0); -- out_port
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pb_cpu_0_s0_waitrequest : out std_logic; -- waitrequest
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pb_cpu_0_s0_readdata : out std_logic_vector(31 downto 0); -- readdata
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pb_cpu_0_s0_readdatavalid : out std_logic; -- readdatavalid
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pb_cpu_0_s0_burstcount : in std_logic_vector(0 downto 0) := (others => 'X'); -- burstcount
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pb_cpu_0_s0_writedata : in std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
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pb_cpu_0_s0_address : in std_logic_vector(16 downto 0) := (others => 'X'); -- address
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pb_cpu_0_s0_write : in std_logic := 'X'; -- write
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pb_cpu_0_s0_read : in std_logic := 'X'; -- read
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pb_cpu_0_s0_byteenable : in std_logic_vector(3 downto 0) := (others => 'X'); -- byteenable
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pb_cpu_0_s0_debugaccess : in std_logic := 'X'; -- debugaccess
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clk_clk : in std_logic := 'X'; -- clk
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reset_reset_n : in std_logic := 'X' -- reset_n
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);
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end component peripheral_subsys;
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