Files
thejayman77 ec82764bef Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression
(272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps,
and all dump-derived textures/traces) is excluded via .gitignore and stays local.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
2026-06-29 20:10:50 -04:00

56 lines
1.9 KiB
XML

<?xml version="1.0" ?>
<node xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:xs="http://www.w3.org/2001/XMLSchema" xmlns:altera="http://www.altera.com/XMLSchema/Qsys/SystemTree">
<instanceKey xsi:type="xs:string">rst_in</instanceKey>
<instanceData xsi:type="data">
<parameters></parameters>
<interconnectAssignments></interconnectAssignments>
<className>rst_in</className>
<version>1.0</version>
<name>rst_in</name>
<uniqueName>rst_in</uniqueName>
<nonce>0</nonce>
<incidentConnections></incidentConnections>
</instanceData>
<children>
<node>
<instanceKey xsi:type="xs:string">altera_reset_bridge_inst</instanceKey>
<instanceData xsi:type="data">
<parameters>
<parameter>
<name>ACTIVE_LOW_RESET</name>
<value>1</value>
</parameter>
<parameter>
<name>NUM_RESET_OUTPUTS</name>
<value>1</value>
</parameter>
<parameter>
<name>O_SYNCHRONOUS_EDGES</name>
<value>none</value>
</parameter>
<parameter>
<name>SYNCHRONOUS_EDGES</name>
<value>none</value>
</parameter>
<parameter>
<name>SYNC_RESET</name>
<value>0</value>
</parameter>
<parameter>
<name>USE_RESET_REQUEST</name>
<value>0</value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
<className>altera_reset_bridge</className>
<version>19.2.0</version>
<name>altera_reset_bridge_inst</name>
<uniqueName>rst_in_altera_reset_bridge_1920_xf2264i</uniqueName>
<nonce>0</nonce>
<incidentConnections></incidentConnections>
<path>rst_in.altera_reset_bridge_inst</path>
</instanceData>
<children></children>
</node>
</children>
</node>