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thejayman77 064484c50d Ch443f: coherent Gray readiness CDC + qualified scanout underflow detector 
Harden the LPDDR scanout underflow diagnostic (Codex direction). Keeps the
Ch443e 4-buffer + lead-2 fix; adds no 5th buffer.

RTL (gs_lpddr_scanout_lb):
- Replace the raw-binary next_fetch readiness sync with a reset-aware GRAY
  code. next_fetch is monotonic between frames, so one Gray bit changes per
  increment; the 2-FF-synced + decoded nf_v is always a real prior frontier
  (monotone, burst-safe), never a torn multi-bit combination. (A plain
  toggle-per-change handshake dropped bursts when two increments landed in one
  sync window; that is why the earlier attempt under-read nf_v and false-tripped.)
  fs_edge_v overrides the lone multi-bit reset transient.
- Qualify the underflow: only a miss persisting >= QUAL_CYCLES (4) sets sticky
  underflow. uf_pmax_q records the longest streak and uf_qual_q whether any
  qualified, so a host can distinguish a 1-cycle CDC lag from a real late row.
- Atomic snapshot: scan_y/nf_v/pmax/causes/vphase/line_valid all latched the
  same video cycle on the first qualified miss.

ABI: 0x120 adds [15:12]=live pmax (2-FF synced via scan_diag_pmax_i). 0x124
[29:20] now carries pmax-at-capture (was nf_s0). Bridge dst reg kept 10-bit.

SDC: scanout diag bundle source count 37 -> 31 (nf_s0[10] -> pmax[4]); new
async-in cut + max_skew/net_delay for the next_fetch Gray CDC; stage-0 cut for
the live pmax sync.

Tests: new tb_gs_scanout_cdc_qual (async-clock focused: no false event from the
readiness transition or ordinary sync latency; sub-QUAL transient does not
qualify; genuine late row qualifies with a self-consistent atomic snapshot;
frame reset + mod-4 reuse re-arm the detector). tb_gs_scanout_diag updated for
the pmax field. Tie off scan_diag_pmax_i (+ pre-existing clut_* gap from the
fog baseline) in the four .* bridge/integration TBs.

Regressions green: scanout (cdc_qual, binomial_lookahead, diag, restart,
lpddr_scanout_lb x3), regbuf (r/aw/w), bridge + 3 pad integration TBs, and the
f52 top-level golden FB (Z 0/307200, COLOR 0/245760 mismatch, drops=0).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
2026-07-23 23:17:41 -04:00
..
README.md
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_bgcolor_via_dma.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_bridge_iop_pad_input.sv
Ch443f: coherent Gray readiness CDC + qualified scanout underflow detector
2026-07-23 23:17:41 -04:00
tb_ee_core_add_sub.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_addi.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_align_exc.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_align.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_andi.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_basic.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_beql.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_bev.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_bios_smoke.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_bnel.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_branch_zero.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_cache.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_cop0_count.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_daddu.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_divu_mflo.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_dmac_intc.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_dmac_poll.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_dmac.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_dsll.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_dsubu.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_ei.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_elf_runner.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_packed.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_pixel_emit_psm.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_pixel_emit.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_primitive_gouraud.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_primitive_observer.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_primitive_strip.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_primitive.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_raster_basic.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_raster_gouraud.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_raster_queue.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_raster_topleft.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_gif_reglist.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_jal.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_jalr.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_lb.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_lbu.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_ld.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_lh.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_lhu.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_lq.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_memops.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_multu_mflo.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_pand.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_pcpyh.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_pcpyld.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_pcpyud.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_pnor.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_psubb.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_rtype_addu.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_rtype_logic.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_sb.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_sd.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_sh.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_shift.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_slt.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_slti.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_sq.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_sync.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_syscall_hle.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_core_varshift.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_dmac_intc.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_install_agent_external_image.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_install_agent_smoke.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_ee_pad_buffer_branch.sv
Ch443f: coherent Gray readiness CDC + qualified scanout underflow detector
2026-07-23 23:17:41 -04:00
tb_ee_ram_cpu_dmac_contention.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_autonomous_two_xfers.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_core_basic.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_core_bios_smoke.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_core_bootstrap_intc.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_core_bootstrap.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_core_interrupts.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_dmac_intc.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_dmac_via_map.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_fetch_through_map.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_responder_ee_ram_landing.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_self_driven.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_iop_to_sif_via_map.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_lpddr_tex_staging.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_pad_state_via_sif_to_ee.sv
Ch443f: coherent Gray readiness CDC + qualified scanout underflow detector
2026-07-23 23:17:41 -04:00
tb_sif_combined_ctrl_data.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_sif_command_echo_rearm.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_sif_command_echo.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_sif_dma_mid_stall.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_sif_dma_overflow.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_sif_dma_smoke.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_sif_ee_landing_via_dmac.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_sif_iop_bridge_exec.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_sif_iop_bridge_smoke.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_sif_iop_driven_combined.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00
tb_sif_negative_path.sv
Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)
2026-06-29 20:10:50 -04:00

README.md

sim/tb/integration

Cross-subsystem integration testbenches that exercise full pipelines end to end. Distinct from the per-subsystem testbenches in sibling tb/<subsys>/ directories — those prove one block in isolation; these prove a chain.

Wave 2 contents

  • tb_bgcolor_via_dma.sv — "programmable BGCOLOR via DMA/GIF" (Milestone A+). Chain: dmac_reg_stub → gif_path_stub → gs_stub → platform_video_stub with four trace sinks. Configures DMAC channel 2, provides a one-qword project-local packet carrying a BGCOLOR register write, verifies the color propagates through to the raster output.

See docs/wave2_dma_gif_plan.md for the Wave 2 scope and the packet format.

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