# Ch404 — chronological character-detail tail

Ch404 appends the next 36 authentic opaque draws after the accepted Ch403
frame. Thirty-five staging-safe epochs preserve dump order and cover the
character/lower-body region without changing RTL or requiring another fit.

## Fixture and infrastructure

- `zsrt139b1`: generated 35-epoch detail tail.
- `zsrt139b2`: merged Ch403 base plus the tail, 75 epochs total.
- `tools/merge_runtime_sched.py`: concatenates accepted runtime-CLUT fixtures
  without regenerating or changing their staged records.
- Host and shared-testbench epoch ceilings increase from 64 to 128; staging RAM
  remains 2,048 words and the FPGA image is unchanged.

## RTL verification

- 667,279 fragments fed; 351,074 passed persistent Z.
- 75 ordered markers and drains.
- Zero request drops, color FIFO overflows, or AXI response errors.
- Z mismatch `0/307200`; color mismatch `0/132783` written pixels.
- RTL framebuffer SHA-256:
  `8715381278c2b0a6e527329fb02aaaaf53edbaefd637f115723a3425bbd1b209`.

The tail adds 1,003 nonblack pixels over Ch403. Against the resized PCSX2
frame, RGB MAE improves from 23.8474 to 23.7846 and RMSE from 34.8791 to
34.6956. This is a bounded character-detail gain, not the missing environment
or fog solution.

## Silicon acceptance

The timing-clean Ch403 RBF was retained. The board completed all 75 epochs
with every texture CRC, runtime palette checksum, staging count, record count,
fresh drain, zero-drop, and bus-error gate clean; the host returned `0`.

The 307,200-word board framebuffer is byte-for-byte identical to RTL and has
the same SHA-256
`8715381278c2b0a6e527329fb02aaaaf53edbaefd637f115723a3425bbd1b209`.
The 75-epoch composite is live on HDMI.