qsys_top u0 ( .clk_100_clk (_connected_to_clk_100_clk_), // input, width = 1, clk_100.clk .reset_reset_n (_connected_to_reset_reset_n_), // input, width = 1, reset.reset_n .ninit_done_ninit_done (_connected_to_ninit_done_ninit_done_), // output, width = 1, ninit_done.ninit_done .h2f_reset_reset (_connected_to_h2f_reset_reset_), // output, width = 1, h2f_reset.reset .subsys_hps_hps2fpga_awid (_connected_to_subsys_hps_hps2fpga_awid_), // output, width = 4, subsys_hps_hps2fpga.awid .subsys_hps_hps2fpga_awaddr (_connected_to_subsys_hps_hps2fpga_awaddr_), // output, width = 38, .awaddr .subsys_hps_hps2fpga_awlen (_connected_to_subsys_hps_hps2fpga_awlen_), // output, width = 8, .awlen .subsys_hps_hps2fpga_awsize (_connected_to_subsys_hps_hps2fpga_awsize_), // output, width = 3, .awsize .subsys_hps_hps2fpga_awburst (_connected_to_subsys_hps_hps2fpga_awburst_), // output, width = 2, .awburst .subsys_hps_hps2fpga_awlock (_connected_to_subsys_hps_hps2fpga_awlock_), // output, width = 1, .awlock .subsys_hps_hps2fpga_awcache (_connected_to_subsys_hps_hps2fpga_awcache_), // output, width = 4, .awcache .subsys_hps_hps2fpga_awprot (_connected_to_subsys_hps_hps2fpga_awprot_), // output, width = 3, .awprot .subsys_hps_hps2fpga_awvalid (_connected_to_subsys_hps_hps2fpga_awvalid_), // output, width = 1, .awvalid .subsys_hps_hps2fpga_awready (_connected_to_subsys_hps_hps2fpga_awready_), // input, width = 1, .awready .subsys_hps_hps2fpga_wdata (_connected_to_subsys_hps_hps2fpga_wdata_), // output, width = 128, .wdata .subsys_hps_hps2fpga_wstrb (_connected_to_subsys_hps_hps2fpga_wstrb_), // output, width = 16, .wstrb .subsys_hps_hps2fpga_wlast (_connected_to_subsys_hps_hps2fpga_wlast_), // output, width = 1, .wlast .subsys_hps_hps2fpga_wvalid (_connected_to_subsys_hps_hps2fpga_wvalid_), // output, width = 1, .wvalid .subsys_hps_hps2fpga_wready (_connected_to_subsys_hps_hps2fpga_wready_), // input, width = 1, .wready .subsys_hps_hps2fpga_bid (_connected_to_subsys_hps_hps2fpga_bid_), // input, width = 4, .bid .subsys_hps_hps2fpga_bresp (_connected_to_subsys_hps_hps2fpga_bresp_), // input, width = 2, .bresp .subsys_hps_hps2fpga_bvalid (_connected_to_subsys_hps_hps2fpga_bvalid_), // input, width = 1, .bvalid .subsys_hps_hps2fpga_bready (_connected_to_subsys_hps_hps2fpga_bready_), // output, width = 1, .bready .subsys_hps_hps2fpga_arid (_connected_to_subsys_hps_hps2fpga_arid_), // output, width = 4, .arid .subsys_hps_hps2fpga_araddr (_connected_to_subsys_hps_hps2fpga_araddr_), // output, width = 38, .araddr .subsys_hps_hps2fpga_arlen (_connected_to_subsys_hps_hps2fpga_arlen_), // output, width = 8, .arlen .subsys_hps_hps2fpga_arsize (_connected_to_subsys_hps_hps2fpga_arsize_), // output, width = 3, .arsize .subsys_hps_hps2fpga_arburst (_connected_to_subsys_hps_hps2fpga_arburst_), // output, width = 2, .arburst .subsys_hps_hps2fpga_arlock (_connected_to_subsys_hps_hps2fpga_arlock_), // output, width = 1, .arlock .subsys_hps_hps2fpga_arcache (_connected_to_subsys_hps_hps2fpga_arcache_), // output, width = 4, .arcache .subsys_hps_hps2fpga_arprot (_connected_to_subsys_hps_hps2fpga_arprot_), // output, width = 3, .arprot .subsys_hps_hps2fpga_arvalid (_connected_to_subsys_hps_hps2fpga_arvalid_), // output, width = 1, .arvalid .subsys_hps_hps2fpga_arready (_connected_to_subsys_hps_hps2fpga_arready_), // input, width = 1, .arready .subsys_hps_hps2fpga_rid (_connected_to_subsys_hps_hps2fpga_rid_), // input, width = 4, .rid .subsys_hps_hps2fpga_rdata (_connected_to_subsys_hps_hps2fpga_rdata_), // input, width = 128, .rdata .subsys_hps_hps2fpga_rresp (_connected_to_subsys_hps_hps2fpga_rresp_), // input, width = 2, .rresp .subsys_hps_hps2fpga_rlast (_connected_to_subsys_hps_hps2fpga_rlast_), // input, width = 1, .rlast .subsys_hps_hps2fpga_rvalid (_connected_to_subsys_hps_hps2fpga_rvalid_), // input, width = 1, .rvalid .subsys_hps_hps2fpga_rready (_connected_to_subsys_hps_hps2fpga_rready_), // output, width = 1, .rready .subsys_hps_h2f_warm_reset_handshake_reset_req (_connected_to_subsys_hps_h2f_warm_reset_handshake_reset_req_), // output, width = 1, subsys_hps_h2f_warm_reset_handshake.reset_req .subsys_hps_h2f_warm_reset_handshake_reset_ack (_connected_to_subsys_hps_h2f_warm_reset_handshake_reset_ack_), // input, width = 1, .reset_ack .hps_io_hps_osc_clk (_connected_to_hps_io_hps_osc_clk_), // input, width = 1, hps_io.hps_osc_clk .hps_io_sdmmc_data0 (_connected_to_hps_io_sdmmc_data0_), // inout, width = 1, .sdmmc_data0 .hps_io_sdmmc_data1 (_connected_to_hps_io_sdmmc_data1_), // inout, width = 1, .sdmmc_data1 .hps_io_sdmmc_cclk (_connected_to_hps_io_sdmmc_cclk_), // output, width = 1, .sdmmc_cclk .hps_io_sdmmc_data2 (_connected_to_hps_io_sdmmc_data2_), // inout, width = 1, .sdmmc_data2 .hps_io_sdmmc_data3 (_connected_to_hps_io_sdmmc_data3_), // inout, width = 1, .sdmmc_data3 .hps_io_sdmmc_cmd (_connected_to_hps_io_sdmmc_cmd_), // inout, width = 1, .sdmmc_cmd .hps_io_usb0_clk (_connected_to_hps_io_usb0_clk_), // input, width = 1, .usb0_clk .hps_io_usb0_stp (_connected_to_hps_io_usb0_stp_), // output, width = 1, .usb0_stp .hps_io_usb0_dir (_connected_to_hps_io_usb0_dir_), // input, width = 1, .usb0_dir .hps_io_usb0_data0 (_connected_to_hps_io_usb0_data0_), // inout, width = 1, .usb0_data0 .hps_io_usb0_data1 (_connected_to_hps_io_usb0_data1_), // inout, width = 1, .usb0_data1 .hps_io_usb0_nxt (_connected_to_hps_io_usb0_nxt_), // input, width = 1, .usb0_nxt .hps_io_usb0_data2 (_connected_to_hps_io_usb0_data2_), // inout, width = 1, .usb0_data2 .hps_io_usb0_data3 (_connected_to_hps_io_usb0_data3_), // inout, width = 1, .usb0_data3 .hps_io_usb0_data4 (_connected_to_hps_io_usb0_data4_), // inout, width = 1, .usb0_data4 .hps_io_usb0_data5 (_connected_to_hps_io_usb0_data5_), // inout, width = 1, .usb0_data5 .hps_io_usb0_data6 (_connected_to_hps_io_usb0_data6_), // inout, width = 1, .usb0_data6 .hps_io_usb0_data7 (_connected_to_hps_io_usb0_data7_), // inout, width = 1, .usb0_data7 .hps_io_emac0_tx_clk (_connected_to_hps_io_emac0_tx_clk_), // output, width = 1, .emac0_tx_clk .hps_io_emac0_tx_ctl (_connected_to_hps_io_emac0_tx_ctl_), // output, width = 1, .emac0_tx_ctl .hps_io_emac0_rx_clk (_connected_to_hps_io_emac0_rx_clk_), // input, width = 1, .emac0_rx_clk .hps_io_emac0_rx_ctl (_connected_to_hps_io_emac0_rx_ctl_), // input, width = 1, .emac0_rx_ctl .hps_io_emac0_txd0 (_connected_to_hps_io_emac0_txd0_), // output, width = 1, .emac0_txd0 .hps_io_emac0_txd1 (_connected_to_hps_io_emac0_txd1_), // output, width = 1, .emac0_txd1 .hps_io_emac0_rxd0 (_connected_to_hps_io_emac0_rxd0_), // input, width = 1, .emac0_rxd0 .hps_io_emac0_rxd1 (_connected_to_hps_io_emac0_rxd1_), // input, width = 1, .emac0_rxd1 .hps_io_emac0_txd2 (_connected_to_hps_io_emac0_txd2_), // output, width = 1, .emac0_txd2 .hps_io_emac0_txd3 (_connected_to_hps_io_emac0_txd3_), // output, width = 1, .emac0_txd3 .hps_io_emac0_rxd2 (_connected_to_hps_io_emac0_rxd2_), // input, width = 1, .emac0_rxd2 .hps_io_emac0_rxd3 (_connected_to_hps_io_emac0_rxd3_), // input, width = 1, .emac0_rxd3 .hps_io_mdio0_mdio (_connected_to_hps_io_mdio0_mdio_), // inout, width = 1, .mdio0_mdio .hps_io_mdio0_mdc (_connected_to_hps_io_mdio0_mdc_), // output, width = 1, .mdio0_mdc .hps_io_uart1_tx (_connected_to_hps_io_uart1_tx_), // output, width = 1, .uart1_tx .hps_io_uart1_rx (_connected_to_hps_io_uart1_rx_), // input, width = 1, .uart1_rx .hps_io_i2c1_sda (_connected_to_hps_io_i2c1_sda_), // inout, width = 1, .i2c1_sda .hps_io_i2c1_scl (_connected_to_hps_io_i2c1_scl_), // inout, width = 1, .i2c1_scl .hps_io_gpio28 (_connected_to_hps_io_gpio28_), // inout, width = 1, .gpio28 .hps_io_gpio34 (_connected_to_hps_io_gpio34_), // inout, width = 1, .gpio34 .hps_io_gpio40 (_connected_to_hps_io_gpio40_), // inout, width = 1, .gpio40 .hps_io_gpio41 (_connected_to_hps_io_gpio41_), // inout, width = 1, .gpio41 .f2h_irq1_in_irq (_connected_to_f2h_irq1_in_irq_), // input, width = 32, f2h_irq1_in.irq .f2sdram_araddr (_connected_to_f2sdram_araddr_), // input, width = 32, f2sdram.araddr .f2sdram_arburst (_connected_to_f2sdram_arburst_), // input, width = 2, .arburst .f2sdram_arcache (_connected_to_f2sdram_arcache_), // input, width = 4, .arcache .f2sdram_arid (_connected_to_f2sdram_arid_), // input, width = 5, .arid .f2sdram_arlen (_connected_to_f2sdram_arlen_), // input, width = 8, .arlen .f2sdram_arlock (_connected_to_f2sdram_arlock_), // input, width = 1, .arlock .f2sdram_arprot (_connected_to_f2sdram_arprot_), // input, width = 3, .arprot .f2sdram_arqos (_connected_to_f2sdram_arqos_), // input, width = 4, .arqos .f2sdram_arready (_connected_to_f2sdram_arready_), // output, width = 1, .arready .f2sdram_arsize (_connected_to_f2sdram_arsize_), // input, width = 3, .arsize .f2sdram_arvalid (_connected_to_f2sdram_arvalid_), // input, width = 1, .arvalid .f2sdram_awaddr (_connected_to_f2sdram_awaddr_), // input, width = 32, .awaddr .f2sdram_awburst (_connected_to_f2sdram_awburst_), // input, width = 2, .awburst .f2sdram_awcache (_connected_to_f2sdram_awcache_), // input, width = 4, .awcache .f2sdram_awid (_connected_to_f2sdram_awid_), // input, width = 5, .awid .f2sdram_awlen (_connected_to_f2sdram_awlen_), // input, width = 8, .awlen .f2sdram_awlock (_connected_to_f2sdram_awlock_), // input, width = 1, .awlock .f2sdram_awprot (_connected_to_f2sdram_awprot_), // input, width = 3, .awprot .f2sdram_awqos (_connected_to_f2sdram_awqos_), // input, width = 4, .awqos .f2sdram_awready (_connected_to_f2sdram_awready_), // output, width = 1, .awready .f2sdram_awsize (_connected_to_f2sdram_awsize_), // input, width = 3, .awsize .f2sdram_awvalid (_connected_to_f2sdram_awvalid_), // input, width = 1, .awvalid .f2sdram_bid (_connected_to_f2sdram_bid_), // output, width = 5, .bid .f2sdram_bready (_connected_to_f2sdram_bready_), // input, width = 1, .bready .f2sdram_bresp (_connected_to_f2sdram_bresp_), // output, width = 2, .bresp .f2sdram_bvalid (_connected_to_f2sdram_bvalid_), // output, width = 1, .bvalid .f2sdram_rdata (_connected_to_f2sdram_rdata_), // output, width = 256, .rdata .f2sdram_rid (_connected_to_f2sdram_rid_), // output, width = 5, .rid .f2sdram_rlast (_connected_to_f2sdram_rlast_), // output, width = 1, .rlast .f2sdram_rready (_connected_to_f2sdram_rready_), // input, width = 1, .rready .f2sdram_rresp (_connected_to_f2sdram_rresp_), // output, width = 2, .rresp .f2sdram_rvalid (_connected_to_f2sdram_rvalid_), // output, width = 1, .rvalid .f2sdram_wdata (_connected_to_f2sdram_wdata_), // input, width = 256, .wdata .f2sdram_wlast (_connected_to_f2sdram_wlast_), // input, width = 1, .wlast .f2sdram_wready (_connected_to_f2sdram_wready_), // output, width = 1, .wready .f2sdram_wstrb (_connected_to_f2sdram_wstrb_), // input, width = 32, .wstrb .f2sdram_wvalid (_connected_to_f2sdram_wvalid_), // input, width = 1, .wvalid .f2sdram_aruser (_connected_to_f2sdram_aruser_), // input, width = 8, .aruser .f2sdram_awuser (_connected_to_f2sdram_awuser_), // input, width = 8, .awuser .f2sdram_wuser (_connected_to_f2sdram_wuser_), // input, width = 8, .wuser .f2sdram_buser (_connected_to_f2sdram_buser_), // output, width = 8, .buser .f2sdram_arregion (_connected_to_f2sdram_arregion_), // input, width = 4, .arregion .f2sdram_ruser (_connected_to_f2sdram_ruser_), // output, width = 8, .ruser .f2sdram_awregion (_connected_to_f2sdram_awregion_), // input, width = 4, .awregion .emif_hps_emif_mem_0_mem_cs (_connected_to_emif_hps_emif_mem_0_mem_cs_), // output, width = 1, emif_hps_emif_mem_0.mem_cs .emif_hps_emif_mem_0_mem_ca (_connected_to_emif_hps_emif_mem_0_mem_ca_), // output, width = 6, .mem_ca .emif_hps_emif_mem_0_mem_cke (_connected_to_emif_hps_emif_mem_0_mem_cke_), // output, width = 1, .mem_cke .emif_hps_emif_mem_0_mem_dq (_connected_to_emif_hps_emif_mem_0_mem_dq_), // inout, width = 32, .mem_dq .emif_hps_emif_mem_0_mem_dqs_t (_connected_to_emif_hps_emif_mem_0_mem_dqs_t_), // inout, width = 4, .mem_dqs_t .emif_hps_emif_mem_0_mem_dqs_c (_connected_to_emif_hps_emif_mem_0_mem_dqs_c_), // inout, width = 4, .mem_dqs_c .emif_hps_emif_mem_0_mem_dmi (_connected_to_emif_hps_emif_mem_0_mem_dmi_), // inout, width = 4, .mem_dmi .emif_hps_emif_mem_ck_0_mem_ck_t (_connected_to_emif_hps_emif_mem_ck_0_mem_ck_t_), // output, width = 1, emif_hps_emif_mem_ck_0.mem_ck_t .emif_hps_emif_mem_ck_0_mem_ck_c (_connected_to_emif_hps_emif_mem_ck_0_mem_ck_c_), // output, width = 1, .mem_ck_c .emif_hps_emif_mem_reset_n_mem_reset_n (_connected_to_emif_hps_emif_mem_reset_n_mem_reset_n_), // output, width = 1, emif_hps_emif_mem_reset_n.mem_reset_n .emif_hps_emif_oct_0_oct_rzqin (_connected_to_emif_hps_emif_oct_0_oct_rzqin_), // input, width = 1, emif_hps_emif_oct_0.oct_rzqin .emif_hps_emif_ref_clk_0_clk (_connected_to_emif_hps_emif_ref_clk_0_clk_), // input, width = 1, emif_hps_emif_ref_clk_0.clk .button_pio_external_connection_export (_connected_to_button_pio_external_connection_export_), // input, width = 4, button_pio_external_connection.export .dipsw_pio_external_connection_export (_connected_to_dipsw_pio_external_connection_export_), // input, width = 4, dipsw_pio_external_connection.export .led_pio_external_connection_in_port (_connected_to_led_pio_external_connection_in_port_), // input, width = 3, led_pio_external_connection.in_port .led_pio_external_connection_out_port (_connected_to_led_pio_external_connection_out_port_) // output, width = 3, .out_port );