Initial commit: retroDE_ps2 — first-of-its-kind PS2 GS FPGA core (DE25-Nano / Agilex 5)

RTL (GS rasterizer, EE core stub, platform bridge, LPDDR4B path), sim regression
(272 TBs), docs, and tooling. Copyrighted PS2 content (BIOS, game code, GS dumps,
and all dump-derived textures/traces) is excluded via .gitignore and stays local.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

qsys/ip/qsys_top/clk_100/synth/clk_100.v

@@ -0,0 +1,13 @@
+// clk_100.v
+
+// Generated using ACDS version 26.1 110
+
+`timescale 1 ps / 1 ps
+module clk_100 (
+		input  wire  in_clk,  //  in_clk.clk, Clock Input
+		output wire  out_clk  // out_clk.clk, Clock Output
+	);
+
+	assign out_clk = in_clk;
+
+endmodule