# Ch403 epoch descriptor table (40 epochs, dump order). CLUT=runtime HPS staging;
# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
META n_epochs 40 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
0 5328 11264 480 sh3_zsrt139a90_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a90.mem 494 54 0 sh3_zsrt139a90_pal.mem 0x32ed74c4
1 11671 10240 480 sh3_zsrt139a91_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a91.mem 1061 117 0 sh3_zsrt139a91_pal.mem 0x3cd88c98
2 12757 10240 480 sh3_zsrt139a92_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a92.mem 530 58 1 sh3_zsrt139a92_pal.mem 0x3cd88c98
3 15277 12288 480 sh3_zsrt139a93_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139a93.mem 782 86 0 sh3_zsrt139a93_pal.mem 0x4812d6f2
4 16217 11264 480 sh3_zsrt139a94_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a94.mem 1232 136 0 sh3_zsrt139a94_pal.mem 0x5cbf8bb4
5 16643 11264 480 sh3_zsrt139a95_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a95.mem 1232 136 1 sh3_zsrt139a95_pal.mem 0x5cbf8bb4
6 17069 11264 480 sh3_zsrt139a96_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a96.mem 764 84 1 sh3_zsrt139a96_pal.mem 0x5cbf8bb4
7 17339 11264 480 sh3_zsrt139a97_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a97.mem 1232 136 1 sh3_zsrt139a97_pal.mem 0x5cbf8bb4
8 17765 11264 480 sh3_zsrt139a98_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a98.mem 710 78 1 sh3_zsrt139a98_pal.mem 0x5cbf8bb4
9 19136 11264 480 sh3_zsrt139a99_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a99.mem 1232 136 1 sh3_zsrt139a99_pal.mem 0x5cbf8bb4
10 19562 11264 480 sh3_zsrt139a910_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a910.mem 1232 136 1 sh3_zsrt139a910_pal.mem 0x5cbf8bb4
11 20246 11264 480 sh3_zsrt139a911_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a911.mem 953 105 1 sh3_zsrt139a911_pal.mem 0x5cbf8bb4
12 20579 11264 480 sh3_zsrt139a912_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a912.mem 1232 136 1 sh3_zsrt139a912_pal.mem 0x5cbf8bb4
13 21005 11264 480 sh3_zsrt139a913_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a913.mem 1097 121 1 sh3_zsrt139a913_pal.mem 0x5cbf8bb4
14 21599 11264 480 sh3_zsrt139a914_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a914.mem 170 18 1 sh3_zsrt139a914_pal.mem 0x5cbf8bb4
15 26066 11264 480 sh3_zsrt139a915_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a915.mem 62 6 0 sh3_zsrt139a915_pal.mem 0x44679578
16 30859 10240 480 sh3_zsrt139a916_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a916.mem 620 68 0 sh3_zsrt139a916_pal.mem 0x47405cb0
17 31075 13824 480 sh3_zsrt139a917_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a917.mem 620 68 0 sh3_zsrt139a917_pal.mem 0x566e7c38
18 77112 10240 480 sh3_zsrt139a918_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a918.mem 620 68 0 sh3_zsrt139a918_pal.mem 0x43ece1ae
19 89164 9216 480 sh3_zsrt139a919_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a919.mem 620 68 0 sh3_zsrt139a919_pal.mem 0x5dfce0a2
20 119471 8192 480 sh3_zsrt139a920_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a920.mem 1844 204 0 sh3_zsrt139a920_pal.mem 0x47097d4c
21 120110 8192 480 sh3_zsrt139a921_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a921.mem 1844 204 1 sh3_zsrt139a921_pal.mem 0x47097d4c
22 120749 8192 480 sh3_zsrt139a922_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a922.mem 1844 204 1 sh3_zsrt139a922_pal.mem 0x47097d4c
23 121388 8192 480 sh3_zsrt139a923_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a923.mem 1844 204 1 sh3_zsrt139a923_pal.mem 0x47097d4c
24 122027 8192 480 sh3_zsrt139a924_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a924.mem 1844 204 1 sh3_zsrt139a924_pal.mem 0x47097d4c
25 129389 8192 480 sh3_zsrt139a925_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a925.mem 1844 204 1 sh3_zsrt139a925_pal.mem 0x47097d4c
26 130241 8192 480 sh3_zsrt139a926_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a926.mem 1844 204 1 sh3_zsrt139a926_pal.mem 0x47097d4c
27 130880 8192 480 sh3_zsrt139a927_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a927.mem 1844 204 1 sh3_zsrt139a927_pal.mem 0x47097d4c
28 146205 11264 480 sh3_zsrt139a928_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a928.mem 1142 126 0 sh3_zsrt139a928_pal.mem 0xfd978fd9
29 146630 11264 480 sh3_zsrt139a929_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a929.mem 1178 130 1 sh3_zsrt139a929_pal.mem 0xfd978fd9
30 147068 11264 480 sh3_zsrt139a930_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a930.mem 1106 122 1 sh3_zsrt139a930_pal.mem 0xfd978fd9
31 147480 11264 480 sh3_zsrt139a931_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a931.mem 1070 118 0 sh3_zsrt139a931_pal.mem 0xd5ed05ff
32 147888 11264 480 sh3_zsrt139a932_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a932.mem 998 110 1 sh3_zsrt139a932_pal.mem 0xd5ed05ff
33 148264 11264 480 sh3_zsrt139a933_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a933.mem 1070 118 1 sh3_zsrt139a933_pal.mem 0xd5ed05ff
34 148919 11264 480 sh3_zsrt139a934_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a934.mem 782 86 0 sh3_zsrt139a934_pal.mem 0xcdf8a4d8
35 149214 11264 480 sh3_zsrt139a935_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a935.mem 782 86 1 sh3_zsrt139a935_pal.mem 0xcdf8a4d8
36 149509 11264 480 sh3_zsrt139a936_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a936.mem 746 82 1 sh3_zsrt139a936_pal.mem 0xcdf8a4d8
37 152021 11264 480 sh3_zsrt139a937_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a937.mem 1070 118 0 sh3_zsrt139a937_pal.mem 0xc6784386
38 152420 11264 480 sh3_zsrt139a938_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a938.mem 1034 114 1 sh3_zsrt139a938_pal.mem 0xc6784386
39 152806 11264 480 sh3_zsrt139a939_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a939.mem 1106 122 1 sh3_zsrt139a939_pal.mem 0xc6784386
