# Ch402 epoch descriptor table (40 epochs, dump order). CLUT=runtime HPS staging;
# per epoch: upload tex -> LPDDR 0x200000, fill+verify CRC, stream list, GO, fresh drain.
# reuse=1 (Ch359): the texture cache is ALREADY resident from a prior epoch — the host must SKIP the
# upload and fill, and instead VERIFY the resident CRC register still equals crc (fail-closed residency).
META n_epochs 40 fbpxw 640 fbh 480 fbwords 307200 lpddr_tex 0x200000 tex_words 65536 n_beats 8192
# k idx tbp cbp_reloc tex_file lpddr size crc list_file words records reuse pal_file pal_sum32
0 5328 11264 480 sh3_zsrt139a80_tex_lpddr.mem 0x200000 262144 0x55070afa feeder_sh3_zsrt139a80.mem 494 54 0 sh3_zsrt139a80_pal.mem 0x32ed74c4
1 11671 10240 480 sh3_zsrt139a81_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a81.mem 1061 117 0 sh3_zsrt139a81_pal.mem 0x3cd88c98
2 12757 10240 480 sh3_zsrt139a82_tex_lpddr.mem 0x200000 262144 0x26a88b77 feeder_sh3_zsrt139a82.mem 530 58 1 sh3_zsrt139a82_pal.mem 0x3cd88c98
3 15277 12288 480 sh3_zsrt139a83_tex_lpddr.mem 0x200000 262144 0x835dceb6 feeder_sh3_zsrt139a83.mem 782 86 0 sh3_zsrt139a83_pal.mem 0x4812d6f2
4 16217 11264 480 sh3_zsrt139a84_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a84.mem 1232 136 0 sh3_zsrt139a84_pal.mem 0x5cbf8bb4
5 16643 11264 480 sh3_zsrt139a85_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a85.mem 1232 136 1 sh3_zsrt139a85_pal.mem 0x5cbf8bb4
6 17069 11264 480 sh3_zsrt139a86_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a86.mem 764 84 1 sh3_zsrt139a86_pal.mem 0x5cbf8bb4
7 17339 11264 480 sh3_zsrt139a87_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a87.mem 1232 136 1 sh3_zsrt139a87_pal.mem 0x5cbf8bb4
8 17765 11264 480 sh3_zsrt139a88_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a88.mem 710 78 1 sh3_zsrt139a88_pal.mem 0x5cbf8bb4
9 19136 11264 480 sh3_zsrt139a89_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a89.mem 1232 136 1 sh3_zsrt139a89_pal.mem 0x5cbf8bb4
10 19562 11264 480 sh3_zsrt139a810_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a810.mem 1232 136 1 sh3_zsrt139a810_pal.mem 0x5cbf8bb4
11 20246 11264 480 sh3_zsrt139a811_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a811.mem 953 105 1 sh3_zsrt139a811_pal.mem 0x5cbf8bb4
12 20579 11264 480 sh3_zsrt139a812_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a812.mem 1232 136 1 sh3_zsrt139a812_pal.mem 0x5cbf8bb4
13 21005 11264 480 sh3_zsrt139a813_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a813.mem 1097 121 1 sh3_zsrt139a813_pal.mem 0x5cbf8bb4
14 21599 11264 480 sh3_zsrt139a814_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a814.mem 170 18 1 sh3_zsrt139a814_pal.mem 0x5cbf8bb4
15 26066 11264 480 sh3_zsrt139a815_tex_lpddr.mem 0x200000 262144 0x95a83cbc feeder_sh3_zsrt139a815.mem 62 6 0 sh3_zsrt139a815_pal.mem 0x44679578
16 30859 10240 480 sh3_zsrt139a816_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a816.mem 620 68 0 sh3_zsrt139a816_pal.mem 0x47405cb0
17 31075 13824 480 sh3_zsrt139a817_tex_lpddr.mem 0x200000 262144 0x5b7ffb3d feeder_sh3_zsrt139a817.mem 620 68 0 sh3_zsrt139a817_pal.mem 0x566e7c38
18 77112 10240 480 sh3_zsrt139a818_tex_lpddr.mem 0x200000 262144 0xa727234d feeder_sh3_zsrt139a818.mem 620 68 0 sh3_zsrt139a818_pal.mem 0x43ece1ae
19 89164 9216 480 sh3_zsrt139a819_tex_lpddr.mem 0x200000 262144 0xfbdeaa32 feeder_sh3_zsrt139a819.mem 620 68 0 sh3_zsrt139a819_pal.mem 0x5dfce0a2
20 119471 8192 480 sh3_zsrt139a820_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a820.mem 1844 204 0 sh3_zsrt139a820_pal.mem 0x47097d4c
21 120110 8192 480 sh3_zsrt139a821_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a821.mem 1844 204 1 sh3_zsrt139a821_pal.mem 0x47097d4c
22 120749 8192 480 sh3_zsrt139a822_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a822.mem 1844 204 1 sh3_zsrt139a822_pal.mem 0x47097d4c
23 121388 8192 480 sh3_zsrt139a823_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a823.mem 1844 204 1 sh3_zsrt139a823_pal.mem 0x47097d4c
24 122027 8192 480 sh3_zsrt139a824_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a824.mem 1844 204 1 sh3_zsrt139a824_pal.mem 0x47097d4c
25 129389 8192 480 sh3_zsrt139a825_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a825.mem 1844 204 1 sh3_zsrt139a825_pal.mem 0x47097d4c
26 130241 8192 480 sh3_zsrt139a826_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a826.mem 1844 204 1 sh3_zsrt139a826_pal.mem 0x47097d4c
27 130880 8192 480 sh3_zsrt139a827_tex_lpddr.mem 0x200000 262144 0xcf4cae27 feeder_sh3_zsrt139a827.mem 1844 204 1 sh3_zsrt139a827_pal.mem 0x47097d4c
28 146205 11264 480 sh3_zsrt139a828_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a828.mem 1142 126 0 sh3_zsrt139a828_pal.mem 0xfd978fd9
29 146630 11264 480 sh3_zsrt139a829_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a829.mem 1178 130 1 sh3_zsrt139a829_pal.mem 0xfd978fd9
30 147068 11264 480 sh3_zsrt139a830_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a830.mem 1106 122 1 sh3_zsrt139a830_pal.mem 0xfd978fd9
31 147480 11264 480 sh3_zsrt139a831_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a831.mem 1070 118 0 sh3_zsrt139a831_pal.mem 0xd5ed05ff
32 147888 11264 480 sh3_zsrt139a832_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a832.mem 998 110 1 sh3_zsrt139a832_pal.mem 0xd5ed05ff
33 148264 11264 480 sh3_zsrt139a833_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a833.mem 1070 118 1 sh3_zsrt139a833_pal.mem 0xd5ed05ff
34 148919 11264 480 sh3_zsrt139a834_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a834.mem 782 86 0 sh3_zsrt139a834_pal.mem 0xcdf8a4d8
35 149214 11264 480 sh3_zsrt139a835_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a835.mem 782 86 1 sh3_zsrt139a835_pal.mem 0xcdf8a4d8
36 149509 11264 480 sh3_zsrt139a836_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a836.mem 746 82 1 sh3_zsrt139a836_pal.mem 0xcdf8a4d8
37 152021 11264 480 sh3_zsrt139a837_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a837.mem 1070 118 0 sh3_zsrt139a837_pal.mem 0xc6784386
38 152420 11264 480 sh3_zsrt139a838_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a838.mem 1034 114 1 sh3_zsrt139a838_pal.mem 0xc6784386
39 152806 11264 480 sh3_zsrt139a839_tex_lpddr.mem 0x200000 262144 0xeadeb012 feeder_sh3_zsrt139a839.mem 1106 122 1 sh3_zsrt139a839_pal.mem 0xc6784386
