agilex_hps |

2026.05.11.21:04:03 | Datasheet

Overview

Processor
intel_agilex_5_soc_inst sm_hps 14.0.0
Memory Map

| intel_agilex_5_soc_inst
hps2fpga | lwhps2fpga
intel_agilex_5_soc_inst |  |
f2sdram |  |

## intel_agilex_5_soc_inst

intel_agilex_5_soc v14.0.0

## Parameters

MPU_Events_Enable | false
GP_Enable | false
Debug_APB_Enable | false
STM_Enable | false
JTAG_Enable | false
CTI_Enable | false
DMA_PeriphID | 0,1,2,3,4,5,6,7
DMA_Enable | No,No,No,No,No,No,No,No
F2H_IRQ_Enable | true
H2F_IRQ_PeriphClock_Enable | false
H2F_IRQ_ECC_SERR_Enable | false
H2F_IRQ_L4Timer_Enable | false
H2F_IRQ_SYSTimer_Enable | false
H2F_IRQ_Watchdog_Enable | false
H2F_IRQ_DMA_Enable0 | false
H2F_IRQ_DMA_Enable1 | false
H2F_IRQ_GPIO0_Enable | false
H2F_IRQ_GPIO1_Enable | false
H2F_IRQ_EMAC0_Enable | false
H2F_IRQ_EMAC1_Enable | false
H2F_IRQ_EMAC2_Enable | false
H2F_IRQ_I2CEMAC0_Enable | false
H2F_IRQ_I2CEMAC1_Enable | false
H2F_IRQ_I2CEMAC2_Enable | false
H2F_IRQ_I2C0_Enable | false
H2F_IRQ_I2C1_Enable | false
H2F_IRQ_I3C0_Enable | false
H2F_IRQ_I3C1_Enable | false
H2F_IRQ_NAND_Enable | false
H2F_IRQ_SDMMC_Enable | false
H2F_IRQ_SPIM0_Enable | false
H2F_IRQ_SPIM1_Enable | false
H2F_IRQ_SPIS0_Enable | false
H2F_IRQ_SPIS1_Enable | false
H2F_IRQ_UART0_Enable | false
H2F_IRQ_UART1_Enable | false
H2F_IRQ_USB0_Enable | false
H2F_IRQ_USB1_Enable | false
H2F_Width | 128
H2F_Address_Width | 38
LWH2F_Width | 32
LWH2F_Address_Width | 29
eosc1_clk_mhz | 25.0
F2H_free_clock_enable | false
F2H_free_clk_mhz | 125
FPGA_EMAC0_tx_clk_en | true
FPGA_EMAC1_tx_clk_en | true
FPGA_EMAC2_tx_clk_en | true
FPGA_EMAC_PTP_clk_en | true
FPGA_EMAC0_md_clk_mhz | 2.5
FPGA_EMAC0_gtx_clk_mhz | 125.0
FPGA_EMAC1_md_clk_mhz | 2.5
FPGA_EMAC1_gtx_clk_mhz | 125.0
FPGA_EMAC2_md_clk_mhz | 2.5
FPGA_EMAC2_gtx_clk_mhz | 125.0
FPGA_SPIM0_sclk_mhz | 125.0
FPGA_SPIM1_sclk_mhz | 125.0
FPGA_I2C0_sclk_mhz | 125.0
FPGA_I2C1_sclk_mhz | 125.0
FPGA_I3C0_sclk_mhz | 125.0
FPGA_I3C1_sclk_mhz | 125.0
FPGA_I2CEMAC0_clk_mhz | 125.0
FPGA_I2CEMAC1_clk_mhz | 125.0
FPGA_I2CEMAC2_clk_mhz | 125.0
MPLL_Clock_Source | 0
MPLL_Outputs | VCO,C0,C1,C2,C3
MPLL_Frequencies | 3200.00,800.00,800.00,533.33,400.00
MPLL_Override | true
MPLL_VCO_Override_mhz | 3200.0
MPLL_C0_Override_mhz | 800.0
MPLL_C1_Override_mhz | 800.0
MPLL_C2_Override_mhz | 533.33
MPLL_C3_Override_mhz | 400.0
PPLL_Clock_Source | 0
PPLL_Outputs | VCO,C0,C1,C2,C3
PPLL_Frequencies | 3000.00,600.00,600.00,24.00,500.00
PPLL_Override | true
PPLL_VCO_Override_mhz | 3000.0
PPLL_C0_Override_mhz | 600.0
PPLL_C1_Override_mhz | 600.0
PPLL_C2_Override_mhz | 24.0
PPLL_C3_Override_mhz | 500.0
MPU_clk_outputs | MPU,MPU CCU,MPU Periph,Core0|Core1,Core2,Core3
MPU_clk_frequencies | 533.33,266.665,133.3325,800.00,800.00,800.00
MPU_clk_sources | MainC2,MPU,MPU,MainC1,MainC0,MainC0
MPU_clk_ccu_div | 2
MPU_clk_periph_div | 4
MPU_clk_override | true
MPU_clk_src_override | 2
MPU_clk_freq_override_mhz | 533.33
MPU_core01_src_override | 1
MPU_core01_freq_override_mhz | 800.0
MPU_core2_freq_override_mhz | 800.0
MPU_core3_freq_override_mhz | 800.0
NOC_clk_outputs | NOC,L4 Free,L4 Peripheral,L4 Slow Peripheral,SoftPHY,CoreSight,CoreSight Debug APB,CoreSight Trace IO
NOC_clk_frequencies | 400.0,100.0,200.0,100.0,200.0,400.0,100.0,100.0
NOC_clk_sources | MainC3,NOC,NOC,NOC,L4Periph,NOC,NOC,NOC
NOC_clk_src_select | 3
NOC_clk_free_l4_div | 4
NOC_clk_periph_l4_div | 2
NOC_clk_slow_l4_div | 4
NOC_clk_phy_div | 1
NOC_clk_cs_div | 1
NOC_clk_cs_debug_div | 4
NOC_clk_cs_trace_div | 4
Periph_clk_outputs | EMAC0,EMAC1,EMAC2,EMAC PTP,GDB Free,GPIO Debounce,PSI Ref,USB 3.1
Periph_clk_frequencies | 250,250,250,400.00,200.00,100.00,500.00,20.00
Periph_clk_sources | PeriphC3,PeriphC3,PeriphC3,MainC3,MainC3,GDB Free,PeriphC3,MainC3
Periph_clk_emac0_sel | 250
Periph_clk_emac1_sel | 250
Periph_clk_emac2_sel | 250
Periph_clk_override | false
User0_clk_enable | false
User1_clk_enable | false
User0_clk_src_select | 7
User0_clk_freq | 500.0
User1_clk_src_select | 7
User1_clk_freq | 500.0
Pwr_a55_core0_1_on | true
Pwr_a76_core2_on | true
Pwr_a76_core3_on | true
Pwr_cpu_app_select | 0
Pwr_boot_core_sel | 0
Pwr_default_mpu_l3_cache_size | 1MB
Pwr_override_cache_size | false
Rst_hps_warm_en | false
Rst_h2f_cold_en | false
Rst_watchdog_en | false
Rst_sdm_wd_config | 0
IO_INPUT_DELAY0 | -1
IO_OUTPUT_DELAY0 | -1
IO_INPUT_DELAY1 | -1
IO_OUTPUT_DELAY1 | -1
IO_INPUT_DELAY2 | -1
IO_OUTPUT_DELAY2 | -1
IO_INPUT_DELAY3 | -1
IO_OUTPUT_DELAY3 | -1
IO_INPUT_DELAY4 | -1
IO_OUTPUT_DELAY4 | -1
IO_INPUT_DELAY5 | -1
IO_OUTPUT_DELAY5 | -1
IO_INPUT_DELAY6 | -1
IO_OUTPUT_DELAY6 | -1
IO_INPUT_DELAY7 | -1
IO_OUTPUT_DELAY7 | -1
IO_INPUT_DELAY8 | -1
IO_OUTPUT_DELAY8 | -1
IO_INPUT_DELAY9 | -1
IO_OUTPUT_DELAY9 | -1
IO_INPUT_DELAY10 | -1
IO_OUTPUT_DELAY10 | -1
IO_INPUT_DELAY11 | -1
IO_OUTPUT_DELAY11 | -1
IO_INPUT_DELAY12 | -1
IO_OUTPUT_DELAY12 | 21
IO_INPUT_DELAY13 | -1
IO_OUTPUT_DELAY13 | -1
IO_INPUT_DELAY14 | 21
IO_OUTPUT_DELAY14 | -1
IO_INPUT_DELAY15 | -1
IO_OUTPUT_DELAY15 | -1
IO_INPUT_DELAY16 | -1
IO_OUTPUT_DELAY16 | -1
IO_INPUT_DELAY17 | -1
IO_OUTPUT_DELAY17 | -1
IO_INPUT_DELAY18 | -1
IO_OUTPUT_DELAY18 | -1
IO_INPUT_DELAY19 | -1
IO_OUTPUT_DELAY19 | -1
IO_INPUT_DELAY20 | -1
IO_OUTPUT_DELAY20 | -1
IO_INPUT_DELAY21 | -1
IO_OUTPUT_DELAY21 | -1
IO_INPUT_DELAY22 | -1
IO_OUTPUT_DELAY22 | -1
IO_INPUT_DELAY23 | -1
IO_OUTPUT_DELAY23 | -1
IO_INPUT_DELAY24 | -1
IO_OUTPUT_DELAY24 | -1
IO_INPUT_DELAY25 | -1
IO_OUTPUT_DELAY25 | -1
IO_INPUT_DELAY26 | -1
IO_OUTPUT_DELAY26 | -1
IO_INPUT_DELAY27 | -1
IO_OUTPUT_DELAY27 | -1
IO_INPUT_DELAY28 | -1
IO_OUTPUT_DELAY28 | -1
IO_INPUT_DELAY29 | -1
IO_OUTPUT_DELAY29 | -1
IO_INPUT_DELAY30 | -1
IO_OUTPUT_DELAY30 | -1
IO_INPUT_DELAY31 | -1
IO_OUTPUT_DELAY31 | -1
IO_INPUT_DELAY32 | -1
IO_OUTPUT_DELAY32 | -1
IO_INPUT_DELAY33 | -1
IO_OUTPUT_DELAY33 | -1
IO_INPUT_DELAY34 | -1
IO_OUTPUT_DELAY34 | -1
IO_INPUT_DELAY35 | -1
IO_OUTPUT_DELAY35 | -1
IO_INPUT_DELAY36 | -1
IO_OUTPUT_DELAY36 | -1
IO_INPUT_DELAY37 | -1
IO_OUTPUT_DELAY37 | -1
IO_INPUT_DELAY38 | -1
IO_OUTPUT_DELAY38 | -1
IO_INPUT_DELAY39 | -1
IO_OUTPUT_DELAY39 | -1
IO_INPUT_DELAY40 | -1
IO_OUTPUT_DELAY40 | -1
IO_INPUT_DELAY41 | -1
IO_OUTPUT_DELAY41 | -1
IO_INPUT_DELAY42 | -1
IO_OUTPUT_DELAY42 | -1
IO_INPUT_DELAY43 | -1
IO_OUTPUT_DELAY43 | -1
IO_INPUT_DELAY44 | -1
IO_OUTPUT_DELAY44 | -1
IO_INPUT_DELAY45 | -1
IO_OUTPUT_DELAY45 | -1
IO_INPUT_DELAY46 | -1
IO_OUTPUT_DELAY46 | -1
IO_INPUT_DELAY47 | -1
IO_OUTPUT_DELAY47 | -1
hps_ioa1_opd_en | false
hps_ioa2_opd_en | false
hps_ioa3_opd_en | false
hps_ioa4_opd_en | false
hps_ioa5_opd_en | false
hps_ioa6_opd_en | false
hps_ioa7_opd_en | false
hps_ioa8_opd_en | false
hps_ioa9_opd_en | false
hps_ioa10_opd_en | false
hps_ioa11_opd_en | false
hps_ioa12_opd_en | false
hps_ioa13_opd_en | false
hps_ioa14_opd_en | false
hps_ioa15_opd_en | false
hps_ioa16_opd_en | false
hps_ioa17_opd_en | false
hps_ioa18_opd_en | false
hps_ioa19_opd_en | false
hps_ioa20_opd_en | false
hps_ioa21_opd_en | false
hps_ioa22_opd_en | false
hps_ioa23_opd_en | false
hps_ioa24_opd_en | false
hps_iob1_opd_en | false
hps_iob2_opd_en | false
hps_iob3_opd_en | false
hps_iob4_opd_en | false
hps_iob5_opd_en | false
hps_iob6_opd_en | false
hps_iob7_opd_en | false
hps_iob8_opd_en | false
hps_iob9_opd_en | false
hps_iob10_opd_en | false
hps_iob11_opd_en | false
hps_iob12_opd_en | false
hps_iob13_opd_en | false
hps_iob14_opd_en | false
hps_iob15_opd_en | false
hps_iob16_opd_en | false
hps_iob17_opd_en | false
hps_iob18_opd_en | false
hps_iob19_opd_en | false
hps_iob20_opd_en | false
hps_iob21_opd_en | false
hps_iob22_opd_en | false
hps_iob23_opd_en | false
hps_iob24_opd_en | false
EMAC0_PTP | false
EMAC1_PTP | false
EMAC2_PTP | false
ATB_Enable | false
f2sdram_data_width | 256
f2sdram_address_width | 32
f2sdram_SMMU | false
f2s_data_width | 0
f2s_address_width | 32
f2s_SMMU | false
EMIF_AXI_Enable | true
EMIF_Topology | 1
ED_h2f_connectivity | 1
ED_h2f_data_width | 128
ED_h2f_addr_width | 26
ED_lwh2f_connectivity | 1
ED_lwh2f_data_width | 32
ED_lwh2f_addr_width | 26
ED_f2sdram_connectivity | 1
ED_f2sdram_data_width | 256
ED_f2sdram_addr_width | 40
ED_f2h_connectivity | 1
ED_f2h_data_width | 256
ED_f2h_addr_width | 38
ED_en_synth_gen | false
ED_en_sim_gen | true
ED_en_questa | true
ED_en_vcsmx | true
ED_en_riviera | false
ED_en_xcelium | true
deviceFamily | UNKNOWN
generateLegacySim | false

## Software Assignments

CPU_FREQ | 50000000u

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