// retroDE_ps2 — tb_ee_core_gif_reglist (Ch73 + Ch74 + Ch75 residual)
//
// Verifies the Ch73 fixes to gif_packed_stub:
//   1) NREG=0 means 16, not 15.  Pre-Ch73 the field was clamped to
//      4'd15, which under-counted PACKED 16-register packets by one
//      data qword and desynchronized any following tag.
//   2) FLG=1 REGLIST payload is consumed (ceil(NLOOP*NREG/2) qwords)
//      instead of mistaking the first data qword for the next tag.
//   3) FLG=2 IMAGE payload is consumed (NLOOP qwords) — added to the
//      stream in Ch74 to close the Ch73 residual that the original
//      header claimed but didn't actually exercise.
//   4) FLG=3 DISABLE payload is consumed (NLOOP qwords) — added in
//      Ch75 to close the Ch73 audit-low residual that originally
//      claimed "FLG=2/3 verified" without actually exercising FLG=3.
//      In gif_packed_stub the FLG=3 path shares S_IMAGE with FLG=2
//      (both are NLOOP opaque qwords, EV_MODE-only); this segment
//      proves the parser doesn't desync on FLG=3 either.
//   5) Multi-tag in one DMA burst lands on the right tag boundaries.
//
// Stream (multiple tags, single 30-qword DMA burst):
//   q 0    : REGLIST tag  FLG=1 NREG=2 NLOOP=2 EOP=0
//   q 1..2 : REGLIST payload (2 qwords = 4 entries)
//   q 3    : PACKED  tag  FLG=0 NREG=0 (=16 per PS2) NLOOP=1 EOP=0
//                         REGS = {0xE in slot 0, 0xF (NOP) in slots 1..15}
//   q 4..19: PACKED payload (16 qwords) — slot 0's A+D = BGCOLOR=blue,
//                                          slots 1..15 each EV_MODE
//   q20    : IMAGE   tag  FLG=2 NLOOP=2 EOP=0
//   q21..22: IMAGE payload (2 opaque qwords, EV_MODE per accept)
//   q23    : DISABLE tag  FLG=3 NLOOP=1 EOP=0   (Ch75 — new)
//   q24    : DISABLE payload (1 opaque qword, EV_MODE)
//   q25    : PACKED  tag  FLG=0 NREG=2 NLOOP=1 EOP=1
//                         REGS = {A+D, A+D}
//   q26    : A+D #0 — BGCOLOR = red (final visible color)
//   q27    : A+D #1 — non-BGCOLOR (gs_offset 0x0048)  → gs EV_MODE
//   q28..29: padding NOP qwords (DMAC QWC padded out, each empty
//            qword decodes as a zero-NLOOP tag → EV_GIFTAG only)
//
// If NREG=0 were still clamped to 15, or if FLG=3 didn't consume its
// payload, the trailing PACKED tag would land on the wrong qword and
// bg_{r,g,b} would NOT be red.

`timescale 1ns/1ps

module tb_ee_core_gif_reglist;

    localparam int H_ACTIVE = 8;
    localparam int H_FRONT  = 2;
    localparam int H_SYNC   = 2;
    localparam int H_BACK   = 2;
    localparam int V_ACTIVE = 4;
    localparam int V_FRONT  = 1;
    localparam int V_SYNC   = 2;
    localparam int V_BACK   = 1;

    localparam int RAM_SIZE_BYTES = 4 * 1024;
    localparam int RAM_ADDR_W     = $clog2(RAM_SIZE_BYTES);

    logic clk;
    logic rst_n;
    initial clk = 1'b0;
    always #5 clk = ~clk;

    // ------------------------------------------------------------------
    // ee_ram_stub
    // ------------------------------------------------------------------
    logic                  ram_rd_en;
    logic [RAM_ADDR_W-1:0] ram_rd_addr;
    logic [127:0]          ram_rd_data;
    logic                  ram_rd_valid;

    logic                  ram_wr_en;
    logic [RAM_ADDR_W-1:0] ram_wr_addr;
    logic [127:0]          ram_wr_data;
    logic [15:0]           ram_wr_be;
    logic [7:0]            ram_master_id;

    logic                ram_ev_valid;
    trace_pkg::subsys_e  ram_ev_subsys;
    trace_pkg::event_e   ram_ev_event;
    logic [63:0]         ram_ev_arg0, ram_ev_arg1, ram_ev_arg2, ram_ev_arg3;
    logic [31:0]         ram_ev_flags;

    ee_ram_stub #(.SIZE_BYTES(RAM_SIZE_BYTES)) u_ram (
        .clk(clk), .rst_n(rst_n),
        .rd_en(ram_rd_en), .rd_addr(ram_rd_addr),
        .rd_data(ram_rd_data), .rd_valid(ram_rd_valid),
        .wr_en(ram_wr_en), .wr_addr(ram_wr_addr),
        .wr_data(ram_wr_data), .wr_be(ram_wr_be),
        .master_id(ram_master_id),
        .ev_valid(ram_ev_valid), .ev_subsys(ram_ev_subsys),
        .ev_event(ram_ev_event),
        .ev_arg0(ram_ev_arg0), .ev_arg1(ram_ev_arg1),
        .ev_arg2(ram_ev_arg2), .ev_arg3(ram_ev_arg3),
        .ev_flags(ram_ev_flags)
    );

    assign ram_master_id = ram_rd_en ? 8'd1 : 8'd0;

    // ------------------------------------------------------------------
    // DMAC + memory map
    // ------------------------------------------------------------------
    logic        dmac_reg_wr_en;
    logic [7:0]  dmac_reg_offset;
    logic [31:0] dmac_reg_wr_data;
    logic        dmac_mem_rd_en;
    logic [31:0] dmac_mem_rd_addr;
    logic         dmac_gif_valid;
    logic [127:0] dmac_gif_data;
    logic         dmac_gif_last;
    logic         dmac_gif_ready;

    logic                dmac_ev_valid;
    trace_pkg::subsys_e  dmac_ev_subsys;
    trace_pkg::event_e   dmac_ev_event;
    logic [63:0]         dmac_ev_arg0, dmac_ev_arg1, dmac_ev_arg2, dmac_ev_arg3;
    logic [31:0]         dmac_ev_flags;

    logic [127:0] map_to_dmac_rd_data;
    logic         map_to_dmac_rd_valid;

    dmac_reg_stub u_dmac (
        .clk(clk), .rst_n(rst_n),
        .reg_wr_en(dmac_reg_wr_en), .reg_offset(dmac_reg_offset),
        .reg_wr_data(dmac_reg_wr_data),
        .reg_rd_en(1'b0), .reg_rd_data(), .reg_rd_valid(),
        .mem_rd_en(dmac_mem_rd_en), .mem_rd_addr(dmac_mem_rd_addr),
        .mem_rd_data(map_to_dmac_rd_data), .mem_rd_valid(map_to_dmac_rd_valid),
        .ep_valid(dmac_gif_valid), .ep_data(dmac_gif_data),
        .ep_last(dmac_gif_last), .ep_ready(dmac_gif_ready),
        .irq_completion_o(),
        .ev_valid(dmac_ev_valid), .ev_subsys(dmac_ev_subsys),
        .ev_event(dmac_ev_event),
        .ev_arg0(dmac_ev_arg0), .ev_arg1(dmac_ev_arg1),
        .ev_arg2(dmac_ev_arg2), .ev_arg3(dmac_ev_arg3),
        .ev_flags(dmac_ev_flags)
    );

    logic         map_ram_rd_en;
    logic [24:0]  map_ram_rd_addr;
    logic                map_ev_valid;
    trace_pkg::subsys_e  map_ev_subsys;
    trace_pkg::event_e   map_ev_event;
    logic [63:0]         map_ev_arg0, map_ev_arg1, map_ev_arg2, map_ev_arg3;
    logic [31:0]         map_ev_flags;

    ee_memory_map_stub u_map (
        .clk(clk), .rst_n(rst_n),
        .ee_rd_en(1'b0), .ee_rd_addr(32'd0),
        .ee_rd_data(), .ee_rd_valid(),
        .ee_wr_en(1'b0), .ee_wr_addr(32'd0),
        .ee_wr_data(32'd0), .ee_wr_be(4'd0),
        .dmac_rd_en(dmac_mem_rd_en), .dmac_rd_addr(dmac_mem_rd_addr),
        .dmac_rd_data(map_to_dmac_rd_data),
        .dmac_rd_valid(map_to_dmac_rd_valid),
        .bios_rd_en(), .bios_rd_addr(),
        .bios_rd_data(32'd0), .bios_rd_valid(1'b0),
        .ram_rd_en(map_ram_rd_en), .ram_rd_addr(map_ram_rd_addr),
        .ram_rd_data(ram_rd_data), .ram_rd_valid(ram_rd_valid),
        .bridge_wr_en(1'b0), .bridge_wr_addr(32'd0),
        .bridge_wr_data(128'd0), .bridge_wr_be(16'd0),
        .bridge_master_id(8'd0),
        .ram_wr_en(), .ram_wr_addr(), .ram_wr_data(),
        .ram_wr_be(), .ram_master_id(),
        .ee_dmac_ch2_wr_en(), .ee_dmac_ch2_wr_addr(), .ee_dmac_ch2_wr_data(),
        .ee_dmac_ch2_rd_en(), .ee_dmac_ch2_rd_addr(),
        .ee_dmac_ch2_rd_data(32'd0), .ee_dmac_ch2_rd_valid(1'b0),
        .ee_intc_wr_en(), .ee_intc_wr_addr(), .ee_intc_wr_data(),
        .ee_intc_rd_en(), .ee_intc_rd_addr(),
        .ee_intc_rd_data(32'd0), .ee_intc_rd_valid(1'b0),
        .ee_misc_mmio_wr_en(), .ee_misc_mmio_wr_addr(), .ee_misc_mmio_wr_data(), .ee_misc_mmio_wr_be(),
        .ee_misc_mmio_rd_en(), .ee_misc_mmio_rd_addr(),
        .ee_misc_mmio_rd_data(32'd0), .ee_misc_mmio_rd_valid(1'b0),
        .ee_biu_wr_en(), .ee_biu_wr_addr(), .ee_biu_wr_data(), .ee_biu_wr_be(),
        .ee_biu_rd_en(), .ee_biu_rd_addr(),
        .ee_biu_rd_data(32'd0), .ee_biu_rd_valid(1'b0),
        .ev_valid(map_ev_valid), .ev_subsys(map_ev_subsys),
        .ev_event(map_ev_event),
        .ev_arg0(map_ev_arg0), .ev_arg1(map_ev_arg1),
        .ev_arg2(map_ev_arg2), .ev_arg3(map_ev_arg3),
        .ev_flags(map_ev_flags)
    );

    assign ram_rd_en   = map_ram_rd_en;
    assign ram_rd_addr = map_ram_rd_addr[RAM_ADDR_W-1:0];

    // ------------------------------------------------------------------
    // gif_packed_stub + gs_stub + platform
    // ------------------------------------------------------------------
    logic        gif_gs_wr_en;
    logic [15:0] gif_gs_wr_addr;
    logic [63:0] gif_gs_wr_data;

    logic                gif_ev_valid;
    trace_pkg::subsys_e  gif_ev_subsys;
    trace_pkg::event_e   gif_ev_event;
    logic [63:0]         gif_ev_arg0, gif_ev_arg1, gif_ev_arg2, gif_ev_arg3;
    logic [31:0]         gif_ev_flags;

    gif_packed_stub u_gif (
        .clk(clk), .rst_n(rst_n),
        .in_valid(dmac_gif_valid), .in_data(dmac_gif_data),
        .in_last(dmac_gif_last), .in_ready(dmac_gif_ready),
        .image_data_ready(1'b1),
        .raster_fifo_full(1'b0),
        .gs_wr_en(gif_gs_wr_en), .gs_wr_addr(gif_gs_wr_addr),
        .gs_wr_data(gif_gs_wr_data),
        .ev_valid(gif_ev_valid), .ev_subsys(gif_ev_subsys),
        .ev_event(gif_ev_event),
        .ev_arg0(gif_ev_arg0), .ev_arg1(gif_ev_arg1),
        .ev_arg2(gif_ev_arg2), .ev_arg3(gif_ev_arg3),
        .ev_flags(gif_ev_flags)
    );

    logic [7:0]          bg_r, bg_g, bg_b;
    logic                gs_ev_valid;
    trace_pkg::subsys_e  gs_ev_subsys;
    trace_pkg::event_e   gs_ev_event;
    logic [63:0]         gs_ev_arg0, gs_ev_arg1, gs_ev_arg2, gs_ev_arg3;
    logic [31:0]         gs_ev_flags;

    gs_stub u_gs (
        .clk(clk), .rst_n(rst_n),
        .reg_wr_en(gif_gs_wr_en), .reg_wr_addr(gif_gs_wr_addr),
        .reg_wr_data(gif_gs_wr_data),
        .gif_reg_wr_en(1'b0), .gif_reg_num(8'd0), .gif_reg_data(64'd0),
        .prim_q(), .rgbaq_q(), .xyz2_q(), .xyzf2_q(), .frame_1_q(), .zbuf_1_q(),
        .prim_complete(), .prim_complete_count(),
        .prim_v0_q(), .prim_v1_q(), .prim_v2_q(),
        .prim_color_q(),
        .prim_color_v0_q(), .prim_color_v1_q(), .prim_color_v2_q(),
        .prim_v0_decoded_q(), .prim_v1_decoded_q(), .prim_v2_decoded_q(),
        .prim_v0_color_decoded_q(), .prim_v1_color_decoded_q(), .prim_v2_color_decoded_q(),
        .pixel_emit(), .pixel_emit_count(),
        .pixel_x_q(), .pixel_y_q(),
        .pixel_color_q(),
        .pixel_fbp_q(), .pixel_fbw_q(), .pixel_psm_q(),
        .pixel_fb_addr_q(),
        .raster_pixel_emit(), .raster_pixel_emit_count(),
        .raster_pixel_x_q(), .raster_pixel_y_q(),
        .raster_pixel_color_q(),
        .raster_pixel_fb_addr_q(),
        .raster_active(), .raster_overflow(),
        .raster_degenerate(),
        .bg_r(bg_r), .bg_g(bg_g), .bg_b(bg_b),
        .ev_valid(gs_ev_valid), .ev_subsys(gs_ev_subsys),
        .ev_event(gs_ev_event),
        .ev_arg0(gs_ev_arg0), .ev_arg1(gs_ev_arg1),
        .ev_arg2(gs_ev_arg2), .ev_arg3(gs_ev_arg3),
        .ev_flags(gs_ev_flags)
    );

    logic       hsync, vsync, de;
    logic [7:0] r, g, b;
    logic                plat_ev_valid;
    trace_pkg::subsys_e  plat_ev_subsys;
    trace_pkg::event_e   plat_ev_event;
    logic [63:0]         plat_ev_arg0, plat_ev_arg1, plat_ev_arg2, plat_ev_arg3;
    logic [31:0]         plat_ev_flags;

    platform_video_stub #(
        .H_ACTIVE(H_ACTIVE), .H_FRONT(H_FRONT), .H_SYNC(H_SYNC), .H_BACK(H_BACK),
        .V_ACTIVE(V_ACTIVE), .V_FRONT(V_FRONT), .V_SYNC(V_SYNC), .V_BACK(V_BACK)
    ) u_plat (
        .clk(clk), .rst_n(rst_n),
        .bg_r(bg_r), .bg_g(bg_g), .bg_b(bg_b),
        .hsync(hsync), .vsync(vsync), .de(de),
        .r(r), .g(g), .b(b),
        .ev_valid(plat_ev_valid), .ev_subsys(plat_ev_subsys),
        .ev_event(plat_ev_event),
        .ev_arg0(plat_ev_arg0), .ev_arg1(plat_ev_arg1),
        .ev_arg2(plat_ev_arg2), .ev_arg3(plat_ev_arg3),
        .ev_flags(plat_ev_flags)
    );

    trace_sink_stub #(.FILENAME("gif_reglist_dmac.trace"), .SINK_LABEL("dmac"))
        u_trace_dmac (.clk(clk), .rst_n(rst_n),
            .ev_valid(dmac_ev_valid), .ev_subsys(dmac_ev_subsys),
            .ev_event(dmac_ev_event),
            .ev_arg0(dmac_ev_arg0), .ev_arg1(dmac_ev_arg1),
            .ev_arg2(dmac_ev_arg2), .ev_arg3(dmac_ev_arg3),
            .ev_flags(dmac_ev_flags));
    trace_sink_stub #(.FILENAME("gif_reglist_gif.trace"), .SINK_LABEL("gif"))
        u_trace_gif (.clk(clk), .rst_n(rst_n),
            .ev_valid(gif_ev_valid), .ev_subsys(gif_ev_subsys),
            .ev_event(gif_ev_event),
            .ev_arg0(gif_ev_arg0), .ev_arg1(gif_ev_arg1),
            .ev_arg2(gif_ev_arg2), .ev_arg3(gif_ev_arg3),
            .ev_flags(gif_ev_flags));
    trace_sink_stub #(.FILENAME("gif_reglist_gs.trace"), .SINK_LABEL("gs"))
        u_trace_gs (.clk(clk), .rst_n(rst_n),
            .ev_valid(gs_ev_valid), .ev_subsys(gs_ev_subsys),
            .ev_event(gs_ev_event),
            .ev_arg0(gs_ev_arg0), .ev_arg1(gs_ev_arg1),
            .ev_arg2(gs_ev_arg2), .ev_arg3(gs_ev_arg3),
            .ev_flags(gs_ev_flags));

    // ------------------------------------------------------------------
    // Counters
    // ------------------------------------------------------------------
    localparam logic [31:0] PAYLOAD_MADR = 32'h0000_0100;
    localparam int          NUM_QWORDS   = 30;

    int dma_start_count;
    int dma_beat_count;
    int dma_done_count;
    int gif_giftag_count;
    int gif_write_count;
    int gif_mode_count;
    int gs_bgcolor_count;
    int gs_mode_count;
    int errors;
    logic dma_done_seen;

    initial begin
        dma_start_count  = 0;
        dma_beat_count   = 0;
        dma_done_count   = 0;
        gif_giftag_count = 0;
        gif_write_count  = 0;
        gif_mode_count   = 0;
        gs_bgcolor_count = 0;
        gs_mode_count    = 0;
        errors           = 0;
        dma_done_seen    = 1'b0;
    end

    always_ff @(posedge clk) begin
        if (rst_n && dmac_ev_valid) begin
            unique case (dmac_ev_event)
                trace_pkg::EV_DMA_START: dma_start_count <= dma_start_count + 1;
                trace_pkg::EV_DMA_BEAT:  dma_beat_count  <= dma_beat_count  + 1;
                trace_pkg::EV_DMA_DONE: begin
                    dma_done_count <= dma_done_count + 1;
                    dma_done_seen  <= 1'b1;
                end
                default: ;
            endcase
        end
        if (rst_n && gif_ev_valid) begin
            if (gif_ev_event == trace_pkg::EV_GIFTAG)
                gif_giftag_count <= gif_giftag_count + 1;
            if (gif_ev_event == trace_pkg::EV_WRITE)
                gif_write_count <= gif_write_count + 1;
            if (gif_ev_event == trace_pkg::EV_MODE)
                gif_mode_count <= gif_mode_count + 1;
        end
        if (rst_n && gs_ev_valid) begin
            if (gs_ev_event == trace_pkg::EV_BGCOLOR)
                gs_bgcolor_count <= gs_bgcolor_count + 1;
            if (gs_ev_event == trace_pkg::EV_MODE)
                gs_mode_count <= gs_mode_count + 1;
        end
    end

    // ------------------------------------------------------------------
    // Stimulus helpers
    // ------------------------------------------------------------------
    localparam logic [7:0]  CHCR_OFF = 8'h00;
    localparam logic [7:0]  MADR_OFF = 8'h10;
    localparam logic [7:0]  QWC_OFF  = 8'h20;

    task automatic write_dmac(input logic [7:0] offset, input logic [31:0] data);
        @(negedge clk);
        dmac_reg_wr_en   = 1'b1;
        dmac_reg_offset  = offset;
        dmac_reg_wr_data = data;
        @(negedge clk);
        dmac_reg_wr_en   = 1'b0;
        dmac_reg_offset  = 8'd0;
        dmac_reg_wr_data = 32'd0;
    endtask

    task automatic preload_qword(input logic [RAM_ADDR_W-1:0] addr,
                                 input logic [127:0] data);
        @(negedge clk);
        ram_wr_en   = 1'b1;
        ram_wr_addr = addr;
        ram_wr_data = data;
        ram_wr_be   = 16'hFFFF;
        @(negedge clk);
        ram_wr_en   = 1'b0;
        ram_wr_addr = '0;
        ram_wr_data = 128'd0;
        ram_wr_be   = 16'd0;
    endtask

    function automatic logic [127:0] giftag(
        input logic [14:0] nloop,
        input logic        eop,
        input logic [1:0]  flg,
        input logic [3:0]  nreg,                                         // 0 == 16
        input logic [63:0] regs);
        logic [63:0] lower;
        lower = {nreg, flg, 42'd0, eop, nloop};
        return {regs, lower};
    endfunction

    function automatic logic [127:0] aplusd(input logic [15:0] gs_off,
                                            input logic [63:0] data64);
        return {48'd0, gs_off, data64};
    endfunction

    initial begin
        rst_n            = 1'b0;
        dmac_reg_wr_en   = 1'b0;
        dmac_reg_offset  = 8'd0;
        dmac_reg_wr_data = 32'd0;
        ram_wr_en        = 1'b0;
        ram_wr_addr      = '0;
        ram_wr_data      = 128'd0;
        ram_wr_be        = 16'd0;

        repeat (4) @(posedge clk);
        rst_n = 1'b1;
        repeat (8) @(posedge clk);

        // Preload bytes at PAYLOAD_MADR + qi*16. ee_ram_stub indexes by
        // qword (byte addr >> 4); using bare qi 0..NUM_QWORDS-1 would
        // all alias to qword 0.
        begin : preload_block
            logic [RAM_ADDR_W-1:0] addr_q;
            // q0 — REGLIST tag
            addr_q = PAYLOAD_MADR + 32'd0;                               // implicit truncation
            preload_qword(addr_q, giftag(15'd2, 1'b0, 2'd1, 4'd2,
                                         64'h0000_0000_0000_00FF));
            // q1, q2 — REGLIST payload (opaque)
            addr_q = PAYLOAD_MADR + 32'd16 ;
            preload_qword(addr_q, 128'hAAAA_BBBB_CCCC_DDDD_EEEE_FFFF_1111_2222);
            addr_q = PAYLOAD_MADR + 32'd32 ;
            preload_qword(addr_q, 128'h3333_4444_5555_6666_7777_8888_9999_0000);
            // q3 — PACKED tag NREG=0 (=16) NLOOP=1 EOP=0; slot 0 = A+D,
            //                  slots 1..15 = NOP nibble 0xF
            addr_q = PAYLOAD_MADR + 32'd48 ;
            preload_qword(addr_q, giftag(15'd1, 1'b0, 2'd0, 4'd0,
                                         {60'hFFFF_FFFF_FFFF_FFF, 4'hE}));
            // q4 — slot 0 A+D: BGCOLOR = blue (transient)
            addr_q = PAYLOAD_MADR + 32'd64 ;
            preload_qword(addr_q, aplusd(16'h00E0, 64'h0000_0000_0000_00FF));
            // q5..q19 — 15 dummy NOP-nibble data qwords (EV_MODE per accept)
            for (int qi = 5; qi <= 19; qi = qi + 1) begin
                addr_q = PAYLOAD_MADR + qi*32'd16;
                preload_qword(addr_q, 128'h0);
            end
            // q20 — IMAGE tag FLG=2 NLOOP=2 EOP=0
            addr_q = PAYLOAD_MADR + 32'd320;
            preload_qword(addr_q, giftag(15'd2, 1'b0, 2'd2, 4'd0, 64'h0));
            // q21..q22 — IMAGE payload (opaque)
            addr_q = PAYLOAD_MADR + 32'd336;
            preload_qword(addr_q, 128'hCAFE_BABE_DEAD_BEEF_1234_5678_9ABC_DEF0);
            addr_q = PAYLOAD_MADR + 32'd352;
            preload_qword(addr_q, 128'hAA55_AA55_55AA_55AA_FF00_FF00_00FF_00FF);
            // q23 — DISABLE tag FLG=3 NLOOP=1 EOP=0  (Ch75)
            addr_q = PAYLOAD_MADR + 32'd368;
            preload_qword(addr_q, giftag(15'd1, 1'b0, 2'd3, 4'd0, 64'h0));
            // q24 — DISABLE payload (1 opaque qword, EV_MODE)
            addr_q = PAYLOAD_MADR + 32'd384;
            preload_qword(addr_q, 128'hFEED_FACE_C0DE_BABE_0BAD_F00D_8BAD_F00D);
            // q25 — PACKED tag NREG=2 NLOOP=1 EOP=1, REGS=[A+D, A+D]
            addr_q = PAYLOAD_MADR + 32'd400;
            preload_qword(addr_q, giftag(15'd1, 1'b1, 2'd0, 4'd2,
                                         64'h0000_0000_0000_00EE));
            // q26 — A+D BGCOLOR = red (final)
            addr_q = PAYLOAD_MADR + 32'd416;
            preload_qword(addr_q, aplusd(16'h00E0, 64'h0000_0000_00FF_0000));
            // q27 — A+D non-BGCOLOR
            addr_q = PAYLOAD_MADR + 32'd432;
            preload_qword(addr_q, aplusd(16'h0048, 64'h0000_0000_DEAD_BEEF));
            // q28..q29 — padding NOPs (each decodes as empty tag)
            addr_q = PAYLOAD_MADR + 32'd448;
            preload_qword(addr_q, 128'h0);
            addr_q = PAYLOAD_MADR + 32'd464;
            preload_qword(addr_q, 128'h0);
        end

        // Program DMAC: NUM_QWORDS-qword transfer
        write_dmac(MADR_OFF, PAYLOAD_MADR);
        write_dmac(QWC_OFF,  NUM_QWORDS);
        write_dmac(CHCR_OFF, 32'h0000_0001);

        wait (dma_done_seen == 1'b1);
        repeat (40) @(posedge clk);

        $display("[tb_ee_core_gif_reglist] dma_start=%0d dma_beat=%0d dma_done=%0d  gif_giftag=%0d gif_write=%0d gif_mode=%0d  gs_bgcolor=%0d gs_mode=%0d  bg=(%02h,%02h,%02h)  errors=%0d",
                 dma_start_count, dma_beat_count, dma_done_count,
                 gif_giftag_count, gif_write_count, gif_mode_count,
                 gs_bgcolor_count, gs_mode_count,
                 bg_r, bg_g, bg_b, errors);

        // Pass conditions (Ch75 30-qword stream):
        //   - DMAC: 1 START / 30 BEAT / 1 DONE
        //   - GIF tags: 7 = REGLIST + PACKED-NREG=16 + IMAGE + DISABLE
        //                 + PACKED-NREG=2 + 2 padding-empty tags
        //   - GIF writes: 3 = 1 (NREG=16 slot 0 A+D)
        //                  + 2 (NREG=2 both slots are A+D since
        //                       REGS=0x0..00EE puts nibble 0xE in
        //                       both slot 0 and slot 1)
        //   - GIF mode: 20 = 2 REGLIST + 15 NOP-slot + 2 IMAGE + 1 DISABLE
        //   - GS bgcolor: 2 = NREG=16 packet's BGCOLOR=blue, then
        //                     NREG=2 packet's BGCOLOR=red. Final bg = red.
        //   - GS mode: 1 = non-BGCOLOR write at gs_offset 0x0048.
        if (dma_start_count != 1)  begin $error("dma_start: %0d", dma_start_count); errors = errors + 1; end
        if (dma_beat_count  != 30) begin $error("dma_beat: %0d",  dma_beat_count);  errors = errors + 1; end
        if (dma_done_count  != 1)  begin $error("dma_done: %0d",  dma_done_count);  errors = errors + 1; end
        if (gif_giftag_count != 7) begin $error("gif_giftag: %0d (expected 7: REGLIST + PACKED-16 + IMAGE + DISABLE + PACKED-2 + 2 padding)", gif_giftag_count); errors = errors + 1; end
        if (gif_write_count != 3)  begin $error("gif_write: %0d (expected 3: 1 from NREG=16 slot 0 + 2 from NREG=2 both slots)", gif_write_count); errors = errors + 1; end
        if (gif_mode_count  != 20) begin $error("gif_mode: %0d (expected 20: 2 REGLIST + 15 NOP-slot + 2 IMAGE + 1 DISABLE)", gif_mode_count); errors = errors + 1; end
        if (gs_bgcolor_count != 2) begin $error("gs_bgcolor: %0d (expected 2: blue then red)", gs_bgcolor_count); errors = errors + 1; end
        if (gs_mode_count   != 1)  begin $error("gs_mode: %0d (expected 1: non-BGCOLOR write)", gs_mode_count); errors = errors + 1; end
        if (bg_r !== 8'hFF || bg_g !== 8'h00 || bg_b !== 8'h00) begin
            $error("bg_{r,g,b} != red: got (%02h,%02h,%02h) — likely desync after REGLIST/NREG=0/IMAGE/DISABLE",
                   bg_r, bg_g, bg_b);
            errors = errors + 1;
        end

        if (errors == 0)
            $display("[tb_ee_core_gif_reglist] PASS");
        else
            $display("[tb_ee_core_gif_reglist] FAIL");
        $finish;
    end

    initial begin
        #1000000;
        $error("[tb_ee_core_gif_reglist] timeout");
        $finish;
    end

endmodule : tb_ee_core_gif_reglist
