// retroDE_ps2 — tb_ee_core_gif_pixel_emit_psm (Ch83)
//
// Verifies the Ch83 PSM-aware byte-width lookup in gs_stub's
// pixel_fb_addr_q math. Each tag rewrites FRAME_1 with a different
// PSM and closes a TRIANGLE; the per-emit fb_addr should reflect
// the right bytes-per-pixel for that PSM:
//
//   PSMCT32 (PSM=0x00) → 4 bytes/pixel → << 2
//   PSMCT16 (PSM=0x02) → 2 bytes/pixel → << 1
//   PSMT8   (PSM=0x13) → 1 byte/pixel  → << 0
//
// FRAME_1 layout (FBP=2, FBW=10, varying PSM):
//   PSMCT32 → 64'h0000_0000_000A_0002
//   PSMCT16 → 64'h0000_0000_020A_0002
//   PSMT8   → 64'h0000_0000_130A_0002
//
// Stream (3 GIFtags, 19 qwords):
//
//   Tag1 — PSMCT32 TRI, NREG=6:
//     PRIM, FRAME_1_CT32, RGBAQ, v1, v2, v3 (X=320, Y=240) — closes
//     fb_addr = 4096 + (240*640+320)*4 = 0x97500
//
//   Tag2 — PSMCT16 TRI, NREG=5:
//     PRIM, FRAME_1_CT16, v1, v2, v3 (X=200, Y=100) — closes
//     fb_addr = 4096 + (100*640+200)*2 = 0x20590
//
//   Tag3 — PSMT8 TRI, NREG=5 (EOP):
//     PRIM, FRAME_1_T8, v1, v2, v3 (X=200, Y=100) — closes
//     fb_addr = 4096 + (100*640+200)*1 = 0x10AC8
//
// Pass criteria:
//   - DMAC: 1 START / 19 BEAT / 1 DONE
//   - GIF:  3 GIFTAG, 16 EV_WRITE, 0 EV_MODE
//   - GS:   13 EV_WRITE, 3 EV_PRIM_DRAW, 0 EV_MODE
//   - pixel_emit_count == 3 / pulses == 3
//   - emit[0] PSM=0x00, fb_addr=0x97500
//   - emit[1] PSM=0x02, fb_addr=0x20590  (load-bearing — 16-bit)
//   - emit[2] PSM=0x13, fb_addr=0x10AC8  (load-bearing — 8-bit indexed)

`timescale 1ns/1ps

module tb_ee_core_gif_pixel_emit_psm;

    localparam int RAM_SIZE_BYTES = 4 * 1024;
    localparam int RAM_ADDR_W     = $clog2(RAM_SIZE_BYTES);

    logic clk;
    logic rst_n;
    initial clk = 1'b0;
    always #5 clk = ~clk;

    // ee_ram_stub
    logic                  ram_rd_en;
    logic [RAM_ADDR_W-1:0] ram_rd_addr;
    logic [127:0]          ram_rd_data;
    logic                  ram_rd_valid;
    logic                  ram_wr_en;
    logic [RAM_ADDR_W-1:0] ram_wr_addr;
    logic [127:0]          ram_wr_data;
    logic [15:0]           ram_wr_be;
    logic [7:0]            ram_master_id;

    ee_ram_stub #(.SIZE_BYTES(RAM_SIZE_BYTES)) u_ram (
        .clk(clk), .rst_n(rst_n),
        .rd_en(ram_rd_en), .rd_addr(ram_rd_addr),
        .rd_data(ram_rd_data), .rd_valid(ram_rd_valid),
        .wr_en(ram_wr_en), .wr_addr(ram_wr_addr),
        .wr_data(ram_wr_data), .wr_be(ram_wr_be),
        .master_id(ram_master_id),
        .ev_valid(), .ev_subsys(), .ev_event(),
        .ev_arg0(), .ev_arg1(), .ev_arg2(), .ev_arg3(), .ev_flags()
    );
    assign ram_master_id = ram_rd_en ? 8'd1 : 8'd0;

    // DMAC + map
    logic        dmac_reg_wr_en;
    logic [7:0]  dmac_reg_offset;
    logic [31:0] dmac_reg_wr_data;
    logic        dmac_mem_rd_en;
    logic [31:0] dmac_mem_rd_addr;
    logic         dmac_gif_valid;
    logic [127:0] dmac_gif_data;
    logic         dmac_gif_last;
    logic         dmac_gif_ready;

    logic                dmac_ev_valid;
    trace_pkg::subsys_e  dmac_ev_subsys;
    trace_pkg::event_e   dmac_ev_event;
    logic [63:0]         dmac_ev_arg0, dmac_ev_arg1, dmac_ev_arg2, dmac_ev_arg3;
    logic [31:0]         dmac_ev_flags;

    logic [127:0] map_to_dmac_rd_data;
    logic         map_to_dmac_rd_valid;

    dmac_reg_stub u_dmac (
        .clk(clk), .rst_n(rst_n),
        .reg_wr_en(dmac_reg_wr_en), .reg_offset(dmac_reg_offset),
        .reg_wr_data(dmac_reg_wr_data),
        .reg_rd_en(1'b0), .reg_rd_data(), .reg_rd_valid(),
        .mem_rd_en(dmac_mem_rd_en), .mem_rd_addr(dmac_mem_rd_addr),
        .mem_rd_data(map_to_dmac_rd_data), .mem_rd_valid(map_to_dmac_rd_valid),
        .ep_valid(dmac_gif_valid), .ep_data(dmac_gif_data),
        .ep_last(dmac_gif_last), .ep_ready(dmac_gif_ready),
        .irq_completion_o(),
        .ev_valid(dmac_ev_valid), .ev_subsys(dmac_ev_subsys),
        .ev_event(dmac_ev_event),
        .ev_arg0(dmac_ev_arg0), .ev_arg1(dmac_ev_arg1),
        .ev_arg2(dmac_ev_arg2), .ev_arg3(dmac_ev_arg3),
        .ev_flags(dmac_ev_flags)
    );

    logic        map_ram_rd_en;
    logic [24:0] map_ram_rd_addr;
    ee_memory_map_stub u_map (
        .clk(clk), .rst_n(rst_n),
        .ee_rd_en(1'b0), .ee_rd_addr(32'd0),
        .ee_rd_data(), .ee_rd_valid(),
        .ee_wr_en(1'b0), .ee_wr_addr(32'd0),
        .ee_wr_data(32'd0), .ee_wr_be(4'd0),
        .dmac_rd_en(dmac_mem_rd_en), .dmac_rd_addr(dmac_mem_rd_addr),
        .dmac_rd_data(map_to_dmac_rd_data),
        .dmac_rd_valid(map_to_dmac_rd_valid),
        .bios_rd_en(), .bios_rd_addr(),
        .bios_rd_data(32'd0), .bios_rd_valid(1'b0),
        .ram_rd_en(map_ram_rd_en), .ram_rd_addr(map_ram_rd_addr),
        .ram_rd_data(ram_rd_data), .ram_rd_valid(ram_rd_valid),
        .bridge_wr_en(1'b0), .bridge_wr_addr(32'd0),
        .bridge_wr_data(128'd0), .bridge_wr_be(16'd0),
        .bridge_master_id(8'd0),
        .ram_wr_en(), .ram_wr_addr(), .ram_wr_data(),
        .ram_wr_be(), .ram_master_id(),
        .ee_dmac_ch2_wr_en(), .ee_dmac_ch2_wr_addr(), .ee_dmac_ch2_wr_data(),
        .ee_dmac_ch2_rd_en(), .ee_dmac_ch2_rd_addr(),
        .ee_dmac_ch2_rd_data(32'd0), .ee_dmac_ch2_rd_valid(1'b0),
        .ee_intc_wr_en(), .ee_intc_wr_addr(), .ee_intc_wr_data(),
        .ee_intc_rd_en(), .ee_intc_rd_addr(),
        .ee_intc_rd_data(32'd0), .ee_intc_rd_valid(1'b0),
        .ee_misc_mmio_wr_en(), .ee_misc_mmio_wr_addr(), .ee_misc_mmio_wr_data(), .ee_misc_mmio_wr_be(),
        .ee_misc_mmio_rd_en(), .ee_misc_mmio_rd_addr(),
        .ee_misc_mmio_rd_data(32'd0), .ee_misc_mmio_rd_valid(1'b0),
        .ee_biu_wr_en(), .ee_biu_wr_addr(), .ee_biu_wr_data(), .ee_biu_wr_be(),
        .ee_biu_rd_en(), .ee_biu_rd_addr(),
        .ee_biu_rd_data(32'd0), .ee_biu_rd_valid(1'b0),
        .ev_valid(), .ev_subsys(), .ev_event(),
        .ev_arg0(), .ev_arg1(), .ev_arg2(), .ev_arg3(), .ev_flags()
    );

    assign ram_rd_en   = map_ram_rd_en;
    assign ram_rd_addr = map_ram_rd_addr[RAM_ADDR_W-1:0];

    // gif_packed_stub
    logic        gif_gs_wr_en;
    logic [15:0] gif_gs_wr_addr;
    logic [63:0] gif_gs_wr_data;
    logic        gif_gif_reg_wr_en;
    logic [7:0]  gif_gif_reg_num;
    logic [63:0] gif_gif_reg_data;

    logic                gif_ev_valid;
    trace_pkg::subsys_e  gif_ev_subsys;
    trace_pkg::event_e   gif_ev_event;
    logic [63:0]         gif_ev_arg0, gif_ev_arg1, gif_ev_arg2, gif_ev_arg3;
    logic [31:0]         gif_ev_flags;

    gif_packed_stub #(.REAL_AD_REG_MAP(1'b1)) u_gif (
        .clk(clk), .rst_n(rst_n),
        .in_valid(dmac_gif_valid), .in_data(dmac_gif_data),
        .in_last(dmac_gif_last), .in_ready(dmac_gif_ready),
        .image_data_ready(1'b1),
        .raster_fifo_full(1'b0),
        .gs_wr_en(gif_gs_wr_en), .gs_wr_addr(gif_gs_wr_addr),
        .gs_wr_data(gif_gs_wr_data),
        .gif_reg_wr_en(gif_gif_reg_wr_en),
        .gif_reg_num(gif_gif_reg_num),
        .gif_reg_data(gif_gif_reg_data),
        .ev_valid(gif_ev_valid), .ev_subsys(gif_ev_subsys),
        .ev_event(gif_ev_event),
        .ev_arg0(gif_ev_arg0), .ev_arg1(gif_ev_arg1),
        .ev_arg2(gif_ev_arg2), .ev_arg3(gif_ev_arg3),
        .ev_flags(gif_ev_flags)
    );

    // gs_stub
    logic [7:0]          bg_r, bg_g, bg_b;
    logic [63:0]         prim_q, rgbaq_q, xyz2_q, xyzf2_q, frame_1_q, zbuf_1_q;
    logic                prim_complete;
    logic [31:0]         prim_complete_count;
    logic [63:0]         prim_v0_q, prim_v1_q, prim_v2_q;
    logic [63:0]         prim_color_q;
    logic [63:0]         prim_color_v0_q, prim_color_v1_q, prim_color_v2_q;
    trace_pkg::vertex_t  prim_v0_decoded_q, prim_v1_decoded_q, prim_v2_decoded_q;
    trace_pkg::color_t   prim_v0_color_decoded_q, prim_v1_color_decoded_q, prim_v2_color_decoded_q;
    logic                pixel_emit;
    logic [31:0]         pixel_emit_count;
    logic [11:0]         pixel_x_q, pixel_y_q;
    logic [63:0]         pixel_color_q;
    logic [8:0]          pixel_fbp_q;
    logic [5:0]          pixel_fbw_q, pixel_psm_q;
    logic [31:0]         pixel_fb_addr_q;
    logic                gs_ev_valid;
    trace_pkg::subsys_e  gs_ev_subsys;
    trace_pkg::event_e   gs_ev_event;
    logic [63:0]         gs_ev_arg0, gs_ev_arg1, gs_ev_arg2, gs_ev_arg3;
    logic [31:0]         gs_ev_flags;

    gs_stub u_gs (
        .clk(clk), .rst_n(rst_n),
        .reg_wr_en(gif_gs_wr_en), .reg_wr_addr(gif_gs_wr_addr),
        .reg_wr_data(gif_gs_wr_data),
        .gif_reg_wr_en(gif_gif_reg_wr_en),
        .gif_reg_num(gif_gif_reg_num),
        .gif_reg_data(gif_gif_reg_data),
        .bg_r(bg_r), .bg_g(bg_g), .bg_b(bg_b),
        .prim_q(prim_q), .rgbaq_q(rgbaq_q),
        .xyz2_q(xyz2_q), .xyzf2_q(xyzf2_q),
        .frame_1_q(frame_1_q), .zbuf_1_q(zbuf_1_q),
        .prim_complete(prim_complete),
        .prim_complete_count(prim_complete_count),
        .prim_v0_q(prim_v0_q), .prim_v1_q(prim_v1_q), .prim_v2_q(prim_v2_q),
        .prim_color_q(prim_color_q),
        .prim_color_v0_q(prim_color_v0_q),
        .prim_color_v1_q(prim_color_v1_q),
        .prim_color_v2_q(prim_color_v2_q),
        .prim_v0_decoded_q(prim_v0_decoded_q),
        .prim_v1_decoded_q(prim_v1_decoded_q),
        .prim_v2_decoded_q(prim_v2_decoded_q),
        .prim_v0_color_decoded_q(prim_v0_color_decoded_q),
        .prim_v1_color_decoded_q(prim_v1_color_decoded_q),
        .prim_v2_color_decoded_q(prim_v2_color_decoded_q),
        .pixel_emit(pixel_emit),
        .pixel_emit_count(pixel_emit_count),
        .pixel_x_q(pixel_x_q), .pixel_y_q(pixel_y_q),
        .pixel_color_q(pixel_color_q),
        .pixel_fbp_q(pixel_fbp_q),
        .pixel_fbw_q(pixel_fbw_q),
        .pixel_psm_q(pixel_psm_q),
        .pixel_fb_addr_q(pixel_fb_addr_q),
        .raster_pixel_emit(), .raster_pixel_emit_count(),
        .raster_pixel_x_q(), .raster_pixel_y_q(),
        .raster_pixel_color_q(),
        .raster_pixel_fb_addr_q(),
        .raster_active(), .raster_overflow(),
        .raster_degenerate(),
        .ev_valid(gs_ev_valid), .ev_subsys(gs_ev_subsys),
        .ev_event(gs_ev_event),
        .ev_arg0(gs_ev_arg0), .ev_arg1(gs_ev_arg1),
        .ev_arg2(gs_ev_arg2), .ev_arg3(gs_ev_arg3),
        .ev_flags(gs_ev_flags)
    );

    trace_sink_stub #(.FILENAME("gif_pixel_emit_psm_dmac.trace"), .SINK_LABEL("dmac"))
        u_trace_dmac (.clk(clk), .rst_n(rst_n),
            .ev_valid(dmac_ev_valid), .ev_subsys(dmac_ev_subsys),
            .ev_event(dmac_ev_event),
            .ev_arg0(dmac_ev_arg0), .ev_arg1(dmac_ev_arg1),
            .ev_arg2(dmac_ev_arg2), .ev_arg3(dmac_ev_arg3),
            .ev_flags(dmac_ev_flags));
    trace_sink_stub #(.FILENAME("gif_pixel_emit_psm_gif.trace"), .SINK_LABEL("gif"))
        u_trace_gif (.clk(clk), .rst_n(rst_n),
            .ev_valid(gif_ev_valid), .ev_subsys(gif_ev_subsys),
            .ev_event(gif_ev_event),
            .ev_arg0(gif_ev_arg0), .ev_arg1(gif_ev_arg1),
            .ev_arg2(gif_ev_arg2), .ev_arg3(gif_ev_arg3),
            .ev_flags(gif_ev_flags));
    trace_sink_stub #(.FILENAME("gif_pixel_emit_psm_gs.trace"), .SINK_LABEL("gs"))
        u_trace_gs (.clk(clk), .rst_n(rst_n),
            .ev_valid(gs_ev_valid), .ev_subsys(gs_ev_subsys),
            .ev_event(gs_ev_event),
            .ev_arg0(gs_ev_arg0), .ev_arg1(gs_ev_arg1),
            .ev_arg2(gs_ev_arg2), .ev_arg3(gs_ev_arg3),
            .ev_flags(gs_ev_flags));

    // Counters
    int dma_start_count, dma_beat_count, dma_done_count;
    int gif_giftag_count, gif_write_count, gif_mode_count;
    int gs_write_count, gs_prim_draw_count, gs_mode_count;
    int pixel_emit_pulse_count;
    int errors;
    logic dma_done_seen;

    initial begin
        dma_start_count = 0; dma_beat_count = 0; dma_done_count = 0;
        gif_giftag_count = 0; gif_write_count = 0; gif_mode_count = 0;
        gs_write_count = 0; gs_prim_draw_count = 0; gs_mode_count = 0;
        pixel_emit_pulse_count = 0;
        errors = 0; dma_done_seen = 1'b0;
    end

    always_ff @(posedge clk) begin
        if (rst_n && dmac_ev_valid) begin
            unique case (dmac_ev_event)
                trace_pkg::EV_DMA_START: dma_start_count <= dma_start_count + 1;
                trace_pkg::EV_DMA_BEAT:  dma_beat_count  <= dma_beat_count  + 1;
                trace_pkg::EV_DMA_DONE: begin
                    dma_done_count <= dma_done_count + 1;
                    dma_done_seen  <= 1'b1;
                end
                default: ;
            endcase
        end
        if (rst_n && gif_ev_valid) begin
            if (gif_ev_event == trace_pkg::EV_GIFTAG) gif_giftag_count <= gif_giftag_count + 1;
            if (gif_ev_event == trace_pkg::EV_WRITE)  gif_write_count  <= gif_write_count  + 1;
            if (gif_ev_event == trace_pkg::EV_MODE)   gif_mode_count   <= gif_mode_count   + 1;
        end
        if (rst_n && gs_ev_valid) begin
            if (gs_ev_event == trace_pkg::EV_WRITE)     gs_write_count     <= gs_write_count     + 1;
            if (gs_ev_event == trace_pkg::EV_PRIM_DRAW) gs_prim_draw_count <= gs_prim_draw_count + 1;
            if (gs_ev_event == trace_pkg::EV_MODE)      gs_mode_count      <= gs_mode_count      + 1;
        end
        if (rst_n && pixel_emit) pixel_emit_pulse_count <= pixel_emit_pulse_count + 1;
    end

    // Per-emit captures
    logic [11:0] cap_x       [0:2];
    logic [11:0] cap_y       [0:2];
    logic [5:0]  cap_psm     [0:2];
    logic [31:0] cap_fb_addr [0:2];
    int          cap_idx;

    initial begin
        cap_idx = 0;
        for (int i = 0; i < 3; i = i + 1) begin
            cap_x[i] = 0; cap_y[i] = 0;
            cap_psm[i] = 0; cap_fb_addr[i] = 0;
        end
    end

    always_ff @(posedge clk) begin
        if (rst_n && pixel_emit && cap_idx < 3) begin
            cap_x[cap_idx]       <= pixel_x_q;
            cap_y[cap_idx]       <= pixel_y_q;
            cap_psm[cap_idx]     <= pixel_psm_q;
            cap_fb_addr[cap_idx] <= pixel_fb_addr_q;
            cap_idx              <= cap_idx + 1;
        end
    end

    // Stimulus
    localparam logic [7:0]  CHCR_OFF     = 8'h00;
    localparam logic [7:0]  MADR_OFF     = 8'h10;
    localparam logic [7:0]  QWC_OFF      = 8'h20;
    localparam logic [31:0] PAYLOAD_MADR = 32'h0000_0100;
    localparam int          NUM_QWORDS   = 19;

    task automatic write_dmac(input logic [7:0] offset, input logic [31:0] data);
        @(negedge clk); dmac_reg_wr_en = 1'b1; dmac_reg_offset = offset; dmac_reg_wr_data = data;
        @(negedge clk); dmac_reg_wr_en = 1'b0; dmac_reg_offset = 8'd0; dmac_reg_wr_data = 32'd0;
    endtask

    task automatic preload_qword(input logic [RAM_ADDR_W-1:0] addr,
                                 input logic [127:0] data);
        @(negedge clk); ram_wr_en = 1'b1; ram_wr_addr = addr; ram_wr_data = data; ram_wr_be = 16'hFFFF;
        @(negedge clk); ram_wr_en = 1'b0; ram_wr_addr = '0; ram_wr_data = 128'd0; ram_wr_be = 16'd0;
    endtask

    function automatic logic [127:0] giftag(
        input logic [14:0] nloop, input logic eop,
        input logic [1:0] flg, input logic [3:0] nreg, input logic [63:0] regs);
        logic [63:0] lower;
        lower = {nreg, flg, 42'd0, eop, nloop};
        return {regs, lower};
    endfunction

    function automatic logic [127:0] aplusd_real(input logic [7:0]  reg_num,
                                                 input logic [63:0] data64);
        return {56'd0, reg_num, data64};
    endfunction

    function automatic logic [63:0] xyz2_data(input logic [11:0] x_int,
                                              input logic [11:0] y_int);
        return {32'd0, y_int, 4'd0, x_int, 4'd0};                             // 12.4 fixed-point, sub=0
    endfunction

    localparam logic [7:0] R_PRIM    = 8'h00;
    localparam logic [7:0] R_RGBAQ   = 8'h01;
    localparam logic [7:0] R_XYZ2    = 8'h05;
    localparam logic [7:0] R_FRAME_1 = 8'h4C;

    localparam logic [63:0] PRIM_TRIANGLE = 64'd3;
    // FBP=2, FBW=10, varying PSM
    localparam logic [63:0] FRAME_1_CT32 = 64'h0000_0000_000A_0002;
    localparam logic [63:0] FRAME_1_CT16 = 64'h0000_0000_020A_0002;
    localparam logic [63:0] FRAME_1_T8   = 64'h0000_0000_130A_0002;
    localparam logic [63:0] RGBAQ_VAL    = 64'h0000_0000_FF00_30FF;

    initial begin
        rst_n = 1'b0;
        dmac_reg_wr_en = 1'b0; dmac_reg_offset = 8'd0; dmac_reg_wr_data = 32'd0;
        ram_wr_en = 1'b0; ram_wr_addr = '0; ram_wr_data = 128'd0; ram_wr_be = 16'd0;

        repeat (4) @(posedge clk); rst_n = 1'b1; repeat (8) @(posedge clk);

        begin : preload_block
            logic [RAM_ADDR_W-1:0] addr_q;

            // ---------- Tag1: PSMCT32 TRI, NREG=6 ----------
            addr_q = PAYLOAD_MADR + 32'd0;
            preload_qword(addr_q, giftag(15'd1, 1'b0, 2'd0, 4'd6,
                                         64'h0000_0000_00EE_EEEE));
            addr_q = PAYLOAD_MADR + 32'd16;
            preload_qword(addr_q, aplusd_real(R_PRIM,    PRIM_TRIANGLE));
            addr_q = PAYLOAD_MADR + 32'd32;
            preload_qword(addr_q, aplusd_real(R_FRAME_1, FRAME_1_CT32));
            addr_q = PAYLOAD_MADR + 32'd48;
            preload_qword(addr_q, aplusd_real(R_RGBAQ,   RGBAQ_VAL));
            addr_q = PAYLOAD_MADR + 32'd64;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd100, 12'd80)));
            addr_q = PAYLOAD_MADR + 32'd80;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd200, 12'd150)));
            addr_q = PAYLOAD_MADR + 32'd96;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd320, 12'd240))); // closes

            // ---------- Tag2: PSMCT16 TRI, NREG=5 ----------
            addr_q = PAYLOAD_MADR + 32'd112;
            preload_qword(addr_q, giftag(15'd1, 1'b0, 2'd0, 4'd5,
                                         64'h0000_0000_000E_EEEE));
            addr_q = PAYLOAD_MADR + 32'd128;
            preload_qword(addr_q, aplusd_real(R_PRIM,    PRIM_TRIANGLE));
            addr_q = PAYLOAD_MADR + 32'd144;
            preload_qword(addr_q, aplusd_real(R_FRAME_1, FRAME_1_CT16));
            addr_q = PAYLOAD_MADR + 32'd160;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd50, 12'd40)));
            addr_q = PAYLOAD_MADR + 32'd176;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd100, 12'd75)));
            addr_q = PAYLOAD_MADR + 32'd192;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd200, 12'd100))); // closes

            // ---------- Tag3: PSMT8 TRI, NREG=5 (EOP) ----------
            addr_q = PAYLOAD_MADR + 32'd208;
            preload_qword(addr_q, giftag(15'd1, 1'b1, 2'd0, 4'd5,
                                         64'h0000_0000_000E_EEEE));
            addr_q = PAYLOAD_MADR + 32'd224;
            preload_qword(addr_q, aplusd_real(R_PRIM,    PRIM_TRIANGLE));
            addr_q = PAYLOAD_MADR + 32'd240;
            preload_qword(addr_q, aplusd_real(R_FRAME_1, FRAME_1_T8));
            addr_q = PAYLOAD_MADR + 32'd256;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd50, 12'd40)));
            addr_q = PAYLOAD_MADR + 32'd272;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd100, 12'd75)));
            addr_q = PAYLOAD_MADR + 32'd288;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd200, 12'd100))); // closes
        end

        write_dmac(MADR_OFF, PAYLOAD_MADR);
        write_dmac(QWC_OFF,  NUM_QWORDS);
        write_dmac(CHCR_OFF, 32'h0000_0001);

        wait (dma_done_seen == 1'b1);
        repeat (40) @(posedge clk);

        $display("[tb_ee_core_gif_pixel_emit_psm] dma=(%0d,%0d,%0d)  gif=(tag=%0d,wr=%0d)  gs=(wr=%0d,prim_draw=%0d)  pixel_emit_count=%0d  pulses=%0d",
                 dma_start_count, dma_beat_count, dma_done_count,
                 gif_giftag_count, gif_write_count,
                 gs_write_count, gs_prim_draw_count,
                 pixel_emit_count, pixel_emit_pulse_count);
        for (int i = 0; i < 3; i = i + 1) begin
            $display("[tb_ee_core_gif_pixel_emit_psm] emit[%0d] x=0x%h y=0x%h psm=0x%h fb_addr=0x%h",
                     i, cap_x[i], cap_y[i], cap_psm[i], cap_fb_addr[i]);
        end

        if (dma_start_count != 1)         begin $error("dma_start"); errors = errors + 1; end
        if (dma_beat_count != NUM_QWORDS) begin $error("dma_beat=%0d (expected %0d)", dma_beat_count, NUM_QWORDS); errors = errors + 1; end
        if (gif_giftag_count != 3)        begin $error("gif_giftag=%0d (expected 3)", gif_giftag_count); errors = errors + 1; end
        if (gif_write_count != 16)        begin $error("gif_write=%0d (expected 16: 6+5+5)", gif_write_count); errors = errors + 1; end
        if (gs_prim_draw_count != 3)      begin $error("gs_prim_draw=%0d (expected 3)", gs_prim_draw_count); errors = errors + 1; end
        if (pixel_emit_count != 32'd3)    begin $error("pixel_emit_count=%0d (expected 3)", pixel_emit_count); errors = errors + 1; end
        if (pixel_emit_pulse_count != 3)  begin $error("pixel_emit pulses=%0d (expected 3)", pixel_emit_pulse_count); errors = errors + 1; end

        // emit[0] PSMCT32: same math as Ch82
        if (cap_psm[0]     !== 6'h00)         begin $error("cap_psm[0]=0x%h (expected 0x00 PSMCT32)", cap_psm[0]); errors = errors + 1; end
        if (cap_x[0]       !== 12'h140)       begin $error("cap_x[0]=0x%h", cap_x[0]); errors = errors + 1; end
        if (cap_y[0]       !== 12'h0F0)       begin $error("cap_y[0]=0x%h", cap_y[0]); errors = errors + 1; end
        if (cap_fb_addr[0] !== 32'h0009_7500) begin $error("cap_fb_addr[0]=0x%h (expected 0x97500 — PSMCT32, 4 bytes/pixel)", cap_fb_addr[0]); errors = errors + 1; end

        // emit[1] PSMCT16 — load-bearing: 2 bytes/pixel, fb_addr halved
        if (cap_psm[1]     !== 6'h02)         begin $error("cap_psm[1]=0x%h (expected 0x02 PSMCT16)", cap_psm[1]); errors = errors + 1; end
        if (cap_x[1]       !== 12'h0C8)       begin $error("cap_x[1]=0x%h (expected 0x0C8 = 200)", cap_x[1]); errors = errors + 1; end
        if (cap_y[1]       !== 12'h064)       begin $error("cap_y[1]=0x%h (expected 0x064 = 100)", cap_y[1]); errors = errors + 1; end
        if (cap_fb_addr[1] !== 32'h0002_0590) begin $error("cap_fb_addr[1]=0x%h (expected 0x20590 — PSMCT16, 2 bytes/pixel)", cap_fb_addr[1]); errors = errors + 1; end

        // emit[2] PSMT8 — load-bearing: 1 byte/pixel, fb_addr quartered
        if (cap_psm[2]     !== 6'h13)         begin $error("cap_psm[2]=0x%h (expected 0x13 PSMT8)", cap_psm[2]); errors = errors + 1; end
        if (cap_x[2]       !== 12'h0C8)       begin $error("cap_x[2]=0x%h (expected 0x0C8 = 200)", cap_x[2]); errors = errors + 1; end
        if (cap_y[2]       !== 12'h064)       begin $error("cap_y[2]=0x%h (expected 0x064 = 100)", cap_y[2]); errors = errors + 1; end
        if (cap_fb_addr[2] !== 32'h0001_0AC8) begin $error("cap_fb_addr[2]=0x%h (expected 0x10AC8 — PSMT8, 1 byte/pixel)", cap_fb_addr[2]); errors = errors + 1; end

        if (errors == 0) $display("[tb_ee_core_gif_pixel_emit_psm] PASS");
        else             $display("[tb_ee_core_gif_pixel_emit_psm] FAIL");
        $finish;
    end

    initial begin
        #2000000;
        $error("[tb_ee_core_gif_pixel_emit_psm] timeout");
        $finish;
    end

endmodule : tb_ee_core_gif_pixel_emit_psm
