<?xml version="1.0" encoding="UTF-8"?>
<deploy
 date="2026.05.11.21:03:55"
 outputDirectory="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/">
 <perimeter>
  <parameter
     name="AUTO_GENERATION_ID"
     type="Integer"
     defaultValue="0"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_UNIQUE_ID"
     type="String"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE_FAMILY"
     type="String"
     defaultValue="Agilex 5"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE"
     type="String"
     defaultValue="A5EB013BB23BE4SCS"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_DEVICE_SPEEDGRADE"
     type="String"
     defaultValue="4"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_BOARD"
     type="String"
     defaultValue="default"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_PB_CPU_0_S0_CPU_INFO_ID"
     type="String"
     defaultValue=""
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_CLK_CLOCK_RATE"
     type="Long"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_CLK_CLOCK_DOMAIN"
     type="Integer"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <parameter
     name="AUTO_CLK_RESET_DOMAIN"
     type="Integer"
     defaultValue="-1"
     onHdl="0"
     affectsHdl="1" />
  <interface name="button_pio_external_connection" kind="conduit" start="0">
   <property name="associatedClock" value="" />
   <property name="associatedReset" value="" />
   <property name="prSafe" value="false" />
   <port
       name="button_pio_external_connection_export"
       direction="input"
       role="export"
       width="4" />
  </interface>
  <interface name="button_pio_irq" kind="interrupt" start="0">
   <property
       name="associatedAddressablePoint"
       value="peripheral_subsys.pb_cpu_0_s0" />
   <property name="associatedClock" value="clk" />
   <property name="associatedReset" value="reset" />
   <property name="bridgedReceiverOffset" value="0" />
   <property name="bridgesToReceiver" value="" />
   <property name="irqScheme" value="NONE" />
   <port name="button_pio_irq_irq" direction="output" role="irq" width="1" />
  </interface>
  <interface name="dipsw_pio_external_connection" kind="conduit" start="0">
   <property name="associatedClock" value="" />
   <property name="associatedReset" value="" />
   <property name="prSafe" value="false" />
   <port
       name="dipsw_pio_external_connection_export"
       direction="input"
       role="export"
       width="4" />
  </interface>
  <interface name="dipsw_pio_irq" kind="interrupt" start="0">
   <property
       name="associatedAddressablePoint"
       value="peripheral_subsys.pb_cpu_0_s0" />
   <property name="associatedClock" value="clk" />
   <property name="associatedReset" value="reset" />
   <property name="bridgedReceiverOffset" value="0" />
   <property name="bridgesToReceiver" value="" />
   <property name="irqScheme" value="NONE" />
   <port name="dipsw_pio_irq_irq" direction="output" role="irq" width="1" />
  </interface>
  <interface name="led_pio_external_connection" kind="conduit" start="0">
   <property name="associatedClock" value="" />
   <property name="associatedReset" value="" />
   <property name="prSafe" value="false" />
   <port
       name="led_pio_external_connection_in_port"
       direction="input"
       role="in_port"
       width="3" />
   <port
       name="led_pio_external_connection_out_port"
       direction="output"
       role="out_port"
       width="3" />
  </interface>
  <interface name="pb_cpu_0_s0" kind="avalon" start="0">
   <property name="addressAlignment" value="DYNAMIC" />
   <property name="addressGroup" value="0" />
   <property name="addressSpan" value="131072" />
   <property name="addressUnits" value="SYMBOLS" />
   <property name="alwaysBurstMaxBurst" value="false" />
   <property name="associatedClock" value="clk" />
   <property name="associatedReset" value="reset" />
   <property name="bitsPerSymbol" value="8" />
   <property name="bridgedAddressOffset" value="0" />
   <property name="bridgesToMaster" value="" />
   <property name="burstOnBurstBoundariesOnly" value="false" />
   <property name="burstcountUnits" value="WORDS" />
   <property name="constantBurstBehavior" value="false" />
   <property name="explicitAddressSpan" value="0" />
   <property name="holdTime" value="0" />
   <property name="interleaveBursts" value="false" />
   <property name="isBigEndian" value="false" />
   <property name="isFlash" value="false" />
   <property name="isMemoryDevice" value="false" />
   <property name="isNonVolatileStorage" value="false" />
   <property name="linewrapBursts" value="false" />
   <property name="maximumPendingReadTransactions" value="1" />
   <property name="maximumPendingWriteTransactions" value="0" />
   <property name="minimumReadLatency" value="1" />
   <property name="minimumResponseLatency" value="1" />
   <property name="minimumUninterruptedRunLength" value="1" />
   <property name="prSafe" value="false" />
   <property name="printableDevice" value="false" />
   <property name="readLatency" value="0" />
   <property name="readWaitStates" value="0" />
   <property name="readWaitTime" value="0" />
   <property name="registerIncomingSignals" value="false" />
   <property name="registerOutgoingSignals" value="false" />
   <property name="setupTime" value="0" />
   <property name="timingUnits" value="Cycles" />
   <property name="transparentBridge" value="false" />
   <property name="waitrequestAllowance" value="0" />
   <property name="waitrequestTimeout" value="1024" />
   <property name="wellBehavedWaitrequest" value="false" />
   <property name="writeLatency" value="0" />
   <property name="writeWaitStates" value="0" />
   <property name="writeWaitTime" value="0" />
   <property name="dfhFeatureGuid" value="0" />
   <property name="dfhGroupId" value="0" />
   <property name="dfhParameterId" value="" />
   <property name="dfhParameterName" value="" />
   <property name="dfhParameterVersion" value="" />
   <property name="dfhParameterData" value="" />
   <property name="dfhParameterDataLength" value="" />
   <property name="dfhFeatureMajorVersion" value="0" />
   <property name="dfhFeatureMinorVersion" value="0" />
   <property name="dfhFeatureId" value="35" />
   <property name="dfhFeatureType" value="3" />
   <port
       name="pb_cpu_0_s0_waitrequest"
       direction="output"
       role="waitrequest"
       width="1" />
   <port
       name="pb_cpu_0_s0_readdata"
       direction="output"
       role="readdata"
       width="32" />
   <port
       name="pb_cpu_0_s0_readdatavalid"
       direction="output"
       role="readdatavalid"
       width="1" />
   <port
       name="pb_cpu_0_s0_burstcount"
       direction="input"
       role="burstcount"
       width="1" />
   <port
       name="pb_cpu_0_s0_writedata"
       direction="input"
       role="writedata"
       width="32" />
   <port
       name="pb_cpu_0_s0_address"
       direction="input"
       role="address"
       width="17" />
   <port name="pb_cpu_0_s0_write" direction="input" role="write" width="1" />
   <port name="pb_cpu_0_s0_read" direction="input" role="read" width="1" />
   <port
       name="pb_cpu_0_s0_byteenable"
       direction="input"
       role="byteenable"
       width="4" />
   <port
       name="pb_cpu_0_s0_debugaccess"
       direction="input"
       role="debugaccess"
       width="1" />
  </interface>
  <interface name="clk" kind="clock" start="0">
   <property name="clockRate" value="0" />
   <property name="externallyDriven" value="false" />
   <property name="ptfSchematicName" value="" />
   <port name="clk_clk" direction="input" role="clk" width="1" />
  </interface>
  <interface name="reset" kind="reset" start="0">
   <property name="associatedClock" value="" />
   <property name="synchronousEdges" value="NONE" />
   <port name="reset_reset_n" direction="input" role="reset_n" width="1" />
  </interface>
 </perimeter>
 <entity kind="peripheral_subsys" version="1.0" name="peripheral_subsys">
  <parameter name="AUTO_CLK_CLOCK_RATE" value="-1" />
  <parameter name="AUTO_GENERATION_ID" value="0" />
  <parameter name="AUTO_DEVICE" value="A5EB013BB23BE4SCS" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Agilex 5" />
  <parameter name="AUTO_BOARD" value="default" />
  <parameter name="AUTO_CLK_RESET_DOMAIN" value="-1" />
  <parameter name="AUTO_PB_CPU_0_S0_CPU_INFO_ID" value="" />
  <parameter name="AUTO_CLK_CLOCK_DOMAIN" value="-1" />
  <parameter name="AUTO_UNIQUE_ID" value="" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="4" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/synth/peripheral_subsys.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/synth/peripheral_subsys.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys.qsys" />
  </sourceFiles>
  <childSourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
  </childSourceFiles>
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: button_pio"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: dipsw_pio"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: led_pio"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: pb_cpu_0"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: periph_clk"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: periph_rst_in"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: sysid"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_mm_interconnect_1920_553jo7i"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_master_translator_193_lgcew2q"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_slave_translator_191_xg7rzxi"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_master_agent_1940_r3ep6da"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_slave_agent_1930_jxauz3i"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_avalon_sc_fifo_1932_22gxxgi"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_router_1921_iesulwy"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_router_1921_wxl7gvy"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_traffic_limiter_1922_y23fybq"</message>
   <message level="Info" culprit="my_altera_avalon_sc_fifo_dest_id_fifo">"Generating: my_altera_avalon_sc_fifo_dest_id_fifo"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_1922_25262sa"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_avalon_sc_fifo_1932_22gxxgi"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_demultiplexer_1921_uppfuvi"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_multiplexer_1922_ufdjdoq"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_demultiplexer_1921_4xqokvi"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_multiplexer_1922_cbyifnq"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: altera_reset_controller"</message>
  </messages>
 </entity>
 <entity kind="altera_generic_component" version="1.0" name="button_pio">
  <parameter
     name="cpuHashInfo"
     value="&lt;cpuHashInfoDefinition&gt;
    &lt;cpuHashInfoMap/&gt;
&lt;/cpuHashInfoDefinition&gt;" />
  <parameter name="hlsFile" value="" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Agilex 5" />
  <parameter name="DEVICE_FAMILY" value="Agilex 5" />
  <parameter
     name="defaultBoundary"
     value="&lt;boundaryDefinition&gt;
    &lt;interfaces&gt;
        &lt;interface&gt;
            &lt;name&gt;clk&lt;/name&gt;
            &lt;type&gt;clock&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;clk&lt;/name&gt;
                    &lt;role&gt;clk&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;clockRate&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;externallyDriven&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;ptfSchematicName&lt;/key&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;reset&lt;/name&gt;
            &lt;type&gt;reset&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;reset_n&lt;/name&gt;
                    &lt;role&gt;reset_n&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;synchronousEdges&lt;/key&gt;
                        &lt;value&gt;DEASSERT&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;s1&lt;/name&gt;
            &lt;type&gt;avalon&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;address&lt;/name&gt;
                    &lt;role&gt;address&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;2&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;write_n&lt;/name&gt;
                    &lt;role&gt;write_n&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;writedata&lt;/name&gt;
                    &lt;role&gt;writedata&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;32&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;chipselect&lt;/name&gt;
                    &lt;role&gt;chipselect&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;readdata&lt;/name&gt;
                    &lt;role&gt;readdata&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;32&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/assignmentValueMap&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressAlignment&lt;/key&gt;
                        &lt;value&gt;NATIVE&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressGroup&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressSpan&lt;/key&gt;
                        &lt;value&gt;4&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressUnits&lt;/key&gt;
                        &lt;value&gt;WORDS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedReset&lt;/key&gt;
                        &lt;value&gt;reset&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                        &lt;value&gt;8&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgesToMaster&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstcountUnits&lt;/key&gt;
                        &lt;value&gt;WORDS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;holdTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;interleaveBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isBigEndian&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isFlash&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isMemoryDevice&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;linewrapBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumReadLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;prSafe&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;printableDevice&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readLatency&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readWaitStates&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readWaitTime&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;setupTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;timingUnits&lt;/key&gt;
                        &lt;value&gt;Cycles&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;transparentBridge&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                        &lt;value&gt;1024&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeLatency&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeWaitStates&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeWaitTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureGuid&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhGroupId&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterId&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterName&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterVersion&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterData&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterDataLength&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureMajorVersion&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureMinorVersion&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureId&lt;/key&gt;
                        &lt;value&gt;35&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureType&lt;/key&gt;
                        &lt;value&gt;3&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
            &lt;cmsisInfo&gt;
                &lt;cmsisSrcFileContents&gt;&amp;lt;?xml version=&quot;1.0&quot; encoding=&quot;utf-8&quot;?&amp;gt;    
&amp;lt;device schemaVersion=&quot;1.1&quot; xmlns:xs=&quot;http://www.w3.org/2001/XMLSchema-instance&quot; xs:noNamespaceSchemaLocation=&quot;CMSIS-SVD_Schema_1_1.xsd&quot; &amp;gt;
  &amp;lt;peripherals&amp;gt;
   &amp;lt;peripheral&amp;gt;
      &amp;lt;name&amp;gt;altera_avalon_pio&amp;lt;/name&amp;gt;&amp;lt;baseAddress&amp;gt;0x00000000&amp;lt;/baseAddress&amp;gt; 
      &amp;lt;addressBlock&amp;gt;
        &amp;lt;offset&amp;gt;0x0&amp;lt;/offset&amp;gt;
        &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
        &amp;lt;usage&amp;gt;registers&amp;lt;/usage&amp;gt;
      &amp;lt;/addressBlock&amp;gt;
      &amp;lt;registers&amp;gt;
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;DATA&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Data&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;Reading from data returns the value present at the input ports. If the PIO core hardware is configured in output-only mode, reading from data returns an undefined value. Writing to data stores the value to a register that drives the output ports. If the PIO core hardware is configured in input-only mode, writing to data has no effect. If the PIO core hardware is in bidirectional mode, the registered value appears on an output port only when the corresponding bit in the direction register is set to 1 (output).&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x0&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;data&amp;lt;/name&amp;gt;
           &amp;lt;description&amp;gt;Reads: Data value currently on PIO inputs. Writes: New value to drive on PIO outputs.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;DIRECTION&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Direction&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;The direction register controls the data direction for each PIO port, assuming the port is bidirectional. When bit n in direction is set to 1, port n drives out the value in the corresponding bit of the data register The direction register only exists when the PIO core hardware is configured in bidirectional mode. The mode (input, output, or bidirectional) is specified at system generation time, and cannot be changed at runtime. In input-only or output-only mode, the direction register does not exist. In this case, reading direction returns an undefined value, writing direction has no effect. After reset, all bits of direction are 0, so that all bidirectional I/O ports are configured as inputs. If those PIO ports are connected to device pins, the pins are held in a high-impedance state. In bi-directional mode, to change the direction of the PIO port, reprogram the direction register.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x4&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;direction&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Individual direction control for each I/O port. A value of 0 sets the direction to input; 1 sets the direction to output.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;IRQ_MASK&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Interrupt mask&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;Setting a bit in the interruptmask register to 1 enables interrupts for the corresponding PIO input port. Interrupt behavior depends on the hardware configuration of the PIO core. The interruptmask register only exists when the hardware is configured to generate IRQs. If the core cannot generate IRQs, reading interruptmask returns an undefined value, and writing to interruptmask has no effect. After reset, all bits of interruptmask are zero, so that interrupts are disabled for all PIO ports.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x8&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;interruptmask&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;IRQ enable/disable for each input port. Setting a bit to 1 enables interrupts for the corresponding port.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;EDGE_CAP&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Edge capture&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;Bit n in the edgecapture register is set to 1 whenever an edge is detected on input port n. An Avalon-MM master peripheral can read the edgecapture register to determine if an edge has occurred on any of the PIO input ports. If the option Enable bit-clearing for edge capture register is turned off, writing any value to the edgecapture register clears all bits in the register. Otherwise, writing a 1 to a particular bit in the register clears only that bit. The type of edge(s) to detect is fixed in hardware at system generation time. The edgecapture register only exists when the hardware is configured to capture edges. If the core is not configured to capture edges, reading from edgecapture returns an undefined value, and writing to edgecapture has no effect.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0xc&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;edgecapture&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Edge detection for each input port.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;
         &amp;lt;name&amp;gt;SET_BIT&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Outset&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;You can use the outset register to set individual bits of the output port. For example, to set bit 6 of the output port, write 0x40 to the outset register. This register is only present when the option Enable individual bit set/clear output register is turned on.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x10&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;outset&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Specifies which bit of the output port to set.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;CLEAR_BITS&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Outclear&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;You can use the outclear register to clear individual bits of the output port. For example, writing 0x08 to the outclear register clears bit 3 of the output port. This register is only present when the option Enable individual bit set/clear output register is turned on.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x14&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;outclear&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Specifies which output bit to clear.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt;            
    &amp;lt;/registers&amp;gt;
   &amp;lt;/peripheral&amp;gt;
  &amp;lt;/peripherals&amp;gt;
&amp;lt;/device&amp;gt; &lt;/cmsisSrcFileContents&gt;
                &lt;addressGroup&gt;&lt;/addressGroup&gt;
                &lt;cmsisVars/&gt;
            &lt;/cmsisInfo&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;external_connection&lt;/name&gt;
            &lt;type&gt;conduit&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;in_port&lt;/name&gt;
                    &lt;role&gt;export&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;4&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedReset&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;prSafe&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;irq&lt;/name&gt;
            &lt;type&gt;interrupt&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;irq&lt;/name&gt;
                    &lt;role&gt;irq&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.dts.irq.tx_type&lt;/key&gt;
                        &lt;value&gt;RISING_EDGE&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/assignmentValueMap&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedAddressablePoint&lt;/key&gt;
                        &lt;value&gt;button_pio.s1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedReset&lt;/key&gt;
                        &lt;value&gt;reset&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgedReceiverOffset&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgesToReceiver&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;irqScheme&lt;/key&gt;
                        &lt;value&gt;NONE&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
    &lt;/interfaces&gt;
&lt;/boundaryDefinition&gt;" />
  <parameter name="bspCpu" value="false" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_n&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;s1&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;2&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;write_n&lt;/name&gt;
                        &lt;role&gt;write_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;chipselect&lt;/name&gt;
                        &lt;role&gt;chipselect&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;NATIVE&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;4&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                            &lt;value&gt;1024&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureGuid&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhGroupId&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterId&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterName&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterVersion&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterData&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterDataLength&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureMajorVersion&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureMinorVersion&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureId&lt;/key&gt;
                            &lt;value&gt;35&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureType&lt;/key&gt;
                            &lt;value&gt;3&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;external_connection&lt;/name&gt;
                &lt;type&gt;conduit&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;in_port&lt;/name&gt;
                        &lt;role&gt;export&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;irq&lt;/name&gt;
                &lt;type&gt;interrupt&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;irq&lt;/name&gt;
                        &lt;role&gt;irq&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.dts.irq.tx_type&lt;/key&gt;
                            &lt;value&gt;RISING_EDGE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedAddressablePoint&lt;/key&gt;
                            &lt;value&gt;button_pio.s1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedReceiverOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToReceiver&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;irqScheme&lt;/key&gt;
                            &lt;value&gt;NONE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_avalon_pio&lt;/className&gt;
        &lt;version&gt;19.2.3&lt;/version&gt;
        &lt;displayName&gt;PIO (Parallel I/O) Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;DEVICE_FAMILY&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE_FAMILY&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;0&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;clockRate&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;100000000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;s1&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;s1&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;s1&apos; start=&apos;0x0&apos; end=&apos;0x10&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;4&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="cpuInfo" value="" />
  <parameter name="clockRate" value="100000000" />
  <parameter name="logicalView" value="ip/peripheral_subsys/button_pio.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.CAPTURE&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DATA_WIDTH&lt;/key&gt;
            &lt;value&gt;4&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DO_TEST_BENCH_WIRING&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DRIVEN_SIM_VALUE&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.EDGE_TYPE&lt;/key&gt;
            &lt;value&gt;FALLING&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.FREQ&lt;/key&gt;
            &lt;value&gt;100000000&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_IN&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_OUT&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_TRI&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.IRQ_TYPE&lt;/key&gt;
            &lt;value&gt;EDGE&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.RESET_VALUE&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.compatible&lt;/key&gt;
            &lt;value&gt;altr,pio-1.0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.group&lt;/key&gt;
            &lt;value&gt;gpio&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.name&lt;/key&gt;
            &lt;value&gt;pio&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,gpio-bank-width&lt;/key&gt;
            &lt;value&gt;4&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,interrupt-type&lt;/key&gt;
            &lt;value&gt;2&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,interrupt_type&lt;/key&gt;
            &lt;value&gt;2&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.edge_type&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.level_trigger&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.resetvalue&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.vendor&lt;/key&gt;
            &lt;value&gt;altr&lt;/value&gt;
        &lt;/entry&gt;
    &lt;/assignmentValueMap&gt;
&lt;/assignmentDefinition&gt;" />
  <parameter name="transformParameters" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="A5EB013BB23BE4SCS" />
  <parameter
     name="hdlParameters"
     value="&lt;hdlParameterDescriptorDefinitionList/&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;button_pio&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;QUARTUS_SYNTH&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;button_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VERILOG&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;button_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;button_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;button_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;button_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter name="liveModuleName" value="altera_avalon_pio_inst" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="peripheral_subsys" as="button_pio" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: button_pio"</message>
  </messages>
 </entity>
 <entity kind="altera_generic_component" version="1.0" name="dipsw_pio">
  <parameter
     name="cpuHashInfo"
     value="&lt;cpuHashInfoDefinition&gt;
    &lt;cpuHashInfoMap/&gt;
&lt;/cpuHashInfoDefinition&gt;" />
  <parameter name="hlsFile" value="" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Agilex 5" />
  <parameter name="DEVICE_FAMILY" value="Agilex 5" />
  <parameter
     name="defaultBoundary"
     value="&lt;boundaryDefinition&gt;
    &lt;interfaces&gt;
        &lt;interface&gt;
            &lt;name&gt;clk&lt;/name&gt;
            &lt;type&gt;clock&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;clk&lt;/name&gt;
                    &lt;role&gt;clk&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;clockRate&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;externallyDriven&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;ptfSchematicName&lt;/key&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;reset&lt;/name&gt;
            &lt;type&gt;reset&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;reset_n&lt;/name&gt;
                    &lt;role&gt;reset_n&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;synchronousEdges&lt;/key&gt;
                        &lt;value&gt;DEASSERT&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;s1&lt;/name&gt;
            &lt;type&gt;avalon&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;address&lt;/name&gt;
                    &lt;role&gt;address&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;2&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;write_n&lt;/name&gt;
                    &lt;role&gt;write_n&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;writedata&lt;/name&gt;
                    &lt;role&gt;writedata&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;32&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;chipselect&lt;/name&gt;
                    &lt;role&gt;chipselect&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;readdata&lt;/name&gt;
                    &lt;role&gt;readdata&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;32&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/assignmentValueMap&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressAlignment&lt;/key&gt;
                        &lt;value&gt;NATIVE&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressGroup&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressSpan&lt;/key&gt;
                        &lt;value&gt;4&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressUnits&lt;/key&gt;
                        &lt;value&gt;WORDS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedReset&lt;/key&gt;
                        &lt;value&gt;reset&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                        &lt;value&gt;8&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgesToMaster&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstcountUnits&lt;/key&gt;
                        &lt;value&gt;WORDS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;holdTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;interleaveBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isBigEndian&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isFlash&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isMemoryDevice&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;linewrapBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumReadLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;prSafe&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;printableDevice&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readLatency&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readWaitStates&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readWaitTime&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;setupTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;timingUnits&lt;/key&gt;
                        &lt;value&gt;Cycles&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;transparentBridge&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                        &lt;value&gt;1024&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeLatency&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeWaitStates&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeWaitTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureGuid&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhGroupId&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterId&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterName&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterVersion&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterData&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterDataLength&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureMajorVersion&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureMinorVersion&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureId&lt;/key&gt;
                        &lt;value&gt;35&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureType&lt;/key&gt;
                        &lt;value&gt;3&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
            &lt;cmsisInfo&gt;
                &lt;cmsisSrcFileContents&gt;&amp;lt;?xml version=&quot;1.0&quot; encoding=&quot;utf-8&quot;?&amp;gt;    
&amp;lt;device schemaVersion=&quot;1.1&quot; xmlns:xs=&quot;http://www.w3.org/2001/XMLSchema-instance&quot; xs:noNamespaceSchemaLocation=&quot;CMSIS-SVD_Schema_1_1.xsd&quot; &amp;gt;
  &amp;lt;peripherals&amp;gt;
   &amp;lt;peripheral&amp;gt;
      &amp;lt;name&amp;gt;altera_avalon_pio&amp;lt;/name&amp;gt;&amp;lt;baseAddress&amp;gt;0x00000000&amp;lt;/baseAddress&amp;gt; 
      &amp;lt;addressBlock&amp;gt;
        &amp;lt;offset&amp;gt;0x0&amp;lt;/offset&amp;gt;
        &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
        &amp;lt;usage&amp;gt;registers&amp;lt;/usage&amp;gt;
      &amp;lt;/addressBlock&amp;gt;
      &amp;lt;registers&amp;gt;
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;DATA&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Data&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;Reading from data returns the value present at the input ports. If the PIO core hardware is configured in output-only mode, reading from data returns an undefined value. Writing to data stores the value to a register that drives the output ports. If the PIO core hardware is configured in input-only mode, writing to data has no effect. If the PIO core hardware is in bidirectional mode, the registered value appears on an output port only when the corresponding bit in the direction register is set to 1 (output).&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x0&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;data&amp;lt;/name&amp;gt;
           &amp;lt;description&amp;gt;Reads: Data value currently on PIO inputs. Writes: New value to drive on PIO outputs.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;DIRECTION&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Direction&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;The direction register controls the data direction for each PIO port, assuming the port is bidirectional. When bit n in direction is set to 1, port n drives out the value in the corresponding bit of the data register The direction register only exists when the PIO core hardware is configured in bidirectional mode. The mode (input, output, or bidirectional) is specified at system generation time, and cannot be changed at runtime. In input-only or output-only mode, the direction register does not exist. In this case, reading direction returns an undefined value, writing direction has no effect. After reset, all bits of direction are 0, so that all bidirectional I/O ports are configured as inputs. If those PIO ports are connected to device pins, the pins are held in a high-impedance state. In bi-directional mode, to change the direction of the PIO port, reprogram the direction register.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x4&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;direction&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Individual direction control for each I/O port. A value of 0 sets the direction to input; 1 sets the direction to output.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;IRQ_MASK&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Interrupt mask&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;Setting a bit in the interruptmask register to 1 enables interrupts for the corresponding PIO input port. Interrupt behavior depends on the hardware configuration of the PIO core. The interruptmask register only exists when the hardware is configured to generate IRQs. If the core cannot generate IRQs, reading interruptmask returns an undefined value, and writing to interruptmask has no effect. After reset, all bits of interruptmask are zero, so that interrupts are disabled for all PIO ports.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x8&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;interruptmask&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;IRQ enable/disable for each input port. Setting a bit to 1 enables interrupts for the corresponding port.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;EDGE_CAP&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Edge capture&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;Bit n in the edgecapture register is set to 1 whenever an edge is detected on input port n. An Avalon-MM master peripheral can read the edgecapture register to determine if an edge has occurred on any of the PIO input ports. If the option Enable bit-clearing for edge capture register is turned off, writing any value to the edgecapture register clears all bits in the register. Otherwise, writing a 1 to a particular bit in the register clears only that bit. The type of edge(s) to detect is fixed in hardware at system generation time. The edgecapture register only exists when the hardware is configured to capture edges. If the core is not configured to capture edges, reading from edgecapture returns an undefined value, and writing to edgecapture has no effect.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0xc&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;edgecapture&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Edge detection for each input port.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;
         &amp;lt;name&amp;gt;SET_BIT&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Outset&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;You can use the outset register to set individual bits of the output port. For example, to set bit 6 of the output port, write 0x40 to the outset register. This register is only present when the option Enable individual bit set/clear output register is turned on.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x10&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;outset&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Specifies which bit of the output port to set.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;CLEAR_BITS&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Outclear&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;You can use the outclear register to clear individual bits of the output port. For example, writing 0x08 to the outclear register clears bit 3 of the output port. This register is only present when the option Enable individual bit set/clear output register is turned on.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x14&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;outclear&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Specifies which output bit to clear.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt;            
    &amp;lt;/registers&amp;gt;
   &amp;lt;/peripheral&amp;gt;
  &amp;lt;/peripherals&amp;gt;
&amp;lt;/device&amp;gt; &lt;/cmsisSrcFileContents&gt;
                &lt;addressGroup&gt;&lt;/addressGroup&gt;
                &lt;cmsisVars/&gt;
            &lt;/cmsisInfo&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;external_connection&lt;/name&gt;
            &lt;type&gt;conduit&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;in_port&lt;/name&gt;
                    &lt;role&gt;export&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;4&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedReset&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;prSafe&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;irq&lt;/name&gt;
            &lt;type&gt;interrupt&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;irq&lt;/name&gt;
                    &lt;role&gt;irq&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.dts.irq.tx_type&lt;/key&gt;
                        &lt;value&gt;RISING_EDGE&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/assignmentValueMap&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedAddressablePoint&lt;/key&gt;
                        &lt;value&gt;dipsw_pio.s1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedReset&lt;/key&gt;
                        &lt;value&gt;reset&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgedReceiverOffset&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgesToReceiver&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;irqScheme&lt;/key&gt;
                        &lt;value&gt;NONE&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
    &lt;/interfaces&gt;
&lt;/boundaryDefinition&gt;" />
  <parameter name="bspCpu" value="false" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_n&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;s1&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;2&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;write_n&lt;/name&gt;
                        &lt;role&gt;write_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;chipselect&lt;/name&gt;
                        &lt;role&gt;chipselect&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;NATIVE&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;4&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                            &lt;value&gt;1024&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureGuid&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhGroupId&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterId&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterName&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterVersion&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterData&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterDataLength&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureMajorVersion&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureMinorVersion&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureId&lt;/key&gt;
                            &lt;value&gt;35&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureType&lt;/key&gt;
                            &lt;value&gt;3&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;external_connection&lt;/name&gt;
                &lt;type&gt;conduit&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;in_port&lt;/name&gt;
                        &lt;role&gt;export&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;irq&lt;/name&gt;
                &lt;type&gt;interrupt&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;irq&lt;/name&gt;
                        &lt;role&gt;irq&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.dts.irq.tx_type&lt;/key&gt;
                            &lt;value&gt;RISING_EDGE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedAddressablePoint&lt;/key&gt;
                            &lt;value&gt;dipsw_pio.s1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedReceiverOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToReceiver&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;irqScheme&lt;/key&gt;
                            &lt;value&gt;NONE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_avalon_pio&lt;/className&gt;
        &lt;version&gt;19.2.3&lt;/version&gt;
        &lt;displayName&gt;PIO (Parallel I/O) Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;DEVICE_FAMILY&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE_FAMILY&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;0&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;clockRate&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;100000000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;s1&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;s1&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;s1&apos; start=&apos;0x0&apos; end=&apos;0x10&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;4&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="cpuInfo" value="" />
  <parameter name="clockRate" value="100000000" />
  <parameter name="logicalView" value="ip/peripheral_subsys/dipsw_pio.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.CAPTURE&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DATA_WIDTH&lt;/key&gt;
            &lt;value&gt;4&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DO_TEST_BENCH_WIRING&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DRIVEN_SIM_VALUE&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.EDGE_TYPE&lt;/key&gt;
            &lt;value&gt;FALLING&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.FREQ&lt;/key&gt;
            &lt;value&gt;100000000&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_IN&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_OUT&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_TRI&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.IRQ_TYPE&lt;/key&gt;
            &lt;value&gt;EDGE&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.RESET_VALUE&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.compatible&lt;/key&gt;
            &lt;value&gt;altr,pio-1.0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.group&lt;/key&gt;
            &lt;value&gt;gpio&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.name&lt;/key&gt;
            &lt;value&gt;pio&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,gpio-bank-width&lt;/key&gt;
            &lt;value&gt;4&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,interrupt-type&lt;/key&gt;
            &lt;value&gt;2&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,interrupt_type&lt;/key&gt;
            &lt;value&gt;2&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.edge_type&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.level_trigger&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.resetvalue&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.vendor&lt;/key&gt;
            &lt;value&gt;altr&lt;/value&gt;
        &lt;/entry&gt;
    &lt;/assignmentValueMap&gt;
&lt;/assignmentDefinition&gt;" />
  <parameter name="transformParameters" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="A5EB013BB23BE4SCS" />
  <parameter
     name="hdlParameters"
     value="&lt;hdlParameterDescriptorDefinitionList/&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;dipsw_pio&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;QUARTUS_SYNTH&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;dipsw_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VERILOG&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;dipsw_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;dipsw_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;dipsw_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;dipsw_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter name="liveModuleName" value="altera_avalon_pio_inst" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="peripheral_subsys" as="dipsw_pio" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: dipsw_pio"</message>
  </messages>
 </entity>
 <entity kind="altera_generic_component" version="1.0" name="led_pio">
  <parameter
     name="cpuHashInfo"
     value="&lt;cpuHashInfoDefinition&gt;
    &lt;cpuHashInfoMap/&gt;
&lt;/cpuHashInfoDefinition&gt;" />
  <parameter name="hlsFile" value="" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Agilex 5" />
  <parameter name="DEVICE_FAMILY" value="Agilex 5" />
  <parameter
     name="defaultBoundary"
     value="&lt;boundaryDefinition&gt;
    &lt;interfaces&gt;
        &lt;interface&gt;
            &lt;name&gt;clk&lt;/name&gt;
            &lt;type&gt;clock&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;clk&lt;/name&gt;
                    &lt;role&gt;clk&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;clockRate&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;externallyDriven&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;ptfSchematicName&lt;/key&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;reset&lt;/name&gt;
            &lt;type&gt;reset&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;reset_n&lt;/name&gt;
                    &lt;role&gt;reset_n&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;synchronousEdges&lt;/key&gt;
                        &lt;value&gt;DEASSERT&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;s1&lt;/name&gt;
            &lt;type&gt;avalon&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;address&lt;/name&gt;
                    &lt;role&gt;address&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;2&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;write_n&lt;/name&gt;
                    &lt;role&gt;write_n&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;writedata&lt;/name&gt;
                    &lt;role&gt;writedata&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;32&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;chipselect&lt;/name&gt;
                    &lt;role&gt;chipselect&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;readdata&lt;/name&gt;
                    &lt;role&gt;readdata&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;32&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/assignmentValueMap&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressAlignment&lt;/key&gt;
                        &lt;value&gt;NATIVE&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressGroup&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressSpan&lt;/key&gt;
                        &lt;value&gt;4&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressUnits&lt;/key&gt;
                        &lt;value&gt;WORDS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedReset&lt;/key&gt;
                        &lt;value&gt;reset&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                        &lt;value&gt;8&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgesToMaster&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstcountUnits&lt;/key&gt;
                        &lt;value&gt;WORDS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;holdTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;interleaveBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isBigEndian&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isFlash&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isMemoryDevice&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;linewrapBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumReadLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;prSafe&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;printableDevice&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readLatency&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readWaitStates&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readWaitTime&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;setupTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;timingUnits&lt;/key&gt;
                        &lt;value&gt;Cycles&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;transparentBridge&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                        &lt;value&gt;1024&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeLatency&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeWaitStates&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeWaitTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureGuid&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhGroupId&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterId&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterName&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterVersion&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterData&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterDataLength&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureMajorVersion&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureMinorVersion&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureId&lt;/key&gt;
                        &lt;value&gt;35&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureType&lt;/key&gt;
                        &lt;value&gt;3&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
            &lt;cmsisInfo&gt;
                &lt;cmsisSrcFileContents&gt;&amp;lt;?xml version=&quot;1.0&quot; encoding=&quot;utf-8&quot;?&amp;gt;    
&amp;lt;device schemaVersion=&quot;1.1&quot; xmlns:xs=&quot;http://www.w3.org/2001/XMLSchema-instance&quot; xs:noNamespaceSchemaLocation=&quot;CMSIS-SVD_Schema_1_1.xsd&quot; &amp;gt;
  &amp;lt;peripherals&amp;gt;
   &amp;lt;peripheral&amp;gt;
      &amp;lt;name&amp;gt;altera_avalon_pio&amp;lt;/name&amp;gt;&amp;lt;baseAddress&amp;gt;0x00000000&amp;lt;/baseAddress&amp;gt; 
      &amp;lt;addressBlock&amp;gt;
        &amp;lt;offset&amp;gt;0x0&amp;lt;/offset&amp;gt;
        &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
        &amp;lt;usage&amp;gt;registers&amp;lt;/usage&amp;gt;
      &amp;lt;/addressBlock&amp;gt;
      &amp;lt;registers&amp;gt;
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;DATA&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Data&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;Reading from data returns the value present at the input ports. If the PIO core hardware is configured in output-only mode, reading from data returns an undefined value. Writing to data stores the value to a register that drives the output ports. If the PIO core hardware is configured in input-only mode, writing to data has no effect. If the PIO core hardware is in bidirectional mode, the registered value appears on an output port only when the corresponding bit in the direction register is set to 1 (output).&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x0&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;data&amp;lt;/name&amp;gt;
           &amp;lt;description&amp;gt;Reads: Data value currently on PIO inputs. Writes: New value to drive on PIO outputs.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;DIRECTION&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Direction&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;The direction register controls the data direction for each PIO port, assuming the port is bidirectional. When bit n in direction is set to 1, port n drives out the value in the corresponding bit of the data register The direction register only exists when the PIO core hardware is configured in bidirectional mode. The mode (input, output, or bidirectional) is specified at system generation time, and cannot be changed at runtime. In input-only or output-only mode, the direction register does not exist. In this case, reading direction returns an undefined value, writing direction has no effect. After reset, all bits of direction are 0, so that all bidirectional I/O ports are configured as inputs. If those PIO ports are connected to device pins, the pins are held in a high-impedance state. In bi-directional mode, to change the direction of the PIO port, reprogram the direction register.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x4&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;direction&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Individual direction control for each I/O port. A value of 0 sets the direction to input; 1 sets the direction to output.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;IRQ_MASK&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Interrupt mask&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;Setting a bit in the interruptmask register to 1 enables interrupts for the corresponding PIO input port. Interrupt behavior depends on the hardware configuration of the PIO core. The interruptmask register only exists when the hardware is configured to generate IRQs. If the core cannot generate IRQs, reading interruptmask returns an undefined value, and writing to interruptmask has no effect. After reset, all bits of interruptmask are zero, so that interrupts are disabled for all PIO ports.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x8&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;interruptmask&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;IRQ enable/disable for each input port. Setting a bit to 1 enables interrupts for the corresponding port.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;EDGE_CAP&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Edge capture&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;Bit n in the edgecapture register is set to 1 whenever an edge is detected on input port n. An Avalon-MM master peripheral can read the edgecapture register to determine if an edge has occurred on any of the PIO input ports. If the option Enable bit-clearing for edge capture register is turned off, writing any value to the edgecapture register clears all bits in the register. Otherwise, writing a 1 to a particular bit in the register clears only that bit. The type of edge(s) to detect is fixed in hardware at system generation time. The edgecapture register only exists when the hardware is configured to capture edges. If the core is not configured to capture edges, reading from edgecapture returns an undefined value, and writing to edgecapture has no effect.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0xc&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;edgecapture&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Edge detection for each input port.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-write&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;
         &amp;lt;name&amp;gt;SET_BIT&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Outset&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;You can use the outset register to set individual bits of the output port. For example, to set bit 6 of the output port, write 0x40 to the outset register. This register is only present when the option Enable individual bit set/clear output register is turned on.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x10&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;outset&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Specifies which bit of the output port to set.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;CLEAR_BITS&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Outclear&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;You can use the outclear register to clear individual bits of the output port. For example, writing 0x08 to the outclear register clears bit 3 of the output port. This register is only present when the option Enable individual bit set/clear output register is turned on.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x14&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;0x0&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;outclear&amp;lt;/name&amp;gt;
            &amp;lt;description&amp;gt;Specifies which output bit to clear.&amp;lt;/description&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;write-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt;            
    &amp;lt;/registers&amp;gt;
   &amp;lt;/peripheral&amp;gt;
  &amp;lt;/peripherals&amp;gt;
&amp;lt;/device&amp;gt; &lt;/cmsisSrcFileContents&gt;
                &lt;addressGroup&gt;&lt;/addressGroup&gt;
                &lt;cmsisVars/&gt;
            &lt;/cmsisInfo&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;external_connection&lt;/name&gt;
            &lt;type&gt;conduit&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;in_port&lt;/name&gt;
                    &lt;role&gt;in_port&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;3&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;out_port&lt;/name&gt;
                    &lt;role&gt;out_port&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;3&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedReset&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;prSafe&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
    &lt;/interfaces&gt;
&lt;/boundaryDefinition&gt;" />
  <parameter name="bspCpu" value="false" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_n&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;s1&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;2&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;write_n&lt;/name&gt;
                        &lt;role&gt;write_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;chipselect&lt;/name&gt;
                        &lt;role&gt;chipselect&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;NATIVE&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;4&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                            &lt;value&gt;1024&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureGuid&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhGroupId&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterId&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterName&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterVersion&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterData&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterDataLength&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureMajorVersion&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureMinorVersion&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureId&lt;/key&gt;
                            &lt;value&gt;35&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureType&lt;/key&gt;
                            &lt;value&gt;3&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;external_connection&lt;/name&gt;
                &lt;type&gt;conduit&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;in_port&lt;/name&gt;
                        &lt;role&gt;in_port&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;3&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;out_port&lt;/name&gt;
                        &lt;role&gt;out_port&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;3&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_avalon_pio&lt;/className&gt;
        &lt;version&gt;19.2.3&lt;/version&gt;
        &lt;displayName&gt;PIO (Parallel I/O) Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;DEVICE_FAMILY&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.String&lt;/parameterType&gt;
                &lt;systemInfotype&gt;DEVICE_FAMILY&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;0&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;clockRate&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;100000000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;s1&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;s1&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;s1&apos; start=&apos;0x0&apos; end=&apos;0x10&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;4&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="cpuInfo" value="" />
  <parameter name="clockRate" value="100000000" />
  <parameter name="logicalView" value="ip/peripheral_subsys/led_pio.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.CAPTURE&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DATA_WIDTH&lt;/key&gt;
            &lt;value&gt;3&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DO_TEST_BENCH_WIRING&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.DRIVEN_SIM_VALUE&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.EDGE_TYPE&lt;/key&gt;
            &lt;value&gt;NONE&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.FREQ&lt;/key&gt;
            &lt;value&gt;100000000&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_IN&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_OUT&lt;/key&gt;
            &lt;value&gt;1&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.HAS_TRI&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.IRQ_TYPE&lt;/key&gt;
            &lt;value&gt;NONE&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.RESET_VALUE&lt;/key&gt;
            &lt;value&gt;7&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.compatible&lt;/key&gt;
            &lt;value&gt;altr,pio-1.0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.group&lt;/key&gt;
            &lt;value&gt;gpio&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.name&lt;/key&gt;
            &lt;value&gt;pio&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.altr,gpio-bank-width&lt;/key&gt;
            &lt;value&gt;3&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.resetvalue&lt;/key&gt;
            &lt;value&gt;7&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.vendor&lt;/key&gt;
            &lt;value&gt;altr&lt;/value&gt;
        &lt;/entry&gt;
    &lt;/assignmentValueMap&gt;
&lt;/assignmentDefinition&gt;" />
  <parameter name="transformParameters" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="A5EB013BB23BE4SCS" />
  <parameter
     name="hdlParameters"
     value="&lt;hdlParameterDescriptorDefinitionList/&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;led_pio&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;QUARTUS_SYNTH&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;led_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VERILOG&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;led_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;led_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;led_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;led_pio&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter name="liveModuleName" value="altera_avalon_pio_inst" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="peripheral_subsys" as="led_pio" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: led_pio"</message>
  </messages>
 </entity>
 <entity kind="altera_generic_component" version="1.0" name="pb_cpu_0">
  <parameter
     name="cpuHashInfo"
     value="&lt;cpuHashInfoDefinition&gt;
    &lt;cpuHashInfoMap/&gt;
&lt;/cpuHashInfoDefinition&gt;" />
  <parameter name="hlsFile" value="" />
  <parameter name="SYSINFO_ADDR_WIDTH" value="17" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Agilex 5" />
  <parameter
     name="defaultBoundary"
     value="&lt;boundaryDefinition&gt;
    &lt;interfaces&gt;
        &lt;interface&gt;
            &lt;name&gt;clk&lt;/name&gt;
            &lt;type&gt;clock&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;clk&lt;/name&gt;
                    &lt;role&gt;clk&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;clockRate&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;externallyDriven&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;ptfSchematicName&lt;/key&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;reset&lt;/name&gt;
            &lt;type&gt;reset&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;reset&lt;/name&gt;
                    &lt;role&gt;reset&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;synchronousEdges&lt;/key&gt;
                        &lt;value&gt;DEASSERT&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;s0&lt;/name&gt;
            &lt;type&gt;avalon&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;s0_waitrequest&lt;/name&gt;
                    &lt;role&gt;waitrequest&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;s0_readdata&lt;/name&gt;
                    &lt;role&gt;readdata&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;32&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;s0_readdatavalid&lt;/name&gt;
                    &lt;role&gt;readdatavalid&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;s0_burstcount&lt;/name&gt;
                    &lt;role&gt;burstcount&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;s0_writedata&lt;/name&gt;
                    &lt;role&gt;writedata&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;32&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;s0_address&lt;/name&gt;
                    &lt;role&gt;address&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;17&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;s0_write&lt;/name&gt;
                    &lt;role&gt;write&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;s0_read&lt;/name&gt;
                    &lt;role&gt;read&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;s0_byteenable&lt;/name&gt;
                    &lt;role&gt;byteenable&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;4&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;s0_debugaccess&lt;/name&gt;
                    &lt;role&gt;debugaccess&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/assignmentValueMap&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressAlignment&lt;/key&gt;
                        &lt;value&gt;DYNAMIC&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressGroup&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressSpan&lt;/key&gt;
                        &lt;value&gt;131072&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressUnits&lt;/key&gt;
                        &lt;value&gt;SYMBOLS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedReset&lt;/key&gt;
                        &lt;value&gt;reset&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                        &lt;value&gt;8&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;value&gt;pb_cpu_0.m0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstcountUnits&lt;/key&gt;
                        &lt;value&gt;WORDS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;holdTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;interleaveBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isBigEndian&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isFlash&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isMemoryDevice&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;linewrapBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumReadLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;prSafe&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;printableDevice&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readLatency&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readWaitStates&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readWaitTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;setupTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;timingUnits&lt;/key&gt;
                        &lt;value&gt;Cycles&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;transparentBridge&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                        &lt;value&gt;1024&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeLatency&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeWaitStates&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeWaitTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureGuid&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhGroupId&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterId&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterName&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterVersion&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterData&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterDataLength&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureMajorVersion&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureMinorVersion&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureId&lt;/key&gt;
                        &lt;value&gt;35&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureType&lt;/key&gt;
                        &lt;value&gt;3&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;m0&lt;/name&gt;
            &lt;type&gt;avalon&lt;/type&gt;
            &lt;isStart&gt;true&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;m0_waitrequest&lt;/name&gt;
                    &lt;role&gt;waitrequest&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;m0_readdata&lt;/name&gt;
                    &lt;role&gt;readdata&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;32&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;m0_readdatavalid&lt;/name&gt;
                    &lt;role&gt;readdatavalid&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;m0_burstcount&lt;/name&gt;
                    &lt;role&gt;burstcount&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;m0_writedata&lt;/name&gt;
                    &lt;role&gt;writedata&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;32&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;m0_address&lt;/name&gt;
                    &lt;role&gt;address&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;17&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;m0_write&lt;/name&gt;
                    &lt;role&gt;write&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;m0_read&lt;/name&gt;
                    &lt;role&gt;read&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;m0_byteenable&lt;/name&gt;
                    &lt;role&gt;byteenable&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;4&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;m0_debugaccess&lt;/name&gt;
                    &lt;role&gt;debugaccess&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;adaptsTo&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressGroup&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressUnits&lt;/key&gt;
                        &lt;value&gt;SYMBOLS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedReset&lt;/key&gt;
                        &lt;value&gt;reset&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                        &lt;value&gt;8&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstcountUnits&lt;/key&gt;
                        &lt;value&gt;WORDS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dBSBigEndian&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;doStreamReads&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;doStreamWrites&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;holdTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;interleaveBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isAsynchronous&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isBigEndian&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isReadable&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isWriteable&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;linewrapBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maxAddressWidth&lt;/key&gt;
                        &lt;value&gt;32&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumReadLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;prSafe&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readLatency&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readWaitTime&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;setupTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;timingUnits&lt;/key&gt;
                        &lt;value&gt;Cycles&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                        &lt;value&gt;1024&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeWaitTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;enableConcurrentSubordinateAccess&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
    &lt;/interfaces&gt;
&lt;/boundaryDefinition&gt;" />
  <parameter name="bspCpu" value="false" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset&lt;/name&gt;
                        &lt;role&gt;reset&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;s0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;17&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;s0_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;131072&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                            &lt;value&gt;pb_cpu_0.m0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                            &lt;value&gt;1024&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureGuid&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhGroupId&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterId&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterName&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterVersion&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterData&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterDataLength&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureMajorVersion&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureMinorVersion&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureId&lt;/key&gt;
                            &lt;value&gt;35&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureType&lt;/key&gt;
                            &lt;value&gt;3&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;m0&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_waitrequest&lt;/name&gt;
                        &lt;role&gt;waitrequest&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_readdatavalid&lt;/name&gt;
                        &lt;role&gt;readdatavalid&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_burstcount&lt;/name&gt;
                        &lt;role&gt;burstcount&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_writedata&lt;/name&gt;
                        &lt;role&gt;writedata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;17&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_write&lt;/name&gt;
                        &lt;role&gt;write&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_read&lt;/name&gt;
                        &lt;role&gt;read&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_byteenable&lt;/name&gt;
                        &lt;role&gt;byteenable&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;4&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;m0_debugaccess&lt;/name&gt;
                        &lt;role&gt;debugaccess&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;adaptsTo&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;SYMBOLS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dBSBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamReads&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;doStreamWrites&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isAsynchronous&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isReadable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isWriteable&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maxAddressWidth&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                            &lt;value&gt;1024&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;enableConcurrentSubordinateAccess&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;optimizedReadsWithBE&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_avalon_mm_bridge&lt;/className&gt;
        &lt;version&gt;20.1.0&lt;/version&gt;
        &lt;displayName&gt;Avalon Memory Mapped Pipeline Bridge Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;10&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;SYSINFO_ADDR_WIDTH&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;m0&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;ADDRESS_WIDTH&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;m0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;m0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;17&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;s0&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;s0&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="cpuInfo" value="" />
  <parameter name="logicalView" value="ip/peripheral_subsys/pb_cpu_0.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <parameter name="transformParameters" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="A5EB013BB23BE4SCS" />
  <parameter
     name="hdlParameters"
     value="&lt;hdlParameterDescriptorDefinitionList&gt;
    &lt;hdlParameterDescriptorDefinition&gt;
        &lt;description&gt;Bridge data width&lt;/description&gt;
        &lt;enabled&gt;true&lt;/enabled&gt;
        &lt;exported&gt;false&lt;/exported&gt;
        &lt;parameterHdlType&gt;INTEGER&lt;/parameterHdlType&gt;
        &lt;parameterName&gt;DATA_WIDTH&lt;/parameterName&gt;
        &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
        &lt;parameterValue&gt;32&lt;/parameterValue&gt;
    &lt;/hdlParameterDescriptorDefinition&gt;
    &lt;hdlParameterDescriptorDefinition&gt;
        &lt;description&gt;Symbol (byte) width&lt;/description&gt;
        &lt;enabled&gt;true&lt;/enabled&gt;
        &lt;exported&gt;false&lt;/exported&gt;
        &lt;parameterHdlType&gt;INTEGER&lt;/parameterHdlType&gt;
        &lt;parameterName&gt;SYMBOL_WIDTH&lt;/parameterName&gt;
        &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
        &lt;parameterValue&gt;8&lt;/parameterValue&gt;
    &lt;/hdlParameterDescriptorDefinition&gt;
    &lt;hdlParameterDescriptorDefinition&gt;
        &lt;enabled&gt;true&lt;/enabled&gt;
        &lt;exported&gt;false&lt;/exported&gt;
        &lt;parameterHdlType&gt;INTEGER&lt;/parameterHdlType&gt;
        &lt;parameterName&gt;HDL_ADDR_WIDTH&lt;/parameterName&gt;
        &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
        &lt;parameterValue&gt;17&lt;/parameterValue&gt;
    &lt;/hdlParameterDescriptorDefinition&gt;
    &lt;hdlParameterDescriptorDefinition&gt;
        &lt;description&gt;Bridge burstcount width&lt;/description&gt;
        &lt;enabled&gt;true&lt;/enabled&gt;
        &lt;exported&gt;false&lt;/exported&gt;
        &lt;parameterHdlType&gt;INTEGER&lt;/parameterHdlType&gt;
        &lt;parameterName&gt;BURSTCOUNT_WIDTH&lt;/parameterName&gt;
        &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
        &lt;parameterValue&gt;1&lt;/parameterValue&gt;
    &lt;/hdlParameterDescriptorDefinition&gt;
    &lt;hdlParameterDescriptorDefinition&gt;
        &lt;description&gt;When enabled, the command (or response) networks are pipelined, potentially increasing the frequency at the expense of increase logic and latency.&lt;/description&gt;
        &lt;enabled&gt;true&lt;/enabled&gt;
        &lt;exported&gt;false&lt;/exported&gt;
        &lt;parameterHdlType&gt;INTEGER&lt;/parameterHdlType&gt;
        &lt;parameterName&gt;PIPELINE_COMMAND&lt;/parameterName&gt;
        &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
        &lt;parameterValue&gt;1&lt;/parameterValue&gt;
    &lt;/hdlParameterDescriptorDefinition&gt;
    &lt;hdlParameterDescriptorDefinition&gt;
        &lt;description&gt;When enabled, the command (or response) networks are pipelined, potentially increasing the frequency at the expense of increase logic and latency.&lt;/description&gt;
        &lt;enabled&gt;true&lt;/enabled&gt;
        &lt;exported&gt;false&lt;/exported&gt;
        &lt;parameterHdlType&gt;INTEGER&lt;/parameterHdlType&gt;
        &lt;parameterName&gt;PIPELINE_RESPONSE&lt;/parameterName&gt;
        &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
        &lt;parameterValue&gt;1&lt;/parameterValue&gt;
    &lt;/hdlParameterDescriptorDefinition&gt;
    &lt;hdlParameterDescriptorDefinition&gt;
        &lt;description&gt;0 means allows asynchronous resets, 1 means internal reset synchronization &lt;/description&gt;
        &lt;enabled&gt;true&lt;/enabled&gt;
        &lt;exported&gt;false&lt;/exported&gt;
        &lt;parameterHdlType&gt;INTEGER&lt;/parameterHdlType&gt;
        &lt;parameterName&gt;SYNC_RESET&lt;/parameterName&gt;
        &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
        &lt;parameterValue&gt;0&lt;/parameterValue&gt;
    &lt;/hdlParameterDescriptorDefinition&gt;
    &lt;hdlParameterDescriptorDefinition&gt;
        &lt;description&gt;0 means writeresponsvalid is disabled, 1 means writeresponsevalid is enabled &lt;/description&gt;
        &lt;enabled&gt;true&lt;/enabled&gt;
        &lt;exported&gt;false&lt;/exported&gt;
        &lt;parameterHdlType&gt;INTEGER&lt;/parameterHdlType&gt;
        &lt;parameterName&gt;USE_WRITERESPONSE&lt;/parameterName&gt;
        &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
        &lt;parameterValue&gt;0&lt;/parameterValue&gt;
    &lt;/hdlParameterDescriptorDefinition&gt;
    &lt;hdlParameterDescriptorDefinition&gt;
        &lt;enabled&gt;true&lt;/enabled&gt;
        &lt;exported&gt;false&lt;/exported&gt;
        &lt;parameterHdlType&gt;INTEGER&lt;/parameterHdlType&gt;
        &lt;parameterName&gt;S0_WAITREQUEST_ALLOWANCE&lt;/parameterName&gt;
        &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
        &lt;parameterValue&gt;0&lt;/parameterValue&gt;
    &lt;/hdlParameterDescriptorDefinition&gt;
    &lt;hdlParameterDescriptorDefinition&gt;
        &lt;enabled&gt;true&lt;/enabled&gt;
        &lt;exported&gt;false&lt;/exported&gt;
        &lt;parameterHdlType&gt;INTEGER&lt;/parameterHdlType&gt;
        &lt;parameterName&gt;M0_WAITREQUEST_ALLOWANCE&lt;/parameterName&gt;
        &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
        &lt;parameterValue&gt;0&lt;/parameterValue&gt;
    &lt;/hdlParameterDescriptorDefinition&gt;
&lt;/hdlParameterDescriptorDefinitionList&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;pb_cpu_0&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;QUARTUS_SYNTH&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;pb_cpu_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VERILOG&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;pb_cpu_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;pb_cpu_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;pb_cpu_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;pb_cpu_0&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter name="liveModuleName" value="altera_avalon_mm_bridge_inst" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="peripheral_subsys" as="pb_cpu_0" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: pb_cpu_0"</message>
  </messages>
 </entity>
 <entity kind="altera_generic_component" version="1.0" name="periph_clk">
  <parameter
     name="cpuHashInfo"
     value="&lt;cpuHashInfoDefinition&gt;
    &lt;cpuHashInfoMap/&gt;
&lt;/cpuHashInfoDefinition&gt;" />
  <parameter name="hlsFile" value="" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Agilex 5" />
  <parameter
     name="defaultBoundary"
     value="&lt;boundaryDefinition&gt;
    &lt;interfaces&gt;
        &lt;interface&gt;
            &lt;name&gt;in_clk&lt;/name&gt;
            &lt;type&gt;clock&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;in_clk&lt;/name&gt;
                    &lt;role&gt;clk&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;clockRate&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;externallyDriven&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;ptfSchematicName&lt;/key&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;out_clk&lt;/name&gt;
            &lt;type&gt;clock&lt;/type&gt;
            &lt;isStart&gt;true&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;out_clk&lt;/name&gt;
                    &lt;role&gt;clk&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedDirectClock&lt;/key&gt;
                        &lt;value&gt;in_clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;clockRate&lt;/key&gt;
                        &lt;value&gt;100000000&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;clockRateKnown&lt;/key&gt;
                        &lt;value&gt;true&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;externallyDriven&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;ptfSchematicName&lt;/key&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
    &lt;/interfaces&gt;
&lt;/boundaryDefinition&gt;" />
  <parameter name="bspCpu" value="false" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;in_clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;in_clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;out_clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;out_clk&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedDirectClock&lt;/key&gt;
                            &lt;value&gt;in_clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;100000000&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRateKnown&lt;/key&gt;
                            &lt;value&gt;true&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_clock_bridge&lt;/className&gt;
        &lt;version&gt;19.2.0&lt;/version&gt;
        &lt;displayName&gt;Clock Bridge Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;0&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;DERIVED_CLOCK_RATE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;in_clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;in_clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;in_clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos/&gt;
                    &lt;consumedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;100000000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/consumedSystemInfos&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
            &lt;entry&gt;
                &lt;key&gt;out_clk&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;out_clk&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;CLOCK_RATE&lt;/key&gt;
                            &lt;value&gt;100000000&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="DERIVED_CLOCK_RATE" value="100000000" />
  <parameter name="cpuInfo" value="" />
  <parameter name="logicalView" value="ip/peripheral_subsys/periph_clk.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <parameter name="transformParameters" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="A5EB013BB23BE4SCS" />
  <parameter
     name="hdlParameters"
     value="&lt;hdlParameterDescriptorDefinitionList/&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;periph_clk&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;QUARTUS_SYNTH&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;periph_clk&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VERILOG&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;periph_clk&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;periph_clk&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;periph_clk&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;periph_clk&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter name="liveModuleName" value="altera_clock_bridge_inst" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="peripheral_subsys" as="periph_clk" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: periph_clk"</message>
  </messages>
 </entity>
 <entity kind="altera_generic_component" version="1.0" name="periph_rst_in">
  <parameter
     name="cpuHashInfo"
     value="&lt;cpuHashInfoDefinition&gt;
    &lt;cpuHashInfoMap/&gt;
&lt;/cpuHashInfoDefinition&gt;" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="-1" />
  <parameter name="hlsFile" value="" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Agilex 5" />
  <parameter
     name="defaultBoundary"
     value="&lt;boundaryDefinition&gt;
    &lt;interfaces&gt;
        &lt;interface&gt;
            &lt;name&gt;in_reset&lt;/name&gt;
            &lt;type&gt;reset&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;in_reset_n&lt;/name&gt;
                    &lt;role&gt;reset_n&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;synchronousEdges&lt;/key&gt;
                        &lt;value&gt;NONE&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;out_reset&lt;/name&gt;
            &lt;type&gt;reset&lt;/type&gt;
            &lt;isStart&gt;true&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;out_reset_n&lt;/name&gt;
                    &lt;role&gt;reset_n&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedDirectReset&lt;/key&gt;
                        &lt;value&gt;in_reset&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedResetSinks&lt;/key&gt;
                        &lt;value&gt;in_reset&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;synchronousEdges&lt;/key&gt;
                        &lt;value&gt;NONE&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
    &lt;/interfaces&gt;
&lt;/boundaryDefinition&gt;" />
  <parameter name="bspCpu" value="false" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;in_reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;in_reset_n&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;NONE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;out_reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;true&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;out_reset_n&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedDirectReset&lt;/key&gt;
                            &lt;value&gt;in_reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedResetSinks&lt;/key&gt;
                            &lt;value&gt;in_reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;NONE&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_reset_bridge&lt;/className&gt;
        &lt;version&gt;19.2.0&lt;/version&gt;
        &lt;displayName&gt;Reset Bridge Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;-1&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;AUTO_CLK_CLOCK_RATE&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Long&lt;/parameterType&gt;
                &lt;systemInfoArgs&gt;clk&lt;/systemInfoArgs&gt;
                &lt;systemInfotype&gt;CLOCK_RATE&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos/&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="cpuInfo" value="" />
  <parameter name="logicalView" value="ip/peripheral_subsys/periph_rst_in.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap/&gt;
&lt;/assignmentDefinition&gt;" />
  <parameter name="transformParameters" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="A5EB013BB23BE4SCS" />
  <parameter
     name="hdlParameters"
     value="&lt;hdlParameterDescriptorDefinitionList/&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;periph_rst_in&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;QUARTUS_SYNTH&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;periph_rst_in&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VERILOG&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;periph_rst_in&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;periph_rst_in&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;periph_rst_in&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;periph_rst_in&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter name="liveModuleName" value="altera_reset_bridge_inst" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="peripheral_subsys" as="periph_rst_in" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: periph_rst_in"</message>
  </messages>
 </entity>
 <entity kind="altera_generic_component" version="1.0" name="sysid">
  <parameter
     name="cpuHashInfo"
     value="&lt;cpuHashInfoDefinition&gt;
    &lt;cpuHashInfoMap/&gt;
&lt;/cpuHashInfoDefinition&gt;" />
  <parameter name="hlsFile" value="" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Agilex 5" />
  <parameter
     name="defaultBoundary"
     value="&lt;boundaryDefinition&gt;
    &lt;interfaces&gt;
        &lt;interface&gt;
            &lt;name&gt;clk&lt;/name&gt;
            &lt;type&gt;clock&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;clock&lt;/name&gt;
                    &lt;role&gt;clk&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;clockRate&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;externallyDriven&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;ptfSchematicName&lt;/key&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;reset&lt;/name&gt;
            &lt;type&gt;reset&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;reset_n&lt;/name&gt;
                    &lt;role&gt;reset_n&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap/&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;synchronousEdges&lt;/key&gt;
                        &lt;value&gt;DEASSERT&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
        &lt;/interface&gt;
        &lt;interface&gt;
            &lt;name&gt;control_slave&lt;/name&gt;
            &lt;type&gt;avalon&lt;/type&gt;
            &lt;isStart&gt;false&lt;/isStart&gt;
            &lt;ports&gt;
                &lt;port&gt;
                    &lt;name&gt;readdata&lt;/name&gt;
                    &lt;role&gt;readdata&lt;/role&gt;
                    &lt;direction&gt;Output&lt;/direction&gt;
                    &lt;width&gt;32&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
                &lt;port&gt;
                    &lt;name&gt;address&lt;/name&gt;
                    &lt;role&gt;address&lt;/role&gt;
                    &lt;direction&gt;Input&lt;/direction&gt;
                    &lt;width&gt;1&lt;/width&gt;
                    &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                    &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                    &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                &lt;/port&gt;
            &lt;/ports&gt;
            &lt;assignments&gt;
                &lt;assignmentValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/assignmentValueMap&gt;
            &lt;/assignments&gt;
            &lt;parameters&gt;
                &lt;parameterValueMap&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressAlignment&lt;/key&gt;
                        &lt;value&gt;DYNAMIC&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressGroup&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressSpan&lt;/key&gt;
                        &lt;value&gt;8&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;addressUnits&lt;/key&gt;
                        &lt;value&gt;WORDS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedClock&lt;/key&gt;
                        &lt;value&gt;clk&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;associatedReset&lt;/key&gt;
                        &lt;value&gt;reset&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                        &lt;value&gt;8&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;bridgesToMaster&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;burstcountUnits&lt;/key&gt;
                        &lt;value&gt;WORDS&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;holdTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;interleaveBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isBigEndian&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isFlash&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isMemoryDevice&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;linewrapBursts&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumReadLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;prSafe&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;printableDevice&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readLatency&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readWaitStates&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;readWaitTime&lt;/key&gt;
                        &lt;value&gt;1&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;setupTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;timingUnits&lt;/key&gt;
                        &lt;value&gt;Cycles&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;transparentBridge&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                        &lt;value&gt;1024&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                        &lt;value&gt;false&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeLatency&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeWaitStates&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;writeWaitTime&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureGuid&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhGroupId&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterId&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterName&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterVersion&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterData&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhParameterDataLength&lt;/key&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureMajorVersion&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureMinorVersion&lt;/key&gt;
                        &lt;value&gt;0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureId&lt;/key&gt;
                        &lt;value&gt;35&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;dfhFeatureType&lt;/key&gt;
                        &lt;value&gt;3&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/parameterValueMap&gt;
            &lt;/parameters&gt;
            &lt;cmsisInfo&gt;
                &lt;cmsisSrcFileContents&gt;&amp;lt;?xml version=&quot;1.0&quot; encoding=&quot;utf-8&quot;?&amp;gt;    
&amp;lt;device schemaVersion=&quot;1.1&quot; xmlns:xs=&quot;http://www.w3.org/2001/XMLSchema-instance&quot; xs:noNamespaceSchemaLocation=&quot;CMSIS-SVD_Schema_1_1.xsd&quot; &amp;gt;
  &amp;lt;peripherals&amp;gt;
    &amp;lt;peripheral&amp;gt;
      &amp;lt;name&amp;gt;altera_avalon_sysid&amp;lt;/name&amp;gt;&amp;lt;baseAddress&amp;gt;0x00000000&amp;lt;/baseAddress&amp;gt; 
      &amp;lt;addressBlock&amp;gt;
        &amp;lt;offset&amp;gt;0x0&amp;lt;/offset&amp;gt;
        &amp;lt;size&amp;gt;8&amp;lt;/size&amp;gt;
        &amp;lt;usage&amp;gt;registers&amp;lt;/usage&amp;gt;
      &amp;lt;/addressBlock&amp;gt;
      &amp;lt;registers&amp;gt;
        &amp;lt;register&amp;gt;     
         &amp;lt;name&amp;gt;ID&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;System ID&amp;lt;/displayName&amp;gt;
            &amp;lt;description&amp;gt;A unique 32-bit value that is based on the contents of the QSys system. The id is similar to a check-sum value; QSys systems with different components, different configuration options, or both, produce different id values.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x0&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-only&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;${sysid_id_value}&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;id&amp;lt;/name&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt; 
        &amp;lt;register&amp;gt;
         &amp;lt;name&amp;gt;TIMESTAMP&amp;lt;/name&amp;gt;  
         &amp;lt;displayName&amp;gt;Time stamp&amp;lt;/displayName&amp;gt;
         &amp;lt;description&amp;gt;A unique 32-bit value that is based on the system generation time. The value is equivalent to the number of seconds after Jan. 1, 1970.&amp;lt;/description&amp;gt;
         &amp;lt;addressOffset&amp;gt;0x4&amp;lt;/addressOffset&amp;gt;
         &amp;lt;size&amp;gt;32&amp;lt;/size&amp;gt;
         &amp;lt;access&amp;gt;read-only&amp;lt;/access&amp;gt;
         &amp;lt;resetValue&amp;gt;${sysid_timestamp_value}&amp;lt;/resetValue&amp;gt;
         &amp;lt;resetMask&amp;gt;0xffffffff&amp;lt;/resetMask&amp;gt; 
         &amp;lt;fields&amp;gt;
           &amp;lt;field&amp;gt;&amp;lt;name&amp;gt;timestamp&amp;lt;/name&amp;gt;
            &amp;lt;bitOffset&amp;gt;0x0&amp;lt;/bitOffset&amp;gt;
            &amp;lt;bitWidth&amp;gt;32&amp;lt;/bitWidth&amp;gt;
            &amp;lt;access&amp;gt;read-only&amp;lt;/access&amp;gt;
        &amp;lt;/field&amp;gt;
       &amp;lt;/fields&amp;gt;
     &amp;lt;/register&amp;gt;            
    &amp;lt;/registers&amp;gt;
   &amp;lt;/peripheral&amp;gt;
  &amp;lt;/peripherals&amp;gt;
&amp;lt;/device&amp;gt; &lt;/cmsisSrcFileContents&gt;
                &lt;addressGroup&gt;&lt;/addressGroup&gt;
                &lt;cmsisVars&gt;
                    &lt;entry&gt;
                        &lt;key&gt;sysid_timestamp_value&lt;/key&gt;
                        &lt;value&gt;0x0&lt;/value&gt;
                    &lt;/entry&gt;
                    &lt;entry&gt;
                        &lt;key&gt;sysid_id_value&lt;/key&gt;
                        &lt;value&gt;0xacd5cafe&lt;/value&gt;
                    &lt;/entry&gt;
                &lt;/cmsisVars&gt;
            &lt;/cmsisInfo&gt;
        &lt;/interface&gt;
    &lt;/interfaces&gt;
&lt;/boundaryDefinition&gt;" />
  <parameter name="bspCpu" value="false" />
  <parameter
     name="componentDefinition"
     value="&lt;componentDefinition&gt;
    &lt;boundary&gt;
        &lt;interfaces&gt;
            &lt;interface&gt;
                &lt;name&gt;clk&lt;/name&gt;
                &lt;type&gt;clock&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;clock&lt;/name&gt;
                        &lt;role&gt;clk&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;clockRate&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;externallyDriven&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ptfSchematicName&lt;/key&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;reset&lt;/name&gt;
                &lt;type&gt;reset&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;reset_n&lt;/name&gt;
                        &lt;role&gt;reset_n&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap/&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;synchronousEdges&lt;/key&gt;
                            &lt;value&gt;DEASSERT&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
            &lt;interface&gt;
                &lt;name&gt;control_slave&lt;/name&gt;
                &lt;type&gt;avalon&lt;/type&gt;
                &lt;isStart&gt;false&lt;/isStart&gt;
                &lt;ports&gt;
                    &lt;port&gt;
                        &lt;name&gt;readdata&lt;/name&gt;
                        &lt;role&gt;readdata&lt;/role&gt;
                        &lt;direction&gt;Output&lt;/direction&gt;
                        &lt;width&gt;32&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC_VECTOR&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                    &lt;port&gt;
                        &lt;name&gt;address&lt;/name&gt;
                        &lt;role&gt;address&lt;/role&gt;
                        &lt;direction&gt;Input&lt;/direction&gt;
                        &lt;width&gt;1&lt;/width&gt;
                        &lt;lowerBound&gt;0&lt;/lowerBound&gt;
                        &lt;vhdlType&gt;STD_LOGIC&lt;/vhdlType&gt;
                        &lt;terminationValue&gt;0&lt;/terminationValue&gt;
                    &lt;/port&gt;
                &lt;/ports&gt;
                &lt;assignments&gt;
                    &lt;assignmentValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isFlash&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;embeddedsw.configuration.isPrintableDevice&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/assignmentValueMap&gt;
                &lt;/assignments&gt;
                &lt;parameters&gt;
                    &lt;parameterValueMap&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressAlignment&lt;/key&gt;
                            &lt;value&gt;DYNAMIC&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressGroup&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressSpan&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;addressUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;alwaysBurstMaxBurst&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedClock&lt;/key&gt;
                            &lt;value&gt;clk&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;associatedReset&lt;/key&gt;
                            &lt;value&gt;reset&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bitsPerSymbol&lt;/key&gt;
                            &lt;value&gt;8&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgedAddressOffset&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;bridgesToMaster&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstOnBurstBoundariesOnly&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;burstcountUnits&lt;/key&gt;
                            &lt;value&gt;WORDS&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;constantBurstBehavior&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;explicitAddressSpan&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;holdTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;interleaveBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isBigEndian&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isFlash&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isMemoryDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;isNonVolatileStorage&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;linewrapBursts&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingReadTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;maximumPendingWriteTransactions&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumReadLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumResponseLatency&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;minimumUninterruptedRunLength&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;prSafe&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;printableDevice&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitStates&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;readWaitTime&lt;/key&gt;
                            &lt;value&gt;1&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerIncomingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;registerOutgoingSignals&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;setupTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;timingUnits&lt;/key&gt;
                            &lt;value&gt;Cycles&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;transparentBridge&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestAllowance&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;waitrequestTimeout&lt;/key&gt;
                            &lt;value&gt;1024&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;wellBehavedWaitrequest&lt;/key&gt;
                            &lt;value&gt;false&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeLatency&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitStates&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;writeWaitTime&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureGuid&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhGroupId&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterId&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterName&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterVersion&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterData&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhParameterDataLength&lt;/key&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureMajorVersion&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureMinorVersion&lt;/key&gt;
                            &lt;value&gt;0&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureId&lt;/key&gt;
                            &lt;value&gt;35&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;dfhFeatureType&lt;/key&gt;
                            &lt;value&gt;3&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/parameterValueMap&gt;
                &lt;/parameters&gt;
            &lt;/interface&gt;
        &lt;/interfaces&gt;
    &lt;/boundary&gt;
    &lt;originalModuleInfo&gt;
        &lt;className&gt;altera_avalon_sysid_qsys&lt;/className&gt;
        &lt;version&gt;19.1.7&lt;/version&gt;
        &lt;displayName&gt;System ID Peripheral Intel FPGA IP&lt;/displayName&gt;
    &lt;/originalModuleInfo&gt;
    &lt;systemInfoParameterDescriptors&gt;
        &lt;descriptors&gt;
            &lt;descriptor&gt;
                &lt;parameterDefaultValue&gt;0&lt;/parameterDefaultValue&gt;
                &lt;parameterName&gt;TIMESTAMP&lt;/parameterName&gt;
                &lt;parameterType&gt;java.lang.Integer&lt;/parameterType&gt;
                &lt;systemInfotype&gt;GENERATION_ID&lt;/systemInfotype&gt;
            &lt;/descriptor&gt;
        &lt;/descriptors&gt;
    &lt;/systemInfoParameterDescriptors&gt;
    &lt;systemInfos&gt;
        &lt;connPtSystemInfos&gt;
            &lt;entry&gt;
                &lt;key&gt;control_slave&lt;/key&gt;
                &lt;value&gt;
                    &lt;connectionPointName&gt;control_slave&lt;/connectionPointName&gt;
                    &lt;suppliedSystemInfos&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_MAP&lt;/key&gt;
                            &lt;value&gt;&amp;lt;address-map&amp;gt;&amp;lt;slave name=&apos;control_slave&apos; start=&apos;0x0&apos; end=&apos;0x8&apos; datawidth=&apos;32&apos; /&amp;gt;&amp;lt;/address-map&amp;gt;&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;ADDRESS_WIDTH&lt;/key&gt;
                            &lt;value&gt;3&lt;/value&gt;
                        &lt;/entry&gt;
                        &lt;entry&gt;
                            &lt;key&gt;MAX_SLAVE_DATA_WIDTH&lt;/key&gt;
                            &lt;value&gt;32&lt;/value&gt;
                        &lt;/entry&gt;
                    &lt;/suppliedSystemInfos&gt;
                    &lt;consumedSystemInfos/&gt;
                &lt;/value&gt;
            &lt;/entry&gt;
        &lt;/connPtSystemInfos&gt;
    &lt;/systemInfos&gt;
&lt;/componentDefinition&gt;" />
  <parameter name="cpuInfo" value="" />
  <parameter name="logicalView" value="ip/peripheral_subsys/sysid.ip" />
  <parameter
     name="moduleAssignmentDefinition"
     value="&lt;assignmentDefinition&gt;
    &lt;assignmentValueMap&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.ID&lt;/key&gt;
            &lt;value&gt;-1395275010&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.CMacro.TIMESTAMP&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.compatible&lt;/key&gt;
            &lt;value&gt;altr,sysid-1.0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.group&lt;/key&gt;
            &lt;value&gt;sysid&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.name&lt;/key&gt;
            &lt;value&gt;sysid&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.id&lt;/key&gt;
            &lt;value&gt;-1395275010&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.params.timestamp&lt;/key&gt;
            &lt;value&gt;0&lt;/value&gt;
        &lt;/entry&gt;
        &lt;entry&gt;
            &lt;key&gt;embeddedsw.dts.vendor&lt;/key&gt;
            &lt;value&gt;altr&lt;/value&gt;
        &lt;/entry&gt;
    &lt;/assignmentValueMap&gt;
&lt;/assignmentDefinition&gt;" />
  <parameter name="transformParameters" value="" />
  <parameter name="svInterfaceDefinition" value="" />
  <parameter name="AUTO_DEVICE" value="A5EB013BB23BE4SCS" />
  <parameter name="TIMESTAMP" value="0" />
  <parameter
     name="hdlParameters"
     value="&lt;hdlParameterDescriptorDefinitionList/&gt;" />
  <parameter
     name="generationInfoDefinition"
     value="&lt;generationInfoDefinition&gt;
    &lt;hdlLibraryName&gt;sysid&lt;/hdlLibraryName&gt;
    &lt;fileSets&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;QUARTUS_SYNTH&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;sysid&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;QUARTUS_SYNTH&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VERILOG&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;sysid&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VERILOG&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;SIM_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;sysid&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;SIM_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;sysid&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
        &lt;fileSet&gt;
            &lt;fileSetName&gt;CDC_VHDL&lt;/fileSetName&gt;
            &lt;fileSetFixedName&gt;sysid&lt;/fileSetFixedName&gt;
            &lt;fileSetKind&gt;CDC_VHDL&lt;/fileSetKind&gt;
            &lt;fileSetFiles/&gt;
            &lt;fileSetFileChangeDefs/&gt;
        &lt;/fileSet&gt;
    &lt;/fileSets&gt;
&lt;/generationInfoDefinition&gt;" />
  <parameter name="liveModuleName" value="altera_avalon_sysid_qsys_inst" />
  <generatedFiles/>
  <childGeneratedFiles/>
  <sourceFiles/>
  <childSourceFiles/>
  <instantiator instantiator="peripheral_subsys" as="sysid" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: sysid"</message>
  </messages>
 </entity>
 <entity
   kind="altera_mm_interconnect"
   version="19.2.0"
   name="peripheral_subsys_altera_mm_interconnect_1920_553jo7i">
  <parameter name="AUTO_DEVICE" value="A5EB013BB23BE4SCS" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Agilex 5" />
  <parameter name="AUTO_BOARD" value="default" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="" />
  <parameter
     name="COMPOSE_CONTENTS"
     value="add_instance {pb_cpu_0_m0_translator} {altera_merlin_master_translator};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_ADDRESS_W} {17};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_DATA_W} {32};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {pb_cpu_0_m0_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {pb_cpu_0_m0_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_READLATENCY} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_READDATA} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_READ} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_WRITE} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_ADDRESS} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_CLKEN} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_LOCK} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {SYNC_RESET} {1};set_instance_parameter_value {pb_cpu_0_m0_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {pb_cpu_0_m0_translator} {OPTIMIZED_READS_WITH_BE} {0};add_instance {sysid_control_slave_translator} {altera_merlin_slave_translator};set_instance_parameter_value {sysid_control_slave_translator} {AV_ADDRESS_W} {1};set_instance_parameter_value {sysid_control_slave_translator} {AV_DATA_W} {32};set_instance_parameter_value {sysid_control_slave_translator} {UAV_DATA_W} {32};set_instance_parameter_value {sysid_control_slave_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {sysid_control_slave_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {sysid_control_slave_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {sysid_control_slave_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {sysid_control_slave_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {sysid_control_slave_translator} {AV_READLATENCY} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {sysid_control_slave_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {sysid_control_slave_translator} {USE_READDATA} {1};set_instance_parameter_value {sysid_control_slave_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_READ} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_WRITE} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_ADDRESS} {1};set_instance_parameter_value {sysid_control_slave_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_LOCK} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {sysid_control_slave_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {sysid_control_slave_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sysid_control_slave_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {sysid_control_slave_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {sysid_control_slave_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {sysid_control_slave_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {sysid_control_slave_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {sysid_control_slave_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {sysid_control_slave_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {sysid_control_slave_translator} {SYNC_RESET} {1};add_instance {led_pio_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {led_pio_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {led_pio_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {led_pio_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {led_pio_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {led_pio_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {led_pio_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {led_pio_s1_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {led_pio_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {led_pio_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {led_pio_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {led_pio_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {led_pio_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {led_pio_s1_translator} {USE_READ} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {led_pio_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {led_pio_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {led_pio_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {led_pio_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {led_pio_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {led_pio_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {led_pio_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {led_pio_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {led_pio_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {led_pio_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {led_pio_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {led_pio_s1_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {led_pio_s1_translator} {SYNC_RESET} {1};add_instance {dipsw_pio_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {dipsw_pio_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {dipsw_pio_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {dipsw_pio_s1_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {dipsw_pio_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_READ} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {dipsw_pio_s1_translator} {SYNC_RESET} {1};add_instance {button_pio_s1_translator} {altera_merlin_slave_translator};set_instance_parameter_value {button_pio_s1_translator} {AV_ADDRESS_W} {2};set_instance_parameter_value {button_pio_s1_translator} {AV_DATA_W} {32};set_instance_parameter_value {button_pio_s1_translator} {UAV_DATA_W} {32};set_instance_parameter_value {button_pio_s1_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {button_pio_s1_translator} {AV_BYTEENABLE_W} {1};set_instance_parameter_value {button_pio_s1_translator} {UAV_BYTEENABLE_W} {4};set_instance_parameter_value {button_pio_s1_translator} {UAV_ADDRESS_W} {17};set_instance_parameter_value {button_pio_s1_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {button_pio_s1_translator} {AV_READLATENCY} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {button_pio_s1_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_TIMING_UNITS} {1};set_instance_parameter_value {button_pio_s1_translator} {USE_READDATA} {1};set_instance_parameter_value {button_pio_s1_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {button_pio_s1_translator} {USE_READ} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_WRITE} {1};set_instance_parameter_value {button_pio_s1_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_CHIPSELECT} {1};set_instance_parameter_value {button_pio_s1_translator} {USE_ADDRESS} {1};set_instance_parameter_value {button_pio_s1_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_READDATAVALID} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_WAITREQUEST} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_WRITEBYTEENABLE} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_LOCK} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_AV_CLKEN} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_UAV_CLKEN} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_OUTPUTENABLE} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {button_pio_s1_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {button_pio_s1_translator} {AV_ADDRESS_SYMBOLS} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {button_pio_s1_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_REQUIRE_UNALIGNED_ADDRESSES} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {1};set_instance_parameter_value {button_pio_s1_translator} {AV_MAX_PENDING_WRITE_TRANSACTIONS} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {button_pio_s1_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {button_pio_s1_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {button_pio_s1_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {button_pio_s1_translator} {CHIPSELECT_THROUGH_READLATENCY} {0};set_instance_parameter_value {button_pio_s1_translator} {WAITREQUEST_ALLOWANCE} {0};set_instance_parameter_value {button_pio_s1_translator} {SYNC_RESET} {1};add_instance {pb_cpu_0_m0_agent} {altera_merlin_master_agent};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_WUNIQUE} {97};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_DOMAIN_H} {96};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_DOMAIN_L} {95};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_SNOOP_H} {94};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_SNOOP_L} {91};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BARRIER_H} {90};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BARRIER_L} {89};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_ORI_BURST_SIZE_H} {88};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_ORI_BURST_SIZE_L} {86};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_RESPONSE_STATUS_H} {85};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_RESPONSE_STATUS_L} {84};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_QOS_H} {71};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_QOS_L} {71};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_DATA_SIDEBAND_H} {69};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_DATA_SIDEBAND_L} {69};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_ADDR_SIDEBAND_H} {68};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_ADDR_SIDEBAND_L} {68};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BURST_TYPE_H} {67};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BURST_TYPE_L} {66};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_CACHE_H} {83};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_CACHE_L} {80};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_THREAD_ID_H} {76};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_THREAD_ID_L} {76};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_TRANS_EXCLUSIVE} {58};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_PROTECTION_H} {79};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_PROTECTION_L} {77};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_DATA_H} {31};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_DATA_L} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_SRC_ID_H} {73};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_DEST_ID_H} {75};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_DEST_ID_L} {74};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_POISON_H} {98};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_POISON_L} {98};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_DATACHK_H} {99};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_DATACHK_L} {99};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_ADDRCHK_H} {102};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_ADDRCHK_L} {101};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_SAI_H} {103};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_SAI_L} {103};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_EOP_OOO} {104};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_SOP_OOO} {105};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_TRANS_SEQ_H} {112};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_TRANS_SEQ_L} {106};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_USER_DATA_H} {100};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_USER_DATA_L} {100};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_ATRACE} {113};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_TRACE} {114};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_AWAKEUP} {115};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_AWATOP_H} {121};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_AWATOP_L} {116};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_AWSTASHNID_H} {132};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_AWSTASHNID_L} {122};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_AWSTASHNIDEN} {133};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_AWSTASHLPID_H} {138};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_AWSTASHLPID_L} {134};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_AWSTASHLPIDEN} {139};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_MMUSECSID} {141};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_MMUSID_H} {140};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_MMUSID_L} {140};set_instance_parameter_value {pb_cpu_0_m0_agent} {PKT_DATALESS} {142};set_instance_parameter_value {pb_cpu_0_m0_agent} {ST_DATA_W} {143};set_instance_parameter_value {pb_cpu_0_m0_agent} {ST_CHANNEL_W} {4};set_instance_parameter_value {pb_cpu_0_m0_agent} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {pb_cpu_0_m0_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {pb_cpu_0_m0_agent} {ADDR_MAP} {&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;
&lt;address_map&gt;
 &lt;slave
   id=&quot;3&quot;
   name=&quot;sysid_control_slave_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000010000&quot;
   end=&quot;0x00000000000010008&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;2&quot;
   name=&quot;led_pio_s1_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000010080&quot;
   end=&quot;0x00000000000010090&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;1&quot;
   name=&quot;dipsw_pio_s1_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000010070&quot;
   end=&quot;0x00000000000010080&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
 &lt;slave
   id=&quot;0&quot;
   name=&quot;button_pio_s1_translator.avalon_universal_slave_0&quot;
   start=&quot;0x0000000000010060&quot;
   end=&quot;0x00000000000010070&quot;
   responds=&quot;1&quot;
   user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {pb_cpu_0_m0_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {ID} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {pb_cpu_0_m0_agent} {CACHE_VALUE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {pb_cpu_0_m0_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {DOMAIN_VALUE} {3};set_instance_parameter_value {pb_cpu_0_m0_agent} {BARRIER_VALUE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {SNOOP_VALUE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {WUNIQUE_VALUE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {AWATOP_VALUE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {AWSTASHNID_VALUE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {AWSTASHNIDEN_VALUE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {AWSTASHLPID_VALUE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {AWSTASHLPIDEN_VALUE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {MMUSECSID_VALUE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {MMUSID_VALUE} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {SYNC_RESET} {1};set_instance_parameter_value {pb_cpu_0_m0_agent} {USE_PKT_DATACHK} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {USE_PKT_ADDRCHK} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {ROLE_BASED_USER} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {ENABLE_AXI5} {0};set_instance_parameter_value {pb_cpu_0_m0_agent} {BYTEEN_WIDTH} {4};set_instance_parameter_value {pb_cpu_0_m0_agent} {OPTIMIZED_READS_WITH_BE} {0};add_instance {sysid_control_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sysid_control_slave_agent} {PKT_ORI_BURST_SIZE_H} {88};set_instance_parameter_value {sysid_control_slave_agent} {PKT_ORI_BURST_SIZE_L} {86};set_instance_parameter_value {sysid_control_slave_agent} {PKT_RESPONSE_STATUS_H} {85};set_instance_parameter_value {sysid_control_slave_agent} {PKT_RESPONSE_STATUS_L} {84};set_instance_parameter_value {sysid_control_slave_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {sysid_control_slave_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {sysid_control_slave_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {sysid_control_slave_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {sysid_control_slave_agent} {PKT_PROTECTION_H} {79};set_instance_parameter_value {sysid_control_slave_agent} {PKT_PROTECTION_L} {77};set_instance_parameter_value {sysid_control_slave_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {sysid_control_slave_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {sysid_control_slave_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {sysid_control_slave_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {sysid_control_slave_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {sysid_control_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {sysid_control_slave_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {sysid_control_slave_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {sysid_control_slave_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {sysid_control_slave_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {sysid_control_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {sysid_control_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sysid_control_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {sysid_control_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {sysid_control_slave_agent} {PKT_SRC_ID_H} {73};set_instance_parameter_value {sysid_control_slave_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {sysid_control_slave_agent} {PKT_DEST_ID_H} {75};set_instance_parameter_value {sysid_control_slave_agent} {PKT_DEST_ID_L} {74};set_instance_parameter_value {sysid_control_slave_agent} {PKT_POISON_H} {98};set_instance_parameter_value {sysid_control_slave_agent} {PKT_POISON_L} {98};set_instance_parameter_value {sysid_control_slave_agent} {PKT_DATACHK_H} {99};set_instance_parameter_value {sysid_control_slave_agent} {PKT_DATACHK_L} {99};set_instance_parameter_value {sysid_control_slave_agent} {PKT_SAI_H} {103};set_instance_parameter_value {sysid_control_slave_agent} {PKT_SAI_L} {103};set_instance_parameter_value {sysid_control_slave_agent} {PKT_ADDRCHK_H} {102};set_instance_parameter_value {sysid_control_slave_agent} {PKT_ADDRCHK_L} {101};set_instance_parameter_value {sysid_control_slave_agent} {PKT_EOP_OOO} {104};set_instance_parameter_value {sysid_control_slave_agent} {PKT_SOP_OOO} {105};set_instance_parameter_value {sysid_control_slave_agent} {PKT_TRANS_SEQ_H} {112};set_instance_parameter_value {sysid_control_slave_agent} {PKT_TRANS_SEQ_L} {106};set_instance_parameter_value {sysid_control_slave_agent} {PKT_USER_DATA_H} {100};set_instance_parameter_value {sysid_control_slave_agent} {PKT_USER_DATA_L} {100};set_instance_parameter_value {sysid_control_slave_agent} {PKT_ATRACE} {113};set_instance_parameter_value {sysid_control_slave_agent} {PKT_TRACE} {114};set_instance_parameter_value {sysid_control_slave_agent} {PKT_AWAKEUP} {115};set_instance_parameter_value {sysid_control_slave_agent} {PKT_AWATOP_H} {121};set_instance_parameter_value {sysid_control_slave_agent} {PKT_AWATOP_L} {116};set_instance_parameter_value {sysid_control_slave_agent} {PKT_AWSTASHNID_H} {132};set_instance_parameter_value {sysid_control_slave_agent} {PKT_AWSTASHNID_L} {122};set_instance_parameter_value {sysid_control_slave_agent} {PKT_AWSTASHNIDEN} {133};set_instance_parameter_value {sysid_control_slave_agent} {PKT_AWSTASHLPID_H} {138};set_instance_parameter_value {sysid_control_slave_agent} {PKT_AWSTASHLPID_L} {134};set_instance_parameter_value {sysid_control_slave_agent} {PKT_AWSTASHLPIDEN} {139};set_instance_parameter_value {sysid_control_slave_agent} {PKT_MMUSECSID} {141};set_instance_parameter_value {sysid_control_slave_agent} {PKT_MMUSID_H} {140};set_instance_parameter_value {sysid_control_slave_agent} {PKT_MMUSID_L} {140};set_instance_parameter_value {sysid_control_slave_agent} {PKT_DATALESS} {142};set_instance_parameter_value {sysid_control_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sysid_control_slave_agent} {ST_CHANNEL_W} {4};set_instance_parameter_value {sysid_control_slave_agent} {ST_DATA_W} {143};set_instance_parameter_value {sysid_control_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sysid_control_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {sysid_control_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sysid_control_slave_agent} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {sysid_control_slave_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {sysid_control_slave_agent} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sysid_control_slave_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sysid_control_slave_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {sysid_control_slave_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {sysid_control_slave_agent} {ID} {3};set_instance_parameter_value {sysid_control_slave_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sysid_control_slave_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sysid_control_slave_agent} {ECC_ENABLE} {0};set_instance_parameter_value {sysid_control_slave_agent} {SYNC_RESET} {1};set_instance_parameter_value {sysid_control_slave_agent} {USE_PKT_DATACHK} {0};set_instance_parameter_value {sysid_control_slave_agent} {ROLE_BASED_USER} {0};set_instance_parameter_value {sysid_control_slave_agent} {ENABLE_AXI5} {0};add_instance {sysid_control_slave_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {BITS_PER_SYMBOL} {144};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {MEM_TYPE} {M20K};set_instance_parameter_value {sysid_control_slave_agent_rsp_fifo} {SYNC_RESET} {1};add_instance {led_pio_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {led_pio_s1_agent} {PKT_ORI_BURST_SIZE_H} {88};set_instance_parameter_value {led_pio_s1_agent} {PKT_ORI_BURST_SIZE_L} {86};set_instance_parameter_value {led_pio_s1_agent} {PKT_RESPONSE_STATUS_H} {85};set_instance_parameter_value {led_pio_s1_agent} {PKT_RESPONSE_STATUS_L} {84};set_instance_parameter_value {led_pio_s1_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {led_pio_s1_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {led_pio_s1_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {led_pio_s1_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {led_pio_s1_agent} {PKT_PROTECTION_H} {79};set_instance_parameter_value {led_pio_s1_agent} {PKT_PROTECTION_L} {77};set_instance_parameter_value {led_pio_s1_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {led_pio_s1_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {led_pio_s1_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {led_pio_s1_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {led_pio_s1_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {led_pio_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {led_pio_s1_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {led_pio_s1_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {led_pio_s1_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {led_pio_s1_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {led_pio_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {led_pio_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {led_pio_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {led_pio_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {led_pio_s1_agent} {PKT_SRC_ID_H} {73};set_instance_parameter_value {led_pio_s1_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {led_pio_s1_agent} {PKT_DEST_ID_H} {75};set_instance_parameter_value {led_pio_s1_agent} {PKT_DEST_ID_L} {74};set_instance_parameter_value {led_pio_s1_agent} {PKT_POISON_H} {98};set_instance_parameter_value {led_pio_s1_agent} {PKT_POISON_L} {98};set_instance_parameter_value {led_pio_s1_agent} {PKT_DATACHK_H} {99};set_instance_parameter_value {led_pio_s1_agent} {PKT_DATACHK_L} {99};set_instance_parameter_value {led_pio_s1_agent} {PKT_SAI_H} {103};set_instance_parameter_value {led_pio_s1_agent} {PKT_SAI_L} {103};set_instance_parameter_value {led_pio_s1_agent} {PKT_ADDRCHK_H} {102};set_instance_parameter_value {led_pio_s1_agent} {PKT_ADDRCHK_L} {101};set_instance_parameter_value {led_pio_s1_agent} {PKT_EOP_OOO} {104};set_instance_parameter_value {led_pio_s1_agent} {PKT_SOP_OOO} {105};set_instance_parameter_value {led_pio_s1_agent} {PKT_TRANS_SEQ_H} {112};set_instance_parameter_value {led_pio_s1_agent} {PKT_TRANS_SEQ_L} {106};set_instance_parameter_value {led_pio_s1_agent} {PKT_USER_DATA_H} {100};set_instance_parameter_value {led_pio_s1_agent} {PKT_USER_DATA_L} {100};set_instance_parameter_value {led_pio_s1_agent} {PKT_ATRACE} {113};set_instance_parameter_value {led_pio_s1_agent} {PKT_TRACE} {114};set_instance_parameter_value {led_pio_s1_agent} {PKT_AWAKEUP} {115};set_instance_parameter_value {led_pio_s1_agent} {PKT_AWATOP_H} {121};set_instance_parameter_value {led_pio_s1_agent} {PKT_AWATOP_L} {116};set_instance_parameter_value {led_pio_s1_agent} {PKT_AWSTASHNID_H} {132};set_instance_parameter_value {led_pio_s1_agent} {PKT_AWSTASHNID_L} {122};set_instance_parameter_value {led_pio_s1_agent} {PKT_AWSTASHNIDEN} {133};set_instance_parameter_value {led_pio_s1_agent} {PKT_AWSTASHLPID_H} {138};set_instance_parameter_value {led_pio_s1_agent} {PKT_AWSTASHLPID_L} {134};set_instance_parameter_value {led_pio_s1_agent} {PKT_AWSTASHLPIDEN} {139};set_instance_parameter_value {led_pio_s1_agent} {PKT_MMUSECSID} {141};set_instance_parameter_value {led_pio_s1_agent} {PKT_MMUSID_H} {140};set_instance_parameter_value {led_pio_s1_agent} {PKT_MMUSID_L} {140};set_instance_parameter_value {led_pio_s1_agent} {PKT_DATALESS} {142};set_instance_parameter_value {led_pio_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {led_pio_s1_agent} {ST_CHANNEL_W} {4};set_instance_parameter_value {led_pio_s1_agent} {ST_DATA_W} {143};set_instance_parameter_value {led_pio_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {led_pio_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {led_pio_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {led_pio_s1_agent} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {led_pio_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {led_pio_s1_agent} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {led_pio_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {led_pio_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {led_pio_s1_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {led_pio_s1_agent} {ID} {2};set_instance_parameter_value {led_pio_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {led_pio_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {led_pio_s1_agent} {ECC_ENABLE} {0};set_instance_parameter_value {led_pio_s1_agent} {SYNC_RESET} {1};set_instance_parameter_value {led_pio_s1_agent} {USE_PKT_DATACHK} {0};set_instance_parameter_value {led_pio_s1_agent} {ROLE_BASED_USER} {0};set_instance_parameter_value {led_pio_s1_agent} {ENABLE_AXI5} {0};add_instance {led_pio_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {144};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {MEM_TYPE} {M20K};set_instance_parameter_value {led_pio_s1_agent_rsp_fifo} {SYNC_RESET} {1};add_instance {dipsw_pio_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_ORI_BURST_SIZE_H} {88};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_ORI_BURST_SIZE_L} {86};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_RESPONSE_STATUS_H} {85};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_RESPONSE_STATUS_L} {84};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_PROTECTION_H} {79};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_PROTECTION_L} {77};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_SRC_ID_H} {73};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_DEST_ID_H} {75};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_DEST_ID_L} {74};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_POISON_H} {98};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_POISON_L} {98};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_DATACHK_H} {99};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_DATACHK_L} {99};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_SAI_H} {103};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_SAI_L} {103};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_ADDRCHK_H} {102};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_ADDRCHK_L} {101};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_EOP_OOO} {104};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_SOP_OOO} {105};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_TRANS_SEQ_H} {112};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_TRANS_SEQ_L} {106};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_USER_DATA_H} {100};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_USER_DATA_L} {100};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_ATRACE} {113};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_TRACE} {114};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_AWAKEUP} {115};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_AWATOP_H} {121};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_AWATOP_L} {116};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_AWSTASHNID_H} {132};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_AWSTASHNID_L} {122};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_AWSTASHNIDEN} {133};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_AWSTASHLPID_H} {138};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_AWSTASHLPID_L} {134};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_AWSTASHLPIDEN} {139};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_MMUSECSID} {141};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_MMUSID_H} {140};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_MMUSID_L} {140};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_DATALESS} {142};set_instance_parameter_value {dipsw_pio_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {dipsw_pio_s1_agent} {ST_CHANNEL_W} {4};set_instance_parameter_value {dipsw_pio_s1_agent} {ST_DATA_W} {143};set_instance_parameter_value {dipsw_pio_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {dipsw_pio_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {dipsw_pio_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {dipsw_pio_s1_agent} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {dipsw_pio_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {dipsw_pio_s1_agent} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {dipsw_pio_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {dipsw_pio_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {dipsw_pio_s1_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {dipsw_pio_s1_agent} {ID} {1};set_instance_parameter_value {dipsw_pio_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {dipsw_pio_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {dipsw_pio_s1_agent} {ECC_ENABLE} {0};set_instance_parameter_value {dipsw_pio_s1_agent} {SYNC_RESET} {1};set_instance_parameter_value {dipsw_pio_s1_agent} {USE_PKT_DATACHK} {0};set_instance_parameter_value {dipsw_pio_s1_agent} {ROLE_BASED_USER} {0};set_instance_parameter_value {dipsw_pio_s1_agent} {ENABLE_AXI5} {0};add_instance {dipsw_pio_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {144};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {MEM_TYPE} {M20K};set_instance_parameter_value {dipsw_pio_s1_agent_rsp_fifo} {SYNC_RESET} {1};add_instance {button_pio_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {button_pio_s1_agent} {PKT_ORI_BURST_SIZE_H} {88};set_instance_parameter_value {button_pio_s1_agent} {PKT_ORI_BURST_SIZE_L} {86};set_instance_parameter_value {button_pio_s1_agent} {PKT_RESPONSE_STATUS_H} {85};set_instance_parameter_value {button_pio_s1_agent} {PKT_RESPONSE_STATUS_L} {84};set_instance_parameter_value {button_pio_s1_agent} {PKT_BURST_SIZE_H} {65};set_instance_parameter_value {button_pio_s1_agent} {PKT_BURST_SIZE_L} {63};set_instance_parameter_value {button_pio_s1_agent} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {button_pio_s1_agent} {PKT_BEGIN_BURST} {70};set_instance_parameter_value {button_pio_s1_agent} {PKT_PROTECTION_H} {79};set_instance_parameter_value {button_pio_s1_agent} {PKT_PROTECTION_L} {77};set_instance_parameter_value {button_pio_s1_agent} {PKT_BURSTWRAP_H} {62};set_instance_parameter_value {button_pio_s1_agent} {PKT_BURSTWRAP_L} {62};set_instance_parameter_value {button_pio_s1_agent} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {button_pio_s1_agent} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {button_pio_s1_agent} {PKT_ADDR_H} {52};set_instance_parameter_value {button_pio_s1_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {button_pio_s1_agent} {PKT_TRANS_COMPRESSED_READ} {53};set_instance_parameter_value {button_pio_s1_agent} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {button_pio_s1_agent} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {button_pio_s1_agent} {PKT_TRANS_READ} {56};set_instance_parameter_value {button_pio_s1_agent} {PKT_DATA_H} {31};set_instance_parameter_value {button_pio_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {button_pio_s1_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {button_pio_s1_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {button_pio_s1_agent} {PKT_SRC_ID_H} {73};set_instance_parameter_value {button_pio_s1_agent} {PKT_SRC_ID_L} {72};set_instance_parameter_value {button_pio_s1_agent} {PKT_DEST_ID_H} {75};set_instance_parameter_value {button_pio_s1_agent} {PKT_DEST_ID_L} {74};set_instance_parameter_value {button_pio_s1_agent} {PKT_POISON_H} {98};set_instance_parameter_value {button_pio_s1_agent} {PKT_POISON_L} {98};set_instance_parameter_value {button_pio_s1_agent} {PKT_DATACHK_H} {99};set_instance_parameter_value {button_pio_s1_agent} {PKT_DATACHK_L} {99};set_instance_parameter_value {button_pio_s1_agent} {PKT_SAI_H} {103};set_instance_parameter_value {button_pio_s1_agent} {PKT_SAI_L} {103};set_instance_parameter_value {button_pio_s1_agent} {PKT_ADDRCHK_H} {102};set_instance_parameter_value {button_pio_s1_agent} {PKT_ADDRCHK_L} {101};set_instance_parameter_value {button_pio_s1_agent} {PKT_EOP_OOO} {104};set_instance_parameter_value {button_pio_s1_agent} {PKT_SOP_OOO} {105};set_instance_parameter_value {button_pio_s1_agent} {PKT_TRANS_SEQ_H} {112};set_instance_parameter_value {button_pio_s1_agent} {PKT_TRANS_SEQ_L} {106};set_instance_parameter_value {button_pio_s1_agent} {PKT_USER_DATA_H} {100};set_instance_parameter_value {button_pio_s1_agent} {PKT_USER_DATA_L} {100};set_instance_parameter_value {button_pio_s1_agent} {PKT_ATRACE} {113};set_instance_parameter_value {button_pio_s1_agent} {PKT_TRACE} {114};set_instance_parameter_value {button_pio_s1_agent} {PKT_AWAKEUP} {115};set_instance_parameter_value {button_pio_s1_agent} {PKT_AWATOP_H} {121};set_instance_parameter_value {button_pio_s1_agent} {PKT_AWATOP_L} {116};set_instance_parameter_value {button_pio_s1_agent} {PKT_AWSTASHNID_H} {132};set_instance_parameter_value {button_pio_s1_agent} {PKT_AWSTASHNID_L} {122};set_instance_parameter_value {button_pio_s1_agent} {PKT_AWSTASHNIDEN} {133};set_instance_parameter_value {button_pio_s1_agent} {PKT_AWSTASHLPID_H} {138};set_instance_parameter_value {button_pio_s1_agent} {PKT_AWSTASHLPID_L} {134};set_instance_parameter_value {button_pio_s1_agent} {PKT_AWSTASHLPIDEN} {139};set_instance_parameter_value {button_pio_s1_agent} {PKT_MMUSECSID} {141};set_instance_parameter_value {button_pio_s1_agent} {PKT_MMUSID_H} {140};set_instance_parameter_value {button_pio_s1_agent} {PKT_MMUSID_L} {140};set_instance_parameter_value {button_pio_s1_agent} {PKT_DATALESS} {142};set_instance_parameter_value {button_pio_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {button_pio_s1_agent} {ST_CHANNEL_W} {4};set_instance_parameter_value {button_pio_s1_agent} {ST_DATA_W} {143};set_instance_parameter_value {button_pio_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {button_pio_s1_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {button_pio_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {button_pio_s1_agent} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {button_pio_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {0};set_instance_parameter_value {button_pio_s1_agent} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {button_pio_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {button_pio_s1_agent} {MAX_BYTE_CNT} {4};set_instance_parameter_value {button_pio_s1_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {button_pio_s1_agent} {ID} {0};set_instance_parameter_value {button_pio_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {button_pio_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {button_pio_s1_agent} {ECC_ENABLE} {0};set_instance_parameter_value {button_pio_s1_agent} {SYNC_RESET} {1};set_instance_parameter_value {button_pio_s1_agent} {USE_PKT_DATACHK} {0};set_instance_parameter_value {button_pio_s1_agent} {ROLE_BASED_USER} {0};set_instance_parameter_value {button_pio_s1_agent} {ENABLE_AXI5} {0};add_instance {button_pio_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {SYMBOLS_PER_BEAT} {1};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {BITS_PER_SYMBOL} {144};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {FIFO_DEPTH} {2};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {CHANNEL_WIDTH} {0};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {ERROR_WIDTH} {0};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {USE_PACKETS} {1};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {USE_FILL_LEVEL} {0};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {EMPTY_LATENCY} {1};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {USE_MEMORY_BLOCKS} {0};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {USE_STORE_FORWARD} {0};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {USE_ALMOST_FULL_IF} {0};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {USE_ALMOST_EMPTY_IF} {0};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {ENABLE_EXPLICIT_MAXCHANNEL} {false};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {EXPLICIT_MAXCHANNEL} {0};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {MEM_TYPE} {M20K};set_instance_parameter_value {button_pio_s1_agent_rsp_fifo} {SYNC_RESET} {1};add_instance {router} {altera_merlin_router};set_instance_parameter_value {router} {DESTINATION_ID} {3 0 1 2 };set_instance_parameter_value {router} {CHANNEL_ID} {0001 1000 0100 0010 };set_instance_parameter_value {router} {TYPE_OF_TRANSACTION} {read both both both };set_instance_parameter_value {router} {START_ADDRESS} {0x10000 0x10060 0x10070 0x10080 };set_instance_parameter_value {router} {END_ADDRESS} {0x10008 0x10070 0x10080 0x10090 };set_instance_parameter_value {router} {NON_SECURED_TAG} {1 1 1 1 };set_instance_parameter_value {router} {SECURED_RANGE_PAIRS} {0 0 0 0 };set_instance_parameter_value {router} {SECURED_RANGE_LIST} {0 0 0 0 };set_instance_parameter_value {router} {SPAN_OFFSET} {};set_instance_parameter_value {router} {PKT_ADDR_H} {52};set_instance_parameter_value {router} {PKT_ADDR_L} {36};set_instance_parameter_value {router} {PKT_PROTECTION_H} {79};set_instance_parameter_value {router} {PKT_PROTECTION_L} {77};set_instance_parameter_value {router} {PKT_DEST_ID_H} {75};set_instance_parameter_value {router} {PKT_DEST_ID_L} {74};set_instance_parameter_value {router} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router} {PKT_TRANS_READ} {56};set_instance_parameter_value {router} {ST_DATA_W} {143};set_instance_parameter_value {router} {ST_CHANNEL_W} {4};set_instance_parameter_value {router} {DECODER_TYPE} {0};set_instance_parameter_value {router} {DEFAULT_CHANNEL} {3};set_instance_parameter_value {router} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router} {DEFAULT_DESTID} {0};set_instance_parameter_value {router} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router} {SYNC_RESET} {1};add_instance {router_001} {altera_merlin_router};set_instance_parameter_value {router_001} {DESTINATION_ID} {0 };set_instance_parameter_value {router_001} {CHANNEL_ID} {1 };set_instance_parameter_value {router_001} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_001} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_001} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_001} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_001} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_001} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_001} {SPAN_OFFSET} {};set_instance_parameter_value {router_001} {PKT_ADDR_H} {52};set_instance_parameter_value {router_001} {PKT_ADDR_L} {36};set_instance_parameter_value {router_001} {PKT_PROTECTION_H} {79};set_instance_parameter_value {router_001} {PKT_PROTECTION_L} {77};set_instance_parameter_value {router_001} {PKT_DEST_ID_H} {75};set_instance_parameter_value {router_001} {PKT_DEST_ID_L} {74};set_instance_parameter_value {router_001} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router_001} {PKT_TRANS_READ} {56};set_instance_parameter_value {router_001} {ST_DATA_W} {143};set_instance_parameter_value {router_001} {ST_CHANNEL_W} {4};set_instance_parameter_value {router_001} {DECODER_TYPE} {1};set_instance_parameter_value {router_001} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_001} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_001} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_001} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_001} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_001} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_001} {SYNC_RESET} {1};add_instance {router_002} {altera_merlin_router};set_instance_parameter_value {router_002} {DESTINATION_ID} {0 };set_instance_parameter_value {router_002} {CHANNEL_ID} {1 };set_instance_parameter_value {router_002} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_002} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_002} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_002} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_002} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_002} {SPAN_OFFSET} {};set_instance_parameter_value {router_002} {PKT_ADDR_H} {52};set_instance_parameter_value {router_002} {PKT_ADDR_L} {36};set_instance_parameter_value {router_002} {PKT_PROTECTION_H} {79};set_instance_parameter_value {router_002} {PKT_PROTECTION_L} {77};set_instance_parameter_value {router_002} {PKT_DEST_ID_H} {75};set_instance_parameter_value {router_002} {PKT_DEST_ID_L} {74};set_instance_parameter_value {router_002} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router_002} {PKT_TRANS_READ} {56};set_instance_parameter_value {router_002} {ST_DATA_W} {143};set_instance_parameter_value {router_002} {ST_CHANNEL_W} {4};set_instance_parameter_value {router_002} {DECODER_TYPE} {1};set_instance_parameter_value {router_002} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_002} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_002} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_002} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_002} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_002} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_002} {SYNC_RESET} {1};add_instance {router_003} {altera_merlin_router};set_instance_parameter_value {router_003} {DESTINATION_ID} {0 };set_instance_parameter_value {router_003} {CHANNEL_ID} {1 };set_instance_parameter_value {router_003} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_003} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_003} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_003} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_003} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_003} {SPAN_OFFSET} {};set_instance_parameter_value {router_003} {PKT_ADDR_H} {52};set_instance_parameter_value {router_003} {PKT_ADDR_L} {36};set_instance_parameter_value {router_003} {PKT_PROTECTION_H} {79};set_instance_parameter_value {router_003} {PKT_PROTECTION_L} {77};set_instance_parameter_value {router_003} {PKT_DEST_ID_H} {75};set_instance_parameter_value {router_003} {PKT_DEST_ID_L} {74};set_instance_parameter_value {router_003} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router_003} {PKT_TRANS_READ} {56};set_instance_parameter_value {router_003} {ST_DATA_W} {143};set_instance_parameter_value {router_003} {ST_CHANNEL_W} {4};set_instance_parameter_value {router_003} {DECODER_TYPE} {1};set_instance_parameter_value {router_003} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_003} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_003} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_003} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_003} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_003} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_003} {SYNC_RESET} {1};add_instance {router_004} {altera_merlin_router};set_instance_parameter_value {router_004} {DESTINATION_ID} {0 };set_instance_parameter_value {router_004} {CHANNEL_ID} {1 };set_instance_parameter_value {router_004} {TYPE_OF_TRANSACTION} {both };set_instance_parameter_value {router_004} {START_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {END_ADDRESS} {0x0 };set_instance_parameter_value {router_004} {NON_SECURED_TAG} {1 };set_instance_parameter_value {router_004} {SECURED_RANGE_PAIRS} {0 };set_instance_parameter_value {router_004} {SECURED_RANGE_LIST} {0 };set_instance_parameter_value {router_004} {SPAN_OFFSET} {};set_instance_parameter_value {router_004} {PKT_ADDR_H} {52};set_instance_parameter_value {router_004} {PKT_ADDR_L} {36};set_instance_parameter_value {router_004} {PKT_PROTECTION_H} {79};set_instance_parameter_value {router_004} {PKT_PROTECTION_L} {77};set_instance_parameter_value {router_004} {PKT_DEST_ID_H} {75};set_instance_parameter_value {router_004} {PKT_DEST_ID_L} {74};set_instance_parameter_value {router_004} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {router_004} {PKT_TRANS_READ} {56};set_instance_parameter_value {router_004} {ST_DATA_W} {143};set_instance_parameter_value {router_004} {ST_CHANNEL_W} {4};set_instance_parameter_value {router_004} {DECODER_TYPE} {1};set_instance_parameter_value {router_004} {DEFAULT_CHANNEL} {0};set_instance_parameter_value {router_004} {DEFAULT_WR_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_RD_CHANNEL} {-1};set_instance_parameter_value {router_004} {DEFAULT_DESTID} {0};set_instance_parameter_value {router_004} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {router_004} {MEMORY_ALIASING_DECODE} {0};set_instance_parameter_value {router_004} {HAS_USER_DEFAULT_SLAVE} {0};set_instance_parameter_value {router_004} {SYNC_RESET} {1};add_instance {pb_cpu_0_m0_limiter} {altera_merlin_traffic_limiter};set_instance_parameter_value {pb_cpu_0_m0_limiter} {SYNC_RESET} {1};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_DEST_ID_H} {75};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_DEST_ID_L} {74};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_SRC_ID_H} {73};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_SRC_ID_L} {72};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_BYTE_CNT_H} {61};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_BYTE_CNT_L} {59};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_BYTEEN_H} {35};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_BYTEEN_L} {32};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_TRANS_POSTED} {54};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_TRANS_WRITE} {55};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_THREAD_ID_H} {76};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_THREAD_ID_L} {76};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_TRANS_SEQ_H} {112};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PKT_TRANS_SEQ_L} {106};set_instance_parameter_value {pb_cpu_0_m0_limiter} {MAX_BURST_LENGTH} {1};set_instance_parameter_value {pb_cpu_0_m0_limiter} {MAX_OUTSTANDING_RESPONSES} {2};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PIPELINED} {0};set_instance_parameter_value {pb_cpu_0_m0_limiter} {ST_DATA_W} {143};set_instance_parameter_value {pb_cpu_0_m0_limiter} {ST_CHANNEL_W} {4};set_instance_parameter_value {pb_cpu_0_m0_limiter} {VALID_WIDTH} {4};set_instance_parameter_value {pb_cpu_0_m0_limiter} {ENFORCE_ORDER} {1};set_instance_parameter_value {pb_cpu_0_m0_limiter} {PREVENT_HAZARDS} {0};set_instance_parameter_value {pb_cpu_0_m0_limiter} {SUPPORTS_POSTED_WRITES} {1};set_instance_parameter_value {pb_cpu_0_m0_limiter} {SUPPORTS_NONPOSTED_WRITES} {0};set_instance_parameter_value {pb_cpu_0_m0_limiter} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {pb_cpu_0_m0_limiter} {REORDER} {0};set_instance_parameter_value {pb_cpu_0_m0_limiter} {ENABLE_CONCURRENT_SUBORDINATE_ACCESS} {0};set_instance_parameter_value {pb_cpu_0_m0_limiter} {NO_REPEATED_IDS_BETWEEN_SUBORDINATES} {0};set_instance_parameter_value {pb_cpu_0_m0_limiter} {ENABLE_OOO} {0};add_instance {cmd_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {cmd_demux} {ST_DATA_W} {143};set_instance_parameter_value {cmd_demux} {ST_CHANNEL_W} {4};set_instance_parameter_value {cmd_demux} {NUM_OUTPUTS} {4};set_instance_parameter_value {cmd_demux} {VALID_WIDTH} {4};set_instance_parameter_value {cmd_demux} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_demux} {SYNC_RESET} {1};add_instance {cmd_mux} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux} {ST_DATA_W} {143};set_instance_parameter_value {cmd_mux} {ST_CHANNEL_W} {4};set_instance_parameter_value {cmd_mux} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {cmd_mux} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux} {SYNC_RESET} {1};set_instance_parameter_value {cmd_mux} {ENABLE_OOO_CHUNKS} {0};set_instance_parameter_value {cmd_mux} {PKT_SOP_OOO} {105};set_instance_parameter_value {cmd_mux} {PKT_EOP_OOO} {104};add_instance {cmd_mux_001} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_001} {ST_DATA_W} {143};set_instance_parameter_value {cmd_mux_001} {ST_CHANNEL_W} {4};set_instance_parameter_value {cmd_mux_001} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_001} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_001} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_001} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_001} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_001} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_001} {SYNC_RESET} {1};set_instance_parameter_value {cmd_mux_001} {ENABLE_OOO_CHUNKS} {0};set_instance_parameter_value {cmd_mux_001} {PKT_SOP_OOO} {105};set_instance_parameter_value {cmd_mux_001} {PKT_EOP_OOO} {104};add_instance {cmd_mux_002} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_002} {ST_DATA_W} {143};set_instance_parameter_value {cmd_mux_002} {ST_CHANNEL_W} {4};set_instance_parameter_value {cmd_mux_002} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_002} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_002} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_002} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_002} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_002} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_002} {SYNC_RESET} {1};set_instance_parameter_value {cmd_mux_002} {ENABLE_OOO_CHUNKS} {0};set_instance_parameter_value {cmd_mux_002} {PKT_SOP_OOO} {105};set_instance_parameter_value {cmd_mux_002} {PKT_EOP_OOO} {104};add_instance {cmd_mux_003} {altera_merlin_multiplexer};set_instance_parameter_value {cmd_mux_003} {ST_DATA_W} {143};set_instance_parameter_value {cmd_mux_003} {ST_CHANNEL_W} {4};set_instance_parameter_value {cmd_mux_003} {NUM_INPUTS} {1};set_instance_parameter_value {cmd_mux_003} {PIPELINE_ARB} {1};set_instance_parameter_value {cmd_mux_003} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {cmd_mux_003} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SCHEME} {round-robin};set_instance_parameter_value {cmd_mux_003} {ARBITRATION_SHARES} {1 };set_instance_parameter_value {cmd_mux_003} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {cmd_mux_003} {SYNC_RESET} {1};set_instance_parameter_value {cmd_mux_003} {ENABLE_OOO_CHUNKS} {0};set_instance_parameter_value {cmd_mux_003} {PKT_SOP_OOO} {105};set_instance_parameter_value {cmd_mux_003} {PKT_EOP_OOO} {104};add_instance {rsp_demux} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux} {ST_DATA_W} {143};set_instance_parameter_value {rsp_demux} {ST_CHANNEL_W} {4};set_instance_parameter_value {rsp_demux} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux} {SYNC_RESET} {1};add_instance {rsp_demux_001} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_001} {ST_DATA_W} {143};set_instance_parameter_value {rsp_demux_001} {ST_CHANNEL_W} {4};set_instance_parameter_value {rsp_demux_001} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_001} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_001} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_001} {SYNC_RESET} {1};add_instance {rsp_demux_002} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_002} {ST_DATA_W} {143};set_instance_parameter_value {rsp_demux_002} {ST_CHANNEL_W} {4};set_instance_parameter_value {rsp_demux_002} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_002} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_002} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_002} {SYNC_RESET} {1};add_instance {rsp_demux_003} {altera_merlin_demultiplexer};set_instance_parameter_value {rsp_demux_003} {ST_DATA_W} {143};set_instance_parameter_value {rsp_demux_003} {ST_CHANNEL_W} {4};set_instance_parameter_value {rsp_demux_003} {NUM_OUTPUTS} {1};set_instance_parameter_value {rsp_demux_003} {VALID_WIDTH} {1};set_instance_parameter_value {rsp_demux_003} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_demux_003} {SYNC_RESET} {1};add_instance {rsp_mux} {altera_merlin_multiplexer};set_instance_parameter_value {rsp_mux} {ST_DATA_W} {143};set_instance_parameter_value {rsp_mux} {ST_CHANNEL_W} {4};set_instance_parameter_value {rsp_mux} {NUM_INPUTS} {4};set_instance_parameter_value {rsp_mux} {PIPELINE_ARB} {0};set_instance_parameter_value {rsp_mux} {USE_EXTERNAL_ARB} {0};set_instance_parameter_value {rsp_mux} {PKT_TRANS_LOCK} {57};set_instance_parameter_value {rsp_mux} {ARBITRATION_SCHEME} {no-arb};set_instance_parameter_value {rsp_mux} {ARBITRATION_SHARES} {1 1 1 1 };set_instance_parameter_value {rsp_mux} {MERLIN_PACKET_FORMAT} {dataless(142) mmusecsid(141) mmusid(140) awstashlpiden(139) awstashlpid(138:134) awstashniden(133) awstashnid(132:122) awatop(121:116) awakeup(115) trace(114) atrace(113) trans_seq(112:106) sop_ooo(105) eop_ooo(104) sai(103) addrchk(102:101) user_data(100) datachk(99) poison(98) wunique(97) domain(96:95) snoop(94:91) barrier(90:89) ori_burst_size(88:86) response_status(85:84) cache(83:80) protection(79:77) thread_id(76) dest_id(75:74) src_id(73:72) qos(71) begin_burst(70) data_sideband(69) addr_sideband(68) burst_type(67:66) burst_size(65:63) burstwrap(62) byte_cnt(61:59) trans_exclusive(58) trans_lock(57) trans_read(56) trans_write(55) trans_posted(54) trans_compressed_read(53) addr(52:36) byteen(35:32) data(31:0)};set_instance_parameter_value {rsp_mux} {SYNC_RESET} {1};set_instance_parameter_value {rsp_mux} {ENABLE_OOO_CHUNKS} {0};set_instance_parameter_value {rsp_mux} {PKT_SOP_OOO} {105};set_instance_parameter_value {rsp_mux} {PKT_EOP_OOO} {104};add_instance {pb_cpu_0_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {pb_cpu_0_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {pb_cpu_0_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {pb_cpu_0_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {pb_cpu_0_reset_reset_bridge} {USE_RESET_REQUEST} {0};set_instance_parameter_value {pb_cpu_0_reset_reset_bridge} {SYNC_RESET} {1};add_instance {pb_cpu_0_m0_translator_reset_reset_bridge} {altera_reset_bridge};set_instance_parameter_value {pb_cpu_0_m0_translator_reset_reset_bridge} {ACTIVE_LOW_RESET} {0};set_instance_parameter_value {pb_cpu_0_m0_translator_reset_reset_bridge} {SYNCHRONOUS_EDGES} {deassert};set_instance_parameter_value {pb_cpu_0_m0_translator_reset_reset_bridge} {NUM_RESET_OUTPUTS} {1};set_instance_parameter_value {pb_cpu_0_m0_translator_reset_reset_bridge} {USE_RESET_REQUEST} {0};set_instance_parameter_value {pb_cpu_0_m0_translator_reset_reset_bridge} {SYNC_RESET} {1};add_instance {periph_clk_out_clk_clock_bridge} {altera_clock_bridge};set_instance_parameter_value {periph_clk_out_clk_clock_bridge} {EXPLICIT_CLOCK_RATE} {100000000};set_instance_parameter_value {periph_clk_out_clk_clock_bridge} {NUM_CLOCK_OUTPUTS} {1};add_connection {pb_cpu_0_m0_translator.avalon_universal_master_0} {pb_cpu_0_m0_agent.av} {avalon};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {arbitrationPriority} {1};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {baseAddress} {0x0000};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {defaultConnection} {false};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {domainAlias} {};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_translator.avalon_universal_master_0/pb_cpu_0_m0_agent.av} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {sysid_control_slave_agent.m0} {sysid_control_slave_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.m0/sysid_control_slave_translator.avalon_universal_slave_0} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {sysid_control_slave_agent.rf_source} {sysid_control_slave_agent_rsp_fifo.in} {avalon_streaming};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rf_source/sysid_control_slave_agent_rsp_fifo.in} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {sysid_control_slave_agent_rsp_fifo.out} {sysid_control_slave_agent.rf_sink} {avalon_streaming};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {sysid_control_slave_agent_rsp_fifo.out/sysid_control_slave_agent.rf_sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {sysid_control_slave_agent.rdata_fifo_src} {sysid_control_slave_agent.rdata_fifo_sink} {avalon_streaming};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rdata_fifo_src/sysid_control_slave_agent.rdata_fifo_sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {cmd_mux.src} {sysid_control_slave_agent.cp} {avalon_streaming};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {cmd_mux.src/sysid_control_slave_agent.cp} {qsys_mm.command};add_connection {led_pio_s1_agent.m0} {led_pio_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {led_pio_s1_agent.m0/led_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {led_pio_s1_agent.rf_source} {led_pio_s1_agent_rsp_fifo.in} {avalon_streaming};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rf_source/led_pio_s1_agent_rsp_fifo.in} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {led_pio_s1_agent_rsp_fifo.out} {led_pio_s1_agent.rf_sink} {avalon_streaming};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {led_pio_s1_agent_rsp_fifo.out/led_pio_s1_agent.rf_sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {led_pio_s1_agent.rdata_fifo_src} {led_pio_s1_agent.rdata_fifo_sink} {avalon_streaming};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rdata_fifo_src/led_pio_s1_agent.rdata_fifo_sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {cmd_mux_001.src} {led_pio_s1_agent.cp} {avalon_streaming};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {cmd_mux_001.src/led_pio_s1_agent.cp} {qsys_mm.command};add_connection {dipsw_pio_s1_agent.m0} {dipsw_pio_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.m0/dipsw_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {dipsw_pio_s1_agent.rf_source} {dipsw_pio_s1_agent_rsp_fifo.in} {avalon_streaming};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rf_source/dipsw_pio_s1_agent_rsp_fifo.in} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {dipsw_pio_s1_agent_rsp_fifo.out} {dipsw_pio_s1_agent.rf_sink} {avalon_streaming};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent_rsp_fifo.out/dipsw_pio_s1_agent.rf_sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {dipsw_pio_s1_agent.rdata_fifo_src} {dipsw_pio_s1_agent.rdata_fifo_sink} {avalon_streaming};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rdata_fifo_src/dipsw_pio_s1_agent.rdata_fifo_sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {cmd_mux_002.src} {dipsw_pio_s1_agent.cp} {avalon_streaming};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {cmd_mux_002.src/dipsw_pio_s1_agent.cp} {qsys_mm.command};add_connection {button_pio_s1_agent.m0} {button_pio_s1_translator.avalon_universal_slave_0} {avalon};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {arbitrationPriority} {1};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {baseAddress} {0x0000};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {defaultConnection} {false};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {domainAlias} {};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {button_pio_s1_agent.m0/button_pio_s1_translator.avalon_universal_slave_0} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {button_pio_s1_agent.rf_source} {button_pio_s1_agent_rsp_fifo.in} {avalon_streaming};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rf_source/button_pio_s1_agent_rsp_fifo.in} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {button_pio_s1_agent_rsp_fifo.out} {button_pio_s1_agent.rf_sink} {avalon_streaming};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {button_pio_s1_agent_rsp_fifo.out/button_pio_s1_agent.rf_sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {button_pio_s1_agent.rdata_fifo_src} {button_pio_s1_agent.rdata_fifo_sink} {avalon_streaming};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rdata_fifo_src/button_pio_s1_agent.rdata_fifo_sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {cmd_mux_003.src} {button_pio_s1_agent.cp} {avalon_streaming};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {cmd_mux_003.src/button_pio_s1_agent.cp} {qsys_mm.command};add_connection {pb_cpu_0_m0_agent.cp} {router.sink} {avalon_streaming};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {pb_cpu_0_m0_agent.cp/router.sink} {qsys_mm.command};add_connection {sysid_control_slave_agent.rp} {router_001.sink} {avalon_streaming};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {sysid_control_slave_agent.rp/router_001.sink} {qsys_mm.response};add_connection {router_001.src} {rsp_demux.sink} {avalon_streaming};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {router_001.src/rsp_demux.sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {router_001.src/rsp_demux.sink} {qsys_mm.response};add_connection {led_pio_s1_agent.rp} {router_002.sink} {avalon_streaming};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {led_pio_s1_agent.rp/router_002.sink} {qsys_mm.response};add_connection {router_002.src} {rsp_demux_001.sink} {avalon_streaming};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {router_002.src/rsp_demux_001.sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {router_002.src/rsp_demux_001.sink} {qsys_mm.response};add_connection {dipsw_pio_s1_agent.rp} {router_003.sink} {avalon_streaming};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {dipsw_pio_s1_agent.rp/router_003.sink} {qsys_mm.response};add_connection {router_003.src} {rsp_demux_002.sink} {avalon_streaming};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {router_003.src/rsp_demux_002.sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {router_003.src/rsp_demux_002.sink} {qsys_mm.response};add_connection {button_pio_s1_agent.rp} {router_004.sink} {avalon_streaming};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {button_pio_s1_agent.rp/router_004.sink} {qsys_mm.response};add_connection {router_004.src} {rsp_demux_003.sink} {avalon_streaming};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {router_004.src/rsp_demux_003.sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {router_004.src/rsp_demux_003.sink} {qsys_mm.response};add_connection {router.src} {pb_cpu_0_m0_limiter.cmd_sink} {avalon_streaming};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {router.src/pb_cpu_0_m0_limiter.cmd_sink} {qsys_mm.command};add_connection {pb_cpu_0_m0_limiter.cmd_src} {cmd_demux.sink} {avalon_streaming};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {pb_cpu_0_m0_limiter.cmd_src/cmd_demux.sink} {qsys_mm.command};add_connection {rsp_mux.src} {pb_cpu_0_m0_limiter.rsp_sink} {avalon_streaming};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {rsp_mux.src/pb_cpu_0_m0_limiter.rsp_sink} {qsys_mm.response};add_connection {pb_cpu_0_m0_limiter.rsp_src} {pb_cpu_0_m0_agent.rp} {avalon_streaming};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {pb_cpu_0_m0_limiter.rsp_src/pb_cpu_0_m0_agent.rp} {qsys_mm.response};add_connection {cmd_demux.src0} {cmd_mux.sink0} {avalon_streaming};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {cmd_demux.src0/cmd_mux.sink0} {qsys_mm.command};add_connection {cmd_demux.src1} {cmd_mux_001.sink0} {avalon_streaming};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {cmd_demux.src1/cmd_mux_001.sink0} {qsys_mm.command};add_connection {cmd_demux.src2} {cmd_mux_002.sink0} {avalon_streaming};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {cmd_demux.src2/cmd_mux_002.sink0} {qsys_mm.command};add_connection {cmd_demux.src3} {cmd_mux_003.sink0} {avalon_streaming};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {cmd_demux.src3/cmd_mux_003.sink0} {qsys_mm.command};add_connection {rsp_demux.src0} {rsp_mux.sink0} {avalon_streaming};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {rsp_demux.src0/rsp_mux.sink0} {qsys_mm.response};add_connection {rsp_demux_001.src0} {rsp_mux.sink1} {avalon_streaming};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {rsp_demux_001.src0/rsp_mux.sink1} {qsys_mm.response};add_connection {rsp_demux_002.src0} {rsp_mux.sink2} {avalon_streaming};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {rsp_demux_002.src0/rsp_mux.sink2} {qsys_mm.response};add_connection {rsp_demux_003.src0} {rsp_mux.sink3} {avalon_streaming};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};preview_set_connection_tag {rsp_demux_003.src0/rsp_mux.sink3} {qsys_mm.response};add_connection {pb_cpu_0_m0_limiter.cmd_valid} {cmd_demux.sink_valid} {avalon_streaming};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.piplineType} {PIPELINE_STAGE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.enableAllPipelines} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.maxAdditionalLatency} {1};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.clockCrossingAdapter} {AUTO};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.fifoDepth} {8};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.insertDefaultSlave} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.enableInstrumentation} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.interconnectResetSource} {DEFAULT};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.burstAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.widthAdapterImplementation} {GENERIC_CONVERTER};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.enableEccProtection} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.interconnectType} {STANDARD};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.syncResets} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.optimizeRdFifoSize} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.responseFifoType} {REGISTER_BASED};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.enableOutOfOrderSupport} {FALSE};set_connection_parameter_value {pb_cpu_0_m0_limiter.cmd_valid/cmd_demux.sink_valid} {qsys_mm.splitCommandsFor4KBoundary} {FALSE};add_connection {pb_cpu_0_reset_reset_bridge.out_reset} {sysid_control_slave_agent_rsp_fifo.clk_reset} {reset};add_connection {pb_cpu_0_reset_reset_bridge.out_reset} {led_pio_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {pb_cpu_0_reset_reset_bridge.out_reset} {dipsw_pio_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {pb_cpu_0_reset_reset_bridge.out_reset} {button_pio_s1_agent_rsp_fifo.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {pb_cpu_0_m0_translator.reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {sysid_control_slave_translator.reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {led_pio_s1_translator.reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {dipsw_pio_s1_translator.reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {button_pio_s1_translator.reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {pb_cpu_0_m0_agent.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {sysid_control_slave_agent.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {led_pio_s1_agent.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {dipsw_pio_s1_agent.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {button_pio_s1_agent.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {router.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {router_001.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {router_002.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {router_003.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {router_004.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {pb_cpu_0_m0_limiter.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {cmd_demux.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {cmd_mux.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {cmd_mux_001.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {cmd_mux_002.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {cmd_mux_003.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {rsp_demux.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {rsp_demux_001.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {rsp_demux_002.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {rsp_demux_003.clk_reset} {reset};add_connection {pb_cpu_0_m0_translator_reset_reset_bridge.out_reset} {rsp_mux.clk_reset} {reset};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {pb_cpu_0_m0_translator.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {sysid_control_slave_translator.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {led_pio_s1_translator.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {dipsw_pio_s1_translator.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {button_pio_s1_translator.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {pb_cpu_0_m0_agent.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {sysid_control_slave_agent.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {sysid_control_slave_agent_rsp_fifo.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {led_pio_s1_agent.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {led_pio_s1_agent_rsp_fifo.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {dipsw_pio_s1_agent.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {dipsw_pio_s1_agent_rsp_fifo.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {button_pio_s1_agent.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {button_pio_s1_agent_rsp_fifo.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {router.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {router_001.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {router_002.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {router_003.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {router_004.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {pb_cpu_0_m0_limiter.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {cmd_demux.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {rsp_mux.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {cmd_mux.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {rsp_demux.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {cmd_mux_001.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {rsp_demux_001.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {cmd_mux_002.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {rsp_demux_002.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {cmd_mux_003.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {rsp_demux_003.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {pb_cpu_0_reset_reset_bridge.clk} {clock};add_connection {periph_clk_out_clk_clock_bridge.out_clk} {pb_cpu_0_m0_translator_reset_reset_bridge.clk} {clock};add_interface {pb_cpu_0_m0} {avalon} {slave};set_interface_property {pb_cpu_0_m0} {EXPORT_OF} {pb_cpu_0_m0_translator.avalon_anti_master_0};add_interface {sysid_control_slave} {avalon} {master};set_interface_property {sysid_control_slave} {EXPORT_OF} {sysid_control_slave_translator.avalon_anti_slave_0};add_interface {led_pio_s1} {avalon} {master};set_interface_property {led_pio_s1} {EXPORT_OF} {led_pio_s1_translator.avalon_anti_slave_0};add_interface {dipsw_pio_s1} {avalon} {master};set_interface_property {dipsw_pio_s1} {EXPORT_OF} {dipsw_pio_s1_translator.avalon_anti_slave_0};add_interface {button_pio_s1} {avalon} {master};set_interface_property {button_pio_s1} {EXPORT_OF} {button_pio_s1_translator.avalon_anti_slave_0};add_interface {pb_cpu_0_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {pb_cpu_0_reset_reset_bridge_in_reset} {EXPORT_OF} {pb_cpu_0_reset_reset_bridge.in_reset};add_interface {pb_cpu_0_m0_translator_reset_reset_bridge_in_reset} {reset} {slave};set_interface_property {pb_cpu_0_m0_translator_reset_reset_bridge_in_reset} {EXPORT_OF} {pb_cpu_0_m0_translator_reset_reset_bridge.in_reset};add_interface {periph_clk_out_clk} {clock} {slave};set_interface_property {periph_clk_out_clk} {EXPORT_OF} {periph_clk_out_clk_clock_bridge.in_clk};set_module_assignment {interconnect_id.button_pio.s1} {0};set_module_assignment {interconnect_id.dipsw_pio.s1} {1};set_module_assignment {interconnect_id.led_pio.s1} {2};set_module_assignment {interconnect_id.pb_cpu_0.m0} {0};set_module_assignment {interconnect_id.sysid.control_slave} {3};" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_mm_interconnect_1920/synth/peripheral_subsys_altera_mm_interconnect_1920_553jo7i.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_mm_interconnect_1920/synth/peripheral_subsys_altera_mm_interconnect_1920_553jo7i.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
  </sourceFiles>
  <childSourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </childSourceFiles>
  <instantiator instantiator="peripheral_subsys" as="mm_interconnect_0" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_mm_interconnect_1920_553jo7i"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_master_translator_193_lgcew2q"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_slave_translator_191_xg7rzxi"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_master_agent_1940_r3ep6da"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_slave_agent_1930_jxauz3i"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_avalon_sc_fifo_1932_22gxxgi"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_router_1921_iesulwy"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_router_1921_wxl7gvy"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_traffic_limiter_1922_y23fybq"</message>
   <message level="Info" culprit="my_altera_avalon_sc_fifo_dest_id_fifo">"Generating: my_altera_avalon_sc_fifo_dest_id_fifo"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_1922_25262sa"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_avalon_sc_fifo_1932_22gxxgi"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_demultiplexer_1921_uppfuvi"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_multiplexer_1922_ufdjdoq"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_demultiplexer_1921_4xqokvi"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_multiplexer_1922_cbyifnq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_reset_controller"
   version="19.2.4"
   name="altera_reset_controller">
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_reset_controller_1924/synth/altera_reset_controller.v"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_reset_controller_1924/synth/altera_reset_synchronizer.v"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_reset_controller_1924/synth/altera_reset_controller.sdc"
       attributes="NO_SDC_PROMOTION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_reset_controller_1924/synth/altera_reset_controller.v"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_reset_controller_1924/synth/altera_reset_synchronizer.v"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_reset_controller_1924/synth/altera_reset_controller.sdc"
       attributes="NO_SDC_PROMOTION" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys"
     as="rst_controller,rst_controller_001" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: altera_reset_controller"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_master_translator"
   version="19.3"
   name="peripheral_subsys_altera_merlin_master_translator_193_lgcew2q">
  <parameter name="WAITREQUEST_ALLOWANCE" value="0" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_master_translator_193/synth/peripheral_subsys_altera_merlin_master_translator_193_lgcew2q.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_master_translator_193/synth/peripheral_subsys_altera_merlin_master_translator_193_lgcew2q.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_master_translator/altera_merlin_master_translator_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="pb_cpu_0_m0_translator" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_master_translator_193_lgcew2q"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_slave_translator"
   version="19.1"
   name="peripheral_subsys_altera_merlin_slave_translator_191_xg7rzxi">
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_slave_translator_191/synth/peripheral_subsys_altera_merlin_slave_translator_191_xg7rzxi.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_slave_translator_191/synth/peripheral_subsys_altera_merlin_slave_translator_191_xg7rzxi.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_slave_translator/altera_merlin_slave_translator_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="sysid_control_slave_translator,led_pio_s1_translator,dipsw_pio_s1_translator,button_pio_s1_translator" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_slave_translator_191_xg7rzxi"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_master_agent"
   version="19.4.0"
   name="peripheral_subsys_altera_merlin_master_agent_1940_r3ep6da">
  <parameter name="BYTEEN_WIDTH" value="4" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_master_agent_1940/synth/peripheral_subsys_altera_merlin_master_agent_1940_r3ep6da.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_master_agent_1940/synth/peripheral_subsys_altera_merlin_master_agent_1940_r3ep6da.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_master_agent/altera_merlin_master_agent_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="pb_cpu_0_m0_agent" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_master_agent_1940_r3ep6da"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_slave_agent"
   version="19.3.0"
   name="peripheral_subsys_altera_merlin_slave_agent_1930_jxauz3i">
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_slave_agent_1930/synth/peripheral_subsys_altera_merlin_slave_agent_1930_jxauz3i.sv"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_slave_agent_1930/synth/altera_merlin_burst_uncompressor.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_slave_agent_1930/synth/peripheral_subsys_altera_merlin_slave_agent_1930_jxauz3i.sv"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_slave_agent_1930/synth/altera_merlin_burst_uncompressor.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_slave_agent/altera_merlin_slave_agent_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="sysid_control_slave_agent,led_pio_s1_agent,dipsw_pio_s1_agent,button_pio_s1_agent" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_slave_agent_1930_jxauz3i"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_router"
   version="19.2.1"
   name="peripheral_subsys_altera_merlin_router_1921_iesulwy">
  <parameter name="ST_CHANNEL_W" value="4" />
  <parameter name="DEFAULT_WR_CHANNEL" value="-1" />
  <parameter name="PKT_TRANS_READ" value="56" />
  <parameter name="START_ADDRESS" value="0x10000,0x10060,0x10070,0x10080" />
  <parameter name="DEFAULT_CHANNEL" value="3" />
  <parameter name="MEMORY_ALIASING_DECODE" value="0" />
  <parameter name="HAS_USER_DEFAULT_SLAVE" value="0" />
  <parameter
     name="SLAVES_INFO"
     value="3:0001:0x10000:0x10008:read:1:0:0:1,0:1000:0x10060:0x10070:both:1:0:0:1,1:0100:0x10070:0x10080:both:1:0:0:1,2:0010:0x10080:0x10090:both:1:0:0:1" />
  <parameter name="DEFAULT_RD_CHANNEL" value="-1" />
  <parameter name="PKT_ADDR_H" value="52" />
  <parameter name="PKT_DEST_ID_H" value="75" />
  <parameter name="PKT_ADDR_L" value="36" />
  <parameter name="PKT_DEST_ID_L" value="74" />
  <parameter name="CHANNEL_ID" value="0001,1000,0100,0010" />
  <parameter name="TYPE_OF_TRANSACTION" value="read,both,both,both" />
  <parameter name="SECURED_RANGE_PAIRS" value="0,0,0,0" />
  <parameter name="SPAN_OFFSET" value="" />
  <parameter name="ST_DATA_W" value="143" />
  <parameter name="SECURED_RANGE_LIST" value="0,0,0,0" />
  <parameter name="DECODER_TYPE" value="0" />
  <parameter name="PKT_PROTECTION_H" value="79" />
  <parameter name="END_ADDRESS" value="0x10008,0x10070,0x10080,0x10090" />
  <parameter name="PKT_PROTECTION_L" value="77" />
  <parameter name="PKT_TRANS_WRITE" value="55" />
  <parameter name="DEFAULT_DESTID" value="0" />
  <parameter name="DESTINATION_ID" value="3,0,1,2" />
  <parameter name="NON_SECURED_TAG" value="1,1,1,1" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_router_1921/synth/peripheral_subsys_altera_merlin_router_1921_iesulwy.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_router_1921/synth/peripheral_subsys_altera_merlin_router_1921_iesulwy.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="router" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_router_1921_iesulwy"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_router"
   version="19.2.1"
   name="peripheral_subsys_altera_merlin_router_1921_wxl7gvy">
  <parameter name="ST_CHANNEL_W" value="4" />
  <parameter name="DEFAULT_WR_CHANNEL" value="-1" />
  <parameter name="PKT_TRANS_READ" value="56" />
  <parameter name="START_ADDRESS" value="0x0" />
  <parameter name="DEFAULT_CHANNEL" value="0" />
  <parameter name="MEMORY_ALIASING_DECODE" value="0" />
  <parameter name="HAS_USER_DEFAULT_SLAVE" value="0" />
  <parameter name="SLAVES_INFO" value="0:1:0x0:0x0:both:1:0:0:1" />
  <parameter name="DEFAULT_RD_CHANNEL" value="-1" />
  <parameter name="PKT_ADDR_H" value="52" />
  <parameter name="PKT_DEST_ID_H" value="75" />
  <parameter name="PKT_ADDR_L" value="36" />
  <parameter name="PKT_DEST_ID_L" value="74" />
  <parameter name="CHANNEL_ID" value="1" />
  <parameter name="TYPE_OF_TRANSACTION" value="both" />
  <parameter name="SECURED_RANGE_PAIRS" value="0" />
  <parameter name="SPAN_OFFSET" value="" />
  <parameter name="ST_DATA_W" value="143" />
  <parameter name="SECURED_RANGE_LIST" value="0" />
  <parameter name="DECODER_TYPE" value="1" />
  <parameter name="PKT_PROTECTION_H" value="79" />
  <parameter name="END_ADDRESS" value="0x0" />
  <parameter name="PKT_PROTECTION_L" value="77" />
  <parameter name="PKT_TRANS_WRITE" value="55" />
  <parameter name="DEFAULT_DESTID" value="0" />
  <parameter name="DESTINATION_ID" value="0" />
  <parameter name="NON_SECURED_TAG" value="1" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_router_1921/synth/peripheral_subsys_altera_merlin_router_1921_wxl7gvy.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_router_1921/synth/peripheral_subsys_altera_merlin_router_1921_wxl7gvy.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_router/altera_merlin_router_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="router_001,router_002,router_003,router_004" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_router_1921_wxl7gvy"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_traffic_limiter"
   version="19.2.2"
   name="peripheral_subsys_altera_merlin_traffic_limiter_1922_y23fybq">
  <parameter name="MAX_OUTSTANDING_RESPONSES" value="2" />
  <parameter name="ENABLE_OOO" value="0" />
  <parameter name="SYNC_RESET" value="1" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_traffic_limiter_1922/synth/altera_merlin_reorder_memory.sv"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_traffic_limiter_1922/synth/altera_avalon_st_pipeline_base.v"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_traffic_limiter_1922/synth/peripheral_subsys_altera_merlin_traffic_limiter_1922_y23fybq.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_traffic_limiter_1922/synth/altera_merlin_reorder_memory.sv"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_traffic_limiter_1922/synth/altera_avalon_st_pipeline_base.v"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_traffic_limiter_1922/synth/peripheral_subsys_altera_merlin_traffic_limiter_1922_y23fybq.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_traffic_limiter/altera_merlin_traffic_limiter_hw.tcl" />
  </sourceFiles>
  <childSourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
  </childSourceFiles>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="pb_cpu_0_m0_limiter" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_traffic_limiter_1922_y23fybq"</message>
   <message level="Info" culprit="my_altera_avalon_sc_fifo_dest_id_fifo">"Generating: my_altera_avalon_sc_fifo_dest_id_fifo"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_1922_25262sa"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_avalon_sc_fifo_1932_22gxxgi"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_demultiplexer"
   version="19.2.1"
   name="peripheral_subsys_altera_merlin_demultiplexer_1921_uppfuvi">
  <parameter name="ST_CHANNEL_W" value="4" />
  <parameter name="VALID_WIDTH" value="4" />
  <parameter name="ST_DATA_W" value="143" />
  <parameter name="NUM_OUTPUTS" value="4" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_demultiplexer_1921/synth/peripheral_subsys_altera_merlin_demultiplexer_1921_uppfuvi.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_demultiplexer_1921/synth/peripheral_subsys_altera_merlin_demultiplexer_1921_uppfuvi.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="cmd_demux" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_demultiplexer_1921_uppfuvi"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_multiplexer"
   version="19.2.2"
   name="peripheral_subsys_altera_merlin_multiplexer_1922_ufdjdoq">
  <parameter name="PKT_EOP_OOO" value="104" />
  <parameter name="ST_CHANNEL_W" value="4" />
  <parameter name="ARBITRATION_SHARES" value="1" />
  <parameter name="NUM_INPUTS" value="1" />
  <parameter name="PIPELINE_ARB" value="1" />
  <parameter name="ARBITRATION_SCHEME" value="round-robin" />
  <parameter name="ST_DATA_W" value="143" />
  <parameter name="PKT_SOP_OOO" value="105" />
  <parameter name="USE_EXTERNAL_ARB" value="0" />
  <parameter name="PKT_TRANS_LOCK" value="57" />
  <parameter name="SYNC_RESET" value="1" />
  <parameter name="ENABLE_OOO_CHUNKS" value="0" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_multiplexer_1922/synth/peripheral_subsys_altera_merlin_multiplexer_1922_ufdjdoq.sv"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_multiplexer_1922/synth/altera_merlin_arbitrator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_multiplexer_1922/synth/peripheral_subsys_altera_merlin_multiplexer_1922_ufdjdoq.sv"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_multiplexer_1922/synth/altera_merlin_arbitrator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="cmd_mux,cmd_mux_001,cmd_mux_002,cmd_mux_003" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_multiplexer_1922_ufdjdoq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_demultiplexer"
   version="19.2.1"
   name="peripheral_subsys_altera_merlin_demultiplexer_1921_4xqokvi">
  <parameter name="ST_CHANNEL_W" value="4" />
  <parameter name="VALID_WIDTH" value="1" />
  <parameter name="ST_DATA_W" value="143" />
  <parameter name="NUM_OUTPUTS" value="1" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_demultiplexer_1921/synth/peripheral_subsys_altera_merlin_demultiplexer_1921_4xqokvi.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_demultiplexer_1921/synth/peripheral_subsys_altera_merlin_demultiplexer_1921_4xqokvi.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_demultiplexer/altera_merlin_demultiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="rsp_demux,rsp_demux_001,rsp_demux_002,rsp_demux_003" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_demultiplexer_1921_4xqokvi"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_multiplexer"
   version="19.2.2"
   name="peripheral_subsys_altera_merlin_multiplexer_1922_cbyifnq">
  <parameter name="PKT_EOP_OOO" value="104" />
  <parameter name="ST_CHANNEL_W" value="4" />
  <parameter name="ARBITRATION_SHARES" value="1,1,1,1" />
  <parameter name="NUM_INPUTS" value="4" />
  <parameter name="PIPELINE_ARB" value="0" />
  <parameter name="ARBITRATION_SCHEME" value="no-arb" />
  <parameter name="ST_DATA_W" value="143" />
  <parameter name="PKT_SOP_OOO" value="105" />
  <parameter name="USE_EXTERNAL_ARB" value="0" />
  <parameter name="PKT_TRANS_LOCK" value="57" />
  <parameter name="SYNC_RESET" value="1" />
  <parameter name="ENABLE_OOO_CHUNKS" value="0" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_multiplexer_1922/synth/peripheral_subsys_altera_merlin_multiplexer_1922_cbyifnq.sv"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_multiplexer_1922/synth/altera_merlin_arbitrator.sv"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_multiplexer_1922/synth/peripheral_subsys_altera_merlin_multiplexer_1922_cbyifnq.sv"
       attributes="" />
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_multiplexer_1922/synth/altera_merlin_arbitrator.sv"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/merlin/altera_merlin_multiplexer/altera_merlin_multiplexer_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="rsp_mux" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_multiplexer_1922_cbyifnq"</message>
  </messages>
 </entity>
 <entity
   kind="altera_merlin_traffic_limiter_altera_avalon_sc_fifo"
   version="19.2.2"
   name="peripheral_subsys_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_1922_25262sa">
  <parameter name="FIFO_DEPTH" value="2" />
  <parameter name="USE_PACKETS" value="0" />
  <parameter name="EMPTY_LATENCY" value="1" />
  <parameter name="EXPLICIT_MAXCHANNEL" value="0" />
  <parameter name="EMPTY_WIDTH" value="1" />
  <parameter name="CHANNEL_WIDTH" value="0" />
  <parameter name="USE_ALMOST_FULL_IF" value="0" />
  <parameter name="MEM_TYPE" value="M20K" />
  <parameter name="ENABLE_EXPLICIT_MAXCHANNEL" value="false" />
  <parameter name="SYMBOLS_PER_BEAT" value="1" />
  <parameter name="BITS_PER_SYMBOL" value="3" />
  <parameter name="ERROR_WIDTH" value="0" />
  <parameter name="USE_MEMORY_BLOCKS" value="0" />
  <parameter name="USE_FILL_LEVEL" value="0" />
  <parameter name="USE_ALMOST_EMPTY_IF" value="0" />
  <parameter name="SYNC_RESET" value="1" />
  <parameter name="USE_STORE_FORWARD" value="0" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_traffic_limiter_1922/synth/peripheral_subsys_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_1922_25262sa.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_merlin_traffic_limiter_1922/synth/peripheral_subsys_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_1922_25262sa.v"
       attributes="CONTAINS_INLINE_CONFIGURATION" />
  </childGeneratedFiles>
  <sourceFiles/>
  <childSourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
  </childSourceFiles>
  <instantiator
     instantiator="peripheral_subsys_altera_merlin_traffic_limiter_1922_y23fybq"
     as="my_altera_avalon_sc_fifo_dest_id_fifo" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_1922_25262sa"</message>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_avalon_sc_fifo_1932_22gxxgi"</message>
  </messages>
 </entity>
 <entity
   kind="altera_avalon_sc_fifo"
   version="19.3.2"
   name="peripheral_subsys_altera_avalon_sc_fifo_1932_22gxxgi">
  <parameter name="EXPLICIT_MAXCHANNEL" value="0" />
  <parameter name="EMPTY_WIDTH" value="1" />
  <parameter name="SYNC_RESET" value="1" />
  <parameter name="ENABLE_EXPLICIT_MAXCHANNEL" value="false" />
  <generatedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_avalon_sc_fifo_1932/synth/peripheral_subsys_altera_avalon_sc_fifo_1932_22gxxgi.v"
       attributes="" />
  </generatedFiles>
  <childGeneratedFiles>
   <file
       path="/home/ubuntu/FPGA_Projects/retroDE_ps2/synth/de25_nano/top_psmct32_raster_demo/qsys/peripheral_subsys/peripheral_subsys/altera_avalon_sc_fifo_1932/synth/peripheral_subsys_altera_avalon_sc_fifo_1932_22gxxgi.v"
       attributes="" />
  </childGeneratedFiles>
  <sourceFiles>
   <file
       path="/opt/altera_pro/26.1/ip/altera/sopc_builder_ip/altera_avalon_sc_fifo/altera_avalon_sc_fifo_hw.tcl" />
  </sourceFiles>
  <childSourceFiles/>
  <instantiator
     instantiator="peripheral_subsys_altera_mm_interconnect_1920_553jo7i"
     as="sysid_control_slave_agent_rsp_fifo,led_pio_s1_agent_rsp_fifo,dipsw_pio_s1_agent_rsp_fifo,button_pio_s1_agent_rsp_fifo" />
  <instantiator
     instantiator="peripheral_subsys_altera_merlin_traffic_limiter_altera_avalon_sc_fifo_1922_25262sa"
     as="my_altera_avalon_sc_fifo_dest_id_fifo" />
  <messages>
   <message level="Info" culprit="peripheral_subsys">"Generating: peripheral_subsys_altera_avalon_sc_fifo_1932_22gxxgi"</message>
  </messages>
 </entity>
</deploy>
