// retroDE_ps2 — tb_ee_core_gif_raster_topleft (Ch85)
//
// Verifies the Ch85 D3D-style top-left fill rule:
//   1. Adjacent triangles sharing an edge BC do NOT double-paint
//      pixels on that edge — exactly one of the two owns each
//      shared-edge pixel.
//   2. CW-wound triangles (signed area < 0) auto-swap into CCW
//      and produce the same pixel set as the equivalent CCW.
//   3. Degenerate triangles (3 colinear vertices, signed area 0)
//      latch raster_degenerate and emit zero raster pixels.
//
// Three DMA bursts (each gapped via `wait (raster_active==0)`):
//
//   Burst 1 — CCW right TRIANGLE A=(5,5), B=(7,5), C=(5,7).
//     Signed area = +4. No swap. Top-left edges: A→B (top,
//     dy=0/dx>0) and B→C (left, dy>0). Right edge C→A
//     (dy<0) is exclusive.
//     → 3 raster pixels: (6,5), (7,5), (6,6).
//
//   Burst 2 — CW TRIANGLE  B=(7,5), C=(5,7), D=(7,7).
//     Signed area = -4. FSM auto-swaps to {B, D, C}. New CCW
//     edges: B→D (left), D→C (right, dy=0/dx<0 → not top),
//     C→B (right, dy<0). Only one inclusive edge (B→D).
//     → 1 raster pixel: (7,6).
//
//   The two triangles share edge BC. Pixels on that edge under
//   the top-left rule:
//     - Burst 1 (ABC, CCW): includes the edge (B→C is a left
//       edge for ABC) — pixels (7,5) and (6,6) are emitted by
//       ABC. (5,7) lies on the right C→A edge as well so it's
//       excluded by ABC's bias.
//     - Burst 2 (BCD post-swap): the same physical edge appears
//       as edge C→B in CCW order — dy<0 → bottom, NOT
//       top-left, exclusive. So (7,5), (6,6), (5,7) are NOT
//       re-emitted by BCD.
//   No pixel appears in both bursts → no double-paint.
//
//   Burst 3 — Degenerate TRIANGLE (5,5)/(6,5)/(7,5) (colinear).
//     Signed area = (1)*(0) - (0)*(2) = 0. FSM latches
//     raster_degenerate=1 and skips SCAN.
//     → 0 raster pixels emitted; pixel_emit (Ch82 channel)
//       still pulses as usual since the primitive did close.
//
// FBP=2 / FBW=10 / PSMCT32 throughout. Expected raster fb_addrs:
//   (6,5) → 0x4218
//   (7,5) → 0x421C
//   (6,6) → 0x4C18
//   (7,6) → 0x4C1C
//
// Pass criteria:
//   - DMA: 3 START / 3 DONE
//   - GS: 3 EV_PRIM_DRAW (every TRI close fires; degenerate
//         doesn't suppress prim_complete)
//   - pixel_emit_count == 3 (Ch82 channel — degenerate counts)
//   - raster_pixel_emit_count == 4 (3 + 1 + 0)
//   - raster_overflow == 0
//   - raster_degenerate == 1 (latched by Burst 3)
//   - per-emit captures verify the specific (x, y, fb_addr)
//     tuples from Bursts 1 and 2; no duplicate pixels across
//     the two bursts (no double-paint of shared edge).

`timescale 1ns/1ps

module tb_ee_core_gif_raster_topleft;

    localparam int RAM_SIZE_BYTES = 4 * 1024;
    localparam int RAM_ADDR_W     = $clog2(RAM_SIZE_BYTES);

    logic clk;
    logic rst_n;
    initial clk = 1'b0;
    always #5 clk = ~clk;

    logic                  ram_rd_en;
    logic [RAM_ADDR_W-1:0] ram_rd_addr;
    logic [127:0]          ram_rd_data;
    logic                  ram_rd_valid;
    logic                  ram_wr_en;
    logic [RAM_ADDR_W-1:0] ram_wr_addr;
    logic [127:0]          ram_wr_data;
    logic [15:0]           ram_wr_be;
    logic [7:0]            ram_master_id;

    ee_ram_stub #(.SIZE_BYTES(RAM_SIZE_BYTES)) u_ram (
        .clk(clk), .rst_n(rst_n),
        .rd_en(ram_rd_en), .rd_addr(ram_rd_addr),
        .rd_data(ram_rd_data), .rd_valid(ram_rd_valid),
        .wr_en(ram_wr_en), .wr_addr(ram_wr_addr),
        .wr_data(ram_wr_data), .wr_be(ram_wr_be),
        .master_id(ram_master_id),
        .ev_valid(), .ev_subsys(), .ev_event(),
        .ev_arg0(), .ev_arg1(), .ev_arg2(), .ev_arg3(), .ev_flags()
    );
    assign ram_master_id = ram_rd_en ? 8'd1 : 8'd0;

    logic        dmac_reg_wr_en;
    logic [7:0]  dmac_reg_offset;
    logic [31:0] dmac_reg_wr_data;
    logic        dmac_mem_rd_en;
    logic [31:0] dmac_mem_rd_addr;
    logic         dmac_gif_valid;
    logic [127:0] dmac_gif_data;
    logic         dmac_gif_last;
    logic         dmac_gif_ready;

    logic                dmac_ev_valid;
    trace_pkg::subsys_e  dmac_ev_subsys;
    trace_pkg::event_e   dmac_ev_event;
    logic [63:0]         dmac_ev_arg0, dmac_ev_arg1, dmac_ev_arg2, dmac_ev_arg3;
    logic [31:0]         dmac_ev_flags;

    logic [127:0] map_to_dmac_rd_data;
    logic         map_to_dmac_rd_valid;

    dmac_reg_stub u_dmac (
        .clk(clk), .rst_n(rst_n),
        .reg_wr_en(dmac_reg_wr_en), .reg_offset(dmac_reg_offset),
        .reg_wr_data(dmac_reg_wr_data),
        .reg_rd_en(1'b0), .reg_rd_data(), .reg_rd_valid(),
        .mem_rd_en(dmac_mem_rd_en), .mem_rd_addr(dmac_mem_rd_addr),
        .mem_rd_data(map_to_dmac_rd_data), .mem_rd_valid(map_to_dmac_rd_valid),
        .ep_valid(dmac_gif_valid), .ep_data(dmac_gif_data),
        .ep_last(dmac_gif_last), .ep_ready(dmac_gif_ready),
        .irq_completion_o(),
        .ev_valid(dmac_ev_valid), .ev_subsys(dmac_ev_subsys),
        .ev_event(dmac_ev_event),
        .ev_arg0(dmac_ev_arg0), .ev_arg1(dmac_ev_arg1),
        .ev_arg2(dmac_ev_arg2), .ev_arg3(dmac_ev_arg3),
        .ev_flags(dmac_ev_flags)
    );

    logic        map_ram_rd_en;
    logic [24:0] map_ram_rd_addr;
    ee_memory_map_stub u_map (
        .clk(clk), .rst_n(rst_n),
        .ee_rd_en(1'b0), .ee_rd_addr(32'd0),
        .ee_rd_data(), .ee_rd_valid(),
        .ee_wr_en(1'b0), .ee_wr_addr(32'd0),
        .ee_wr_data(32'd0), .ee_wr_be(4'd0),
        .dmac_rd_en(dmac_mem_rd_en), .dmac_rd_addr(dmac_mem_rd_addr),
        .dmac_rd_data(map_to_dmac_rd_data),
        .dmac_rd_valid(map_to_dmac_rd_valid),
        .bios_rd_en(), .bios_rd_addr(),
        .bios_rd_data(32'd0), .bios_rd_valid(1'b0),
        .ram_rd_en(map_ram_rd_en), .ram_rd_addr(map_ram_rd_addr),
        .ram_rd_data(ram_rd_data), .ram_rd_valid(ram_rd_valid),
        .bridge_wr_en(1'b0), .bridge_wr_addr(32'd0),
        .bridge_wr_data(128'd0), .bridge_wr_be(16'd0),
        .bridge_master_id(8'd0),
        .ram_wr_en(), .ram_wr_addr(), .ram_wr_data(),
        .ram_wr_be(), .ram_master_id(),
        .ee_dmac_ch2_wr_en(), .ee_dmac_ch2_wr_addr(), .ee_dmac_ch2_wr_data(),
        .ee_dmac_ch2_rd_en(), .ee_dmac_ch2_rd_addr(),
        .ee_dmac_ch2_rd_data(32'd0), .ee_dmac_ch2_rd_valid(1'b0),
        .ee_intc_wr_en(), .ee_intc_wr_addr(), .ee_intc_wr_data(),
        .ee_intc_rd_en(), .ee_intc_rd_addr(),
        .ee_intc_rd_data(32'd0), .ee_intc_rd_valid(1'b0),
        .ee_misc_mmio_wr_en(), .ee_misc_mmio_wr_addr(), .ee_misc_mmio_wr_data(), .ee_misc_mmio_wr_be(),
        .ee_misc_mmio_rd_en(), .ee_misc_mmio_rd_addr(),
        .ee_misc_mmio_rd_data(32'd0), .ee_misc_mmio_rd_valid(1'b0),
        .ee_biu_wr_en(), .ee_biu_wr_addr(), .ee_biu_wr_data(), .ee_biu_wr_be(),
        .ee_biu_rd_en(), .ee_biu_rd_addr(),
        .ee_biu_rd_data(32'd0), .ee_biu_rd_valid(1'b0),
        .ev_valid(), .ev_subsys(), .ev_event(),
        .ev_arg0(), .ev_arg1(), .ev_arg2(), .ev_arg3(), .ev_flags()
    );

    assign ram_rd_en   = map_ram_rd_en;
    assign ram_rd_addr = map_ram_rd_addr[RAM_ADDR_W-1:0];

    logic        gif_gs_wr_en;
    logic [15:0] gif_gs_wr_addr;
    logic [63:0] gif_gs_wr_data;
    logic        gif_gif_reg_wr_en;
    logic [7:0]  gif_gif_reg_num;
    logic [63:0] gif_gif_reg_data;

    logic                gif_ev_valid;
    trace_pkg::subsys_e  gif_ev_subsys;
    trace_pkg::event_e   gif_ev_event;
    logic [63:0]         gif_ev_arg0, gif_ev_arg1, gif_ev_arg2, gif_ev_arg3;
    logic [31:0]         gif_ev_flags;

    gif_packed_stub #(.REAL_AD_REG_MAP(1'b1)) u_gif (
        .clk(clk), .rst_n(rst_n),
        .in_valid(dmac_gif_valid), .in_data(dmac_gif_data),
        .in_last(dmac_gif_last), .in_ready(dmac_gif_ready),
        .image_data_ready(1'b1),
        .raster_fifo_full(1'b0),
        .gs_wr_en(gif_gs_wr_en), .gs_wr_addr(gif_gs_wr_addr),
        .gs_wr_data(gif_gs_wr_data),
        .gif_reg_wr_en(gif_gif_reg_wr_en),
        .gif_reg_num(gif_gif_reg_num),
        .gif_reg_data(gif_gif_reg_data),
        .ev_valid(gif_ev_valid), .ev_subsys(gif_ev_subsys),
        .ev_event(gif_ev_event),
        .ev_arg0(gif_ev_arg0), .ev_arg1(gif_ev_arg1),
        .ev_arg2(gif_ev_arg2), .ev_arg3(gif_ev_arg3),
        .ev_flags(gif_ev_flags)
    );

    logic [7:0]          bg_r, bg_g, bg_b;
    logic [63:0]         prim_q, rgbaq_q, xyz2_q, xyzf2_q, frame_1_q, zbuf_1_q;
    logic                prim_complete;
    logic [31:0]         prim_complete_count;
    logic [63:0]         prim_v0_q, prim_v1_q, prim_v2_q;
    logic [63:0]         prim_color_q;
    logic [63:0]         prim_color_v0_q, prim_color_v1_q, prim_color_v2_q;
    trace_pkg::vertex_t  prim_v0_decoded_q, prim_v1_decoded_q, prim_v2_decoded_q;
    trace_pkg::color_t   prim_v0_color_decoded_q, prim_v1_color_decoded_q, prim_v2_color_decoded_q;
    logic                pixel_emit;
    logic [31:0]         pixel_emit_count;
    logic [11:0]         pixel_x_q, pixel_y_q;
    logic [63:0]         pixel_color_q;
    logic [8:0]          pixel_fbp_q;
    logic [5:0]          pixel_fbw_q, pixel_psm_q;
    logic [31:0]         pixel_fb_addr_q;
    logic                raster_pixel_emit;
    logic [31:0]         raster_pixel_emit_count;
    logic [11:0]         raster_pixel_x_q, raster_pixel_y_q;
    logic [63:0]         raster_pixel_color_q;
    logic [31:0]         raster_pixel_fb_addr_q;
    logic                raster_active;
    logic                raster_overflow;
    logic                raster_degenerate;
    logic                gs_ev_valid;
    trace_pkg::subsys_e  gs_ev_subsys;
    trace_pkg::event_e   gs_ev_event;
    logic [63:0]         gs_ev_arg0, gs_ev_arg1, gs_ev_arg2, gs_ev_arg3;
    logic [31:0]         gs_ev_flags;

    gs_stub u_gs (
        .clk(clk), .rst_n(rst_n),
        .reg_wr_en(gif_gs_wr_en), .reg_wr_addr(gif_gs_wr_addr),
        .reg_wr_data(gif_gs_wr_data),
        .gif_reg_wr_en(gif_gif_reg_wr_en),
        .gif_reg_num(gif_gif_reg_num),
        .gif_reg_data(gif_gif_reg_data),
        .bg_r(bg_r), .bg_g(bg_g), .bg_b(bg_b),
        .prim_q(prim_q), .rgbaq_q(rgbaq_q),
        .xyz2_q(xyz2_q), .xyzf2_q(xyzf2_q),
        .frame_1_q(frame_1_q), .zbuf_1_q(zbuf_1_q),
        .prim_complete(prim_complete),
        .prim_complete_count(prim_complete_count),
        .prim_v0_q(prim_v0_q), .prim_v1_q(prim_v1_q), .prim_v2_q(prim_v2_q),
        .prim_color_q(prim_color_q),
        .prim_color_v0_q(prim_color_v0_q),
        .prim_color_v1_q(prim_color_v1_q),
        .prim_color_v2_q(prim_color_v2_q),
        .prim_v0_decoded_q(prim_v0_decoded_q),
        .prim_v1_decoded_q(prim_v1_decoded_q),
        .prim_v2_decoded_q(prim_v2_decoded_q),
        .prim_v0_color_decoded_q(prim_v0_color_decoded_q),
        .prim_v1_color_decoded_q(prim_v1_color_decoded_q),
        .prim_v2_color_decoded_q(prim_v2_color_decoded_q),
        .pixel_emit(pixel_emit),
        .pixel_emit_count(pixel_emit_count),
        .pixel_x_q(pixel_x_q), .pixel_y_q(pixel_y_q),
        .pixel_color_q(pixel_color_q),
        .pixel_fbp_q(pixel_fbp_q),
        .pixel_fbw_q(pixel_fbw_q),
        .pixel_psm_q(pixel_psm_q),
        .pixel_fb_addr_q(pixel_fb_addr_q),
        .raster_pixel_emit(raster_pixel_emit),
        .raster_pixel_emit_count(raster_pixel_emit_count),
        .raster_pixel_x_q(raster_pixel_x_q),
        .raster_pixel_y_q(raster_pixel_y_q),
        .raster_pixel_color_q(raster_pixel_color_q),
        .raster_pixel_fb_addr_q(raster_pixel_fb_addr_q),
        .raster_active(raster_active),
        .raster_overflow(raster_overflow),
        .raster_degenerate(raster_degenerate),
        .ev_valid(gs_ev_valid), .ev_subsys(gs_ev_subsys),
        .ev_event(gs_ev_event),
        .ev_arg0(gs_ev_arg0), .ev_arg1(gs_ev_arg1),
        .ev_arg2(gs_ev_arg2), .ev_arg3(gs_ev_arg3),
        .ev_flags(gs_ev_flags)
    );

    trace_sink_stub #(.FILENAME("gif_raster_topleft_dmac.trace"), .SINK_LABEL("dmac"))
        u_trace_dmac (.clk(clk), .rst_n(rst_n),
            .ev_valid(dmac_ev_valid), .ev_subsys(dmac_ev_subsys),
            .ev_event(dmac_ev_event),
            .ev_arg0(dmac_ev_arg0), .ev_arg1(dmac_ev_arg1),
            .ev_arg2(dmac_ev_arg2), .ev_arg3(dmac_ev_arg3),
            .ev_flags(dmac_ev_flags));
    trace_sink_stub #(.FILENAME("gif_raster_topleft_gif.trace"), .SINK_LABEL("gif"))
        u_trace_gif (.clk(clk), .rst_n(rst_n),
            .ev_valid(gif_ev_valid), .ev_subsys(gif_ev_subsys),
            .ev_event(gif_ev_event),
            .ev_arg0(gif_ev_arg0), .ev_arg1(gif_ev_arg1),
            .ev_arg2(gif_ev_arg2), .ev_arg3(gif_ev_arg3),
            .ev_flags(gif_ev_flags));
    trace_sink_stub #(.FILENAME("gif_raster_topleft_gs.trace"), .SINK_LABEL("gs"))
        u_trace_gs (.clk(clk), .rst_n(rst_n),
            .ev_valid(gs_ev_valid), .ev_subsys(gs_ev_subsys),
            .ev_event(gs_ev_event),
            .ev_arg0(gs_ev_arg0), .ev_arg1(gs_ev_arg1),
            .ev_arg2(gs_ev_arg2), .ev_arg3(gs_ev_arg3),
            .ev_flags(gs_ev_flags));

    int dma_start_count, dma_done_count;
    int gs_prim_draw_count;
    int pixel_emit_pulse_count;
    int raster_pixel_pulse_count;
    int errors;

    initial begin
        dma_start_count = 0; dma_done_count = 0;
        gs_prim_draw_count = 0;
        pixel_emit_pulse_count = 0;
        raster_pixel_pulse_count = 0;
        errors = 0;
    end

    always_ff @(posedge clk) begin
        if (rst_n && dmac_ev_valid) begin
            if (dmac_ev_event == trace_pkg::EV_DMA_START) dma_start_count <= dma_start_count + 1;
            if (dmac_ev_event == trace_pkg::EV_DMA_DONE)  dma_done_count  <= dma_done_count  + 1;
        end
        if (rst_n && gs_ev_valid && gs_ev_event == trace_pkg::EV_PRIM_DRAW)
            gs_prim_draw_count <= gs_prim_draw_count + 1;
        if (rst_n && pixel_emit)        pixel_emit_pulse_count   <= pixel_emit_pulse_count   + 1;
        if (rst_n && raster_pixel_emit) raster_pixel_pulse_count <= raster_pixel_pulse_count + 1;
    end

    logic [11:0] cap_x       [0:3];
    logic [11:0] cap_y       [0:3];
    logic [31:0] cap_fb_addr [0:3];
    int          cap_idx;

    initial begin
        cap_idx = 0;
        for (int i = 0; i < 4; i = i + 1) begin
            cap_x[i] = 0; cap_y[i] = 0; cap_fb_addr[i] = 0;
        end
    end

    always_ff @(posedge clk) begin
        if (rst_n && raster_pixel_emit && cap_idx < 4) begin
            cap_x[cap_idx]       <= raster_pixel_x_q;
            cap_y[cap_idx]       <= raster_pixel_y_q;
            cap_fb_addr[cap_idx] <= raster_pixel_fb_addr_q;
            cap_idx              <= cap_idx + 1;
        end
    end

    localparam logic [7:0]  CHCR_OFF = 8'h00;
    localparam logic [7:0]  MADR_OFF = 8'h10;
    localparam logic [7:0]  QWC_OFF  = 8'h20;

    task automatic write_dmac(input logic [7:0] offset, input logic [31:0] data);
        @(negedge clk); dmac_reg_wr_en = 1'b1; dmac_reg_offset = offset; dmac_reg_wr_data = data;
        @(negedge clk); dmac_reg_wr_en = 1'b0; dmac_reg_offset = 8'd0; dmac_reg_wr_data = 32'd0;
    endtask

    task automatic preload_qword(input logic [RAM_ADDR_W-1:0] addr,
                                 input logic [127:0] data);
        @(negedge clk); ram_wr_en = 1'b1; ram_wr_addr = addr; ram_wr_data = data; ram_wr_be = 16'hFFFF;
        @(negedge clk); ram_wr_en = 1'b0; ram_wr_addr = '0; ram_wr_data = 128'd0; ram_wr_be = 16'd0;
    endtask

    task automatic run_burst(input logic [31:0] madr, input logic [31:0] qwc);
        write_dmac(MADR_OFF, madr);
        write_dmac(QWC_OFF,  qwc);
        write_dmac(CHCR_OFF, 32'h0000_0001);
        wait (raster_active == 1'b0);
        repeat (80) @(posedge clk);
    endtask

    function automatic logic [127:0] giftag(
        input logic [14:0] nloop, input logic eop,
        input logic [1:0] flg, input logic [3:0] nreg, input logic [63:0] regs);
        logic [63:0] lower;
        lower = {nreg, flg, 42'd0, eop, nloop};
        return {regs, lower};
    endfunction

    function automatic logic [127:0] aplusd_real(input logic [7:0]  reg_num,
                                                 input logic [63:0] data64);
        return {56'd0, reg_num, data64};
    endfunction

    function automatic logic [63:0] xyz2_data(input logic [11:0] x_int,
                                              input logic [11:0] y_int);
        return {32'd0, y_int, 4'd0, x_int, 4'd0};
    endfunction

    localparam logic [7:0] R_PRIM    = 8'h00;
    localparam logic [7:0] R_RGBAQ   = 8'h01;
    localparam logic [7:0] R_XYZ2    = 8'h05;
    localparam logic [7:0] R_FRAME_1 = 8'h4C;

    localparam logic [63:0] PRIM_TRIANGLE = 64'd3;
    localparam logic [63:0] FRAME_1_VAL   = 64'h0000_0000_000A_0002;
    localparam logic [63:0] RGBAQ_VAL     = 64'h0000_0000_FF00_30FF;

    initial begin
        rst_n = 1'b0;
        dmac_reg_wr_en = 1'b0; dmac_reg_offset = 8'd0; dmac_reg_wr_data = 32'd0;
        ram_wr_en = 1'b0; ram_wr_addr = '0; ram_wr_data = 128'd0; ram_wr_be = 16'd0;

        repeat (4) @(posedge clk); rst_n = 1'b1; repeat (8) @(posedge clk);

        begin : preload_block
            logic [RAM_ADDR_W-1:0] addr_q;

            // Burst 1 @ 0x100: CCW TRI A,B,C with FRAME_1+RGBAQ setup.
            // NREG=6: PRIM, FRAME_1, RGBAQ, A, B, C
            addr_q = 32'h100 + 32'd0;
            preload_qword(addr_q, giftag(15'd1, 1'b1, 2'd0, 4'd6,
                                         64'h0000_0000_00EE_EEEE));
            addr_q = 32'h100 + 32'd16;
            preload_qword(addr_q, aplusd_real(R_PRIM,    PRIM_TRIANGLE));
            addr_q = 32'h100 + 32'd32;
            preload_qword(addr_q, aplusd_real(R_FRAME_1, FRAME_1_VAL));
            addr_q = 32'h100 + 32'd48;
            preload_qword(addr_q, aplusd_real(R_RGBAQ,   RGBAQ_VAL));
            addr_q = 32'h100 + 32'd64;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd5, 12'd5)));    // A
            addr_q = 32'h100 + 32'd80;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd7, 12'd5)));    // B
            addr_q = 32'h100 + 32'd96;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd5, 12'd7)));    // C closes

            // Burst 2 @ 0x200: CW TRI B,C,D — FSM auto-swap to CCW.
            // NREG=4: PRIM, B, C, D
            addr_q = 32'h200 + 32'd0;
            preload_qword(addr_q, giftag(15'd1, 1'b1, 2'd0, 4'd4,
                                         64'h0000_0000_0000_EEEE));
            addr_q = 32'h200 + 32'd16;
            preload_qword(addr_q, aplusd_real(R_PRIM, PRIM_TRIANGLE));
            addr_q = 32'h200 + 32'd32;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd7, 12'd5)));    // B
            addr_q = 32'h200 + 32'd48;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd5, 12'd7)));    // C
            addr_q = 32'h200 + 32'd64;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd7, 12'd7)));    // D closes

            // Burst 3 @ 0x300: degenerate TRI (3 colinear pts on y=5).
            // NREG=4: PRIM, p1, p2, p3
            addr_q = 32'h300 + 32'd0;
            preload_qword(addr_q, giftag(15'd1, 1'b1, 2'd0, 4'd4,
                                         64'h0000_0000_0000_EEEE));
            addr_q = 32'h300 + 32'd16;
            preload_qword(addr_q, aplusd_real(R_PRIM, PRIM_TRIANGLE));
            addr_q = 32'h300 + 32'd32;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd5, 12'd5)));
            addr_q = 32'h300 + 32'd48;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd6, 12'd5)));
            addr_q = 32'h300 + 32'd64;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd7, 12'd5)));    // colinear close
        end

        run_burst(32'h0000_0100, 32'd7);  // Burst 1: 1 tag + 6 entries
        run_burst(32'h0000_0200, 32'd5);  // Burst 2: 1 tag + 4 entries
        run_burst(32'h0000_0300, 32'd5);  // Burst 3: 1 tag + 4 entries (degenerate)

        $display("[tb_ee_core_gif_raster_topleft] dma=%0d/%0d  prim_draw=%0d  pixel_emit=%0d  raster_emit=%0d  raster_overflow=%b  raster_degenerate=%b",
                 dma_start_count, dma_done_count, gs_prim_draw_count,
                 pixel_emit_pulse_count, raster_pixel_pulse_count,
                 raster_overflow, raster_degenerate);
        for (int i = 0; i < 4; i = i + 1) begin
            $display("[tb_ee_core_gif_raster_topleft] cap[%0d] (%0d,%0d) fb=0x%h",
                     i, cap_x[i], cap_y[i], cap_fb_addr[i]);
        end

        if (dma_start_count != 3)         begin $error("dma_start=%0d (expected 3)", dma_start_count); errors = errors + 1; end
        if (dma_done_count != 3)          begin $error("dma_done=%0d (expected 3)", dma_done_count); errors = errors + 1; end
        if (gs_prim_draw_count != 3)      begin $error("gs_prim_draw=%0d (expected 3)", gs_prim_draw_count); errors = errors + 1; end
        if (pixel_emit_count != 32'd3)    begin $error("pixel_emit_count=%0d (expected 3)", pixel_emit_count); errors = errors + 1; end
        if (raster_pixel_emit_count != 32'd4) begin $error("raster_pixel_emit_count=%0d (expected 4)", raster_pixel_emit_count); errors = errors + 1; end
        if (raster_pixel_pulse_count != 4) begin $error("raster_emit pulses=%0d (expected 4: 3 ABC + 1 BCD + 0 degenerate)", raster_pixel_pulse_count); errors = errors + 1; end
        if (raster_overflow !== 1'b0)     begin $error("raster_overflow=%b (expected 0; bursts gapped)", raster_overflow); errors = errors + 1; end
        if (raster_degenerate !== 1'b1)   begin $error("raster_degenerate=%b (expected 1 — Burst 3 triangle is degenerate)", raster_degenerate); errors = errors + 1; end

        // Burst 1 emits — CCW ABC top-left rule
        if (cap_x[0] !== 12'd6 || cap_y[0] !== 12'd5 || cap_fb_addr[0] !== 32'h0000_4218) begin
            $error("cap[0] (%0d,%0d) fb=0x%h (expected (6,5) 0x4218 — ABC top-row)", cap_x[0], cap_y[0], cap_fb_addr[0]); errors = errors + 1;
        end
        if (cap_x[1] !== 12'd7 || cap_y[1] !== 12'd5 || cap_fb_addr[1] !== 32'h0000_421C) begin
            $error("cap[1] (%0d,%0d) fb=0x%h (expected (7,5) 0x421C — ABC top-row)", cap_x[1], cap_y[1], cap_fb_addr[1]); errors = errors + 1;
        end
        if (cap_x[2] !== 12'd6 || cap_y[2] !== 12'd6 || cap_fb_addr[2] !== 32'h0000_4C18) begin
            $error("cap[2] (%0d,%0d) fb=0x%h (expected (6,6) 0x4C18 — ABC interior)", cap_x[2], cap_y[2], cap_fb_addr[2]); errors = errors + 1;
        end

        // Burst 2 emit — CW BCD post-swap
        if (cap_x[3] !== 12'd7 || cap_y[3] !== 12'd6 || cap_fb_addr[3] !== 32'h0000_4C1C) begin
            $error("cap[3] (%0d,%0d) fb=0x%h (expected (7,6) 0x4C1C — BCD post-swap)", cap_x[3], cap_y[3], cap_fb_addr[3]); errors = errors + 1;
        end

        // No-double-paint check: every captured pixel must be unique.
        // Specifically the shared edge BC pixels (7,5), (6,6), (5,7)
        // appear at most once across all four captures.
        for (int i = 0; i < 4; i = i + 1) begin
            for (int j = i + 1; j < 4; j = j + 1) begin
                if (cap_x[i] == cap_x[j] && cap_y[i] == cap_y[j]) begin
                    $error("DOUBLE-PAINT: cap[%0d] and cap[%0d] both at (%0d,%0d)",
                           i, j, cap_x[i], cap_y[i]);
                    errors = errors + 1;
                end
            end
        end

        if (errors == 0) $display("[tb_ee_core_gif_raster_topleft] PASS");
        else             $display("[tb_ee_core_gif_raster_topleft] FAIL");
        $finish;
    end

    initial begin
        #5000000;
        $error("[tb_ee_core_gif_raster_topleft] timeout");
        $finish;
    end

endmodule : tb_ee_core_gif_raster_topleft
