# Ch428 — missing blended population and logical 256x256 PSMT8

## Objective

Recover captured blended geometry omitted from the Ch427 baseline without
returning to draw-count churn: census the missing PSMT8 population, preserve
dump chronology, reject families that do not improve the PCSX2 comparison,
and require production RTL/silicon identity for any accepted addition.

## Population census

The frame contains two previously omitted PSMT8 ABE families before the final
opaque scene draws:

- 70 triangle-strip draws interleaved with the 766 accepted opaque strips;
- 240 triangle-list draws using a logical 256x256 PSMT8 texture, concentrated
  on the foreground character at draw indices 172601 through 175947.

The coverage planner now supports explicit ABE inclusion, primitive subsets,
and maximum draw-index boundaries while retaining its historical opaque-strip
default.

## Rejected interleaved-strip experiment

`zsrt139f30` inserted all 70 missing ABE strips in authentic dump order and
then retained the accepted CT32 and 93-draw alpha families.  Its 307-epoch
production RTL replay passed every structural gate and produced framebuffer
SHA-256
`5ec8549ab3b88d429403e5abe1a5074bd329eac576ed87421174b92c1dfe28ae`.

The addition changed only 836 pixels and slightly worsened the mapped PCSX2
score to MAE 18.9599 / RMSE 27.6639 from Ch427's 18.9384 / 27.6464.  It was
therefore rejected and never deployed to the board.

## Logical 256x256 texture support

The 240 triangle-list draws all share the same captured state and texture.
The fixture generator now preserves TEX0 logical TW/TH=8 while padding the
256x256 PSMT8 source row-by-row into the existing physical 512-texel LPDDR
cache stride.  No RTL or RBF change is required.  Fail-closed generation
checks require every logical row to match the reconstructed GS local memory
byte-for-byte and require the entire unused right/lower cache padding to be
zero.  The emitted descriptor was independently decoded as TBP=1024, TBW=8,
PSMT8, TW=8, TH=8; its texture CRC is `0x68e8cb9d`.

The independent software-reference path was also corrected to use logical
dimensions for UV wrap/clamp and sampling while retaining the physical
512-texel cache stride.

## Accepted f33 result

`zsrt139f33` preserves chronology by inserting the three capacity-packed
triangle-list epochs between Ch424 scene rows 122 and 123, before the final
two opaque scene epochs, CT32 darken, and complete alpha family.  The result
has 277 epochs.

Production RTL replay passed with:

- 1,326,469 fragments fed and 1,306,834 passed;
- 277 markers and drains;
- zero fragment drops, color overflows, and AXI errors;
- Z mismatch 0/307,200 and color mismatch 0/245,423;
- framebuffer SHA-256
  `c4e26d4f93d9b30f98b0abe0d99ccb4be8d362401b49f07ef76ca85c316b84de`.

Relative to Ch427, the recovered character family changes 249 pixels within
`(323,240)..(360,280)`.  The mapped PCSX2 score improves narrowly but in both
metrics, to MAE 18.9378 / RMSE 27.6458.  This is accepted as authentic local
detail, not claimed as a broad visual milestone.

## Silicon acceptance

The timing-clean Ch423 RBF remained loaded.  The DE25 completed all 277
epochs with every texture CRC, palette checksum, staged-record count, ordered
drain, and zero-drop gate passing; the host returned `rc=0` and selected the
HDMI line-buffer source.  The board dump reports 212,225 nonzero pixels,
bounds `(0,0)..(511,479)`, sum32 `0x9c95eca0`, and xor32 `0x6e5a9090`.

Board and production RTL framebuffer files are byte-identical at the SHA-256
above.  The accepted board image is preserved as
`captures/gs/silenthill3/extracted/sh3_zsrt139f33_ch428_board.png`.

Ch428 is accepted on silicon and f33 is the current live HDMI baseline.
