// retroDE_ps2 — tb_ee_core_gif_raster_queue (Ch87)
//
// Stress-test for the Ch87 2-entry raster command FIFO. The
// rasterizer's FSM scan + per-pixel Gouraud math takes more
// cycles than the inter-arrival gap of back-to-back A+D vertex
// commits in a TRI_STRIP, so without a queue the second and
// third primitive closes would land mid-scan and trigger
// raster_overflow (Ch84/Ch85/Ch86 behavior).
//
// Ch87 introduces a 2-entry FIFO that captures the per-prim
// context at every close cycle. Effective concurrency = 1
// in-flight + 2 queued = absorbs up to 3 back-to-back closes.
//
// Stream — single DMA burst, TRI_STRIP with 5 vertices:
//   q0  : GIFtag NLOOP=1 NREG=8 EOP=1 PACKED, REGS=[A+D × 8]
//   q1  : PRIM     = TRI_STRIP
//   q2  : FRAME_1  = {FBP=2, FBW=10, PSMCT32}
//   q3  : RGBAQ    (flat color, equal at all vertices — interp
//                   degenerates to flat with no rounding error)
//   q4  : XYZ2 v1=(2,2)
//   q5  : XYZ2 v2=(4,2)
//   q6  : XYZ2 v3=(2,4) — anchor close, triangle T1=(v1,v2,v3)
//   q7  : XYZ2 v4=(4,4) — saturated extension, T2=(v2,v3,v4)
//   q8  : XYZ2 v5=(2,6) — saturated extension, T3=(v3,v4,v5)
//
// Triangle expectations (using Ch85 top-left rule + Ch87 FIFO):
//   T1 = ((2,2), (4,2), (2,4)) — CCW. Inside: 3 pixels.
//      (3,2), (4,2), (3,3)
//   T2 = ((4,2), (2,4), (4,4)) raw → CW; FSM auto-swaps to
//        ((4,2), (4,4), (2,4)) CCW. Inside: 1 pixel.
//      (4,3)
//   T3 = ((2,4), (4,4), (2,6)) — CCW. Inside: 3 pixels.
//      (3,4), (4,4), (3,5)
//
// Total: 7 raster pixels. With FBP=2 / FBW=10 / PSMCT32, the
// expected fb_addrs (computed as 4096 + (y*640 + x)*4):
//   (3,2) → 0x240C
//   (4,2) → 0x2410
//   (3,3) → 0x2E0C
//   (4,3) → 0x2E10
//   (3,4) → 0x380C
//   (4,4) → 0x3810
//   (3,5) → 0x420C
//
// Pass criteria — the load-bearing Ch87 property is `raster_overflow == 0`
// despite three back-to-back primitive closes that would have
// previously dropped 2 of 3 primitives:
//   - DMA: 1 START / 1 DONE
//   - GS: 3 EV_PRIM_DRAW (anchor + 2 sat extensions)
//   - pixel_emit_count == 3 (Ch82 channel — one per close)
//   - raster_pixel_emit_count == 7 (3 + 1 + 3)
//   - raster_overflow == 0  ← the load-bearing claim
//   - raster_degenerate == 0
//   - per-pixel captures match the expected coords/fb_addrs

`timescale 1ns/1ps

module tb_ee_core_gif_raster_queue;

    localparam int RAM_SIZE_BYTES = 4 * 1024;
    localparam int RAM_ADDR_W     = $clog2(RAM_SIZE_BYTES);

    logic clk;
    logic rst_n;
    initial clk = 1'b0;
    always #5 clk = ~clk;

    logic                  ram_rd_en;
    logic [RAM_ADDR_W-1:0] ram_rd_addr;
    logic [127:0]          ram_rd_data;
    logic                  ram_rd_valid;
    logic                  ram_wr_en;
    logic [RAM_ADDR_W-1:0] ram_wr_addr;
    logic [127:0]          ram_wr_data;
    logic [15:0]           ram_wr_be;
    logic [7:0]            ram_master_id;

    ee_ram_stub #(.SIZE_BYTES(RAM_SIZE_BYTES)) u_ram (
        .clk(clk), .rst_n(rst_n),
        .rd_en(ram_rd_en), .rd_addr(ram_rd_addr),
        .rd_data(ram_rd_data), .rd_valid(ram_rd_valid),
        .wr_en(ram_wr_en), .wr_addr(ram_wr_addr),
        .wr_data(ram_wr_data), .wr_be(ram_wr_be),
        .master_id(ram_master_id),
        .ev_valid(), .ev_subsys(), .ev_event(),
        .ev_arg0(), .ev_arg1(), .ev_arg2(), .ev_arg3(), .ev_flags()
    );
    assign ram_master_id = ram_rd_en ? 8'd1 : 8'd0;

    logic        dmac_reg_wr_en;
    logic [7:0]  dmac_reg_offset;
    logic [31:0] dmac_reg_wr_data;
    logic        dmac_mem_rd_en;
    logic [31:0] dmac_mem_rd_addr;
    logic         dmac_gif_valid;
    logic [127:0] dmac_gif_data;
    logic         dmac_gif_last;
    logic         dmac_gif_ready;

    logic                dmac_ev_valid;
    trace_pkg::subsys_e  dmac_ev_subsys;
    trace_pkg::event_e   dmac_ev_event;
    logic [63:0]         dmac_ev_arg0, dmac_ev_arg1, dmac_ev_arg2, dmac_ev_arg3;
    logic [31:0]         dmac_ev_flags;

    logic [127:0] map_to_dmac_rd_data;
    logic         map_to_dmac_rd_valid;

    dmac_reg_stub u_dmac (
        .clk(clk), .rst_n(rst_n),
        .reg_wr_en(dmac_reg_wr_en), .reg_offset(dmac_reg_offset),
        .reg_wr_data(dmac_reg_wr_data),
        .reg_rd_en(1'b0), .reg_rd_data(), .reg_rd_valid(),
        .mem_rd_en(dmac_mem_rd_en), .mem_rd_addr(dmac_mem_rd_addr),
        .mem_rd_data(map_to_dmac_rd_data), .mem_rd_valid(map_to_dmac_rd_valid),
        .ep_valid(dmac_gif_valid), .ep_data(dmac_gif_data),
        .ep_last(dmac_gif_last), .ep_ready(dmac_gif_ready),
        .irq_completion_o(),
        .ev_valid(dmac_ev_valid), .ev_subsys(dmac_ev_subsys),
        .ev_event(dmac_ev_event),
        .ev_arg0(dmac_ev_arg0), .ev_arg1(dmac_ev_arg1),
        .ev_arg2(dmac_ev_arg2), .ev_arg3(dmac_ev_arg3),
        .ev_flags(dmac_ev_flags)
    );

    logic        map_ram_rd_en;
    logic [24:0] map_ram_rd_addr;
    ee_memory_map_stub u_map (
        .clk(clk), .rst_n(rst_n),
        .ee_rd_en(1'b0), .ee_rd_addr(32'd0),
        .ee_rd_data(), .ee_rd_valid(),
        .ee_wr_en(1'b0), .ee_wr_addr(32'd0),
        .ee_wr_data(32'd0), .ee_wr_be(4'd0),
        .dmac_rd_en(dmac_mem_rd_en), .dmac_rd_addr(dmac_mem_rd_addr),
        .dmac_rd_data(map_to_dmac_rd_data),
        .dmac_rd_valid(map_to_dmac_rd_valid),
        .bios_rd_en(), .bios_rd_addr(),
        .bios_rd_data(32'd0), .bios_rd_valid(1'b0),
        .ram_rd_en(map_ram_rd_en), .ram_rd_addr(map_ram_rd_addr),
        .ram_rd_data(ram_rd_data), .ram_rd_valid(ram_rd_valid),
        .bridge_wr_en(1'b0), .bridge_wr_addr(32'd0),
        .bridge_wr_data(128'd0), .bridge_wr_be(16'd0),
        .bridge_master_id(8'd0),
        .ram_wr_en(), .ram_wr_addr(), .ram_wr_data(),
        .ram_wr_be(), .ram_master_id(),
        .ee_dmac_ch2_wr_en(), .ee_dmac_ch2_wr_addr(), .ee_dmac_ch2_wr_data(),
        .ee_dmac_ch2_rd_en(), .ee_dmac_ch2_rd_addr(),
        .ee_dmac_ch2_rd_data(32'd0), .ee_dmac_ch2_rd_valid(1'b0),
        .ee_intc_wr_en(), .ee_intc_wr_addr(), .ee_intc_wr_data(),
        .ee_intc_rd_en(), .ee_intc_rd_addr(),
        .ee_intc_rd_data(32'd0), .ee_intc_rd_valid(1'b0),
        .ee_misc_mmio_wr_en(), .ee_misc_mmio_wr_addr(), .ee_misc_mmio_wr_data(), .ee_misc_mmio_wr_be(),
        .ee_misc_mmio_rd_en(), .ee_misc_mmio_rd_addr(),
        .ee_misc_mmio_rd_data(32'd0), .ee_misc_mmio_rd_valid(1'b0),
        .ee_biu_wr_en(), .ee_biu_wr_addr(), .ee_biu_wr_data(), .ee_biu_wr_be(),
        .ee_biu_rd_en(), .ee_biu_rd_addr(),
        .ee_biu_rd_data(32'd0), .ee_biu_rd_valid(1'b0),
        .ev_valid(), .ev_subsys(), .ev_event(),
        .ev_arg0(), .ev_arg1(), .ev_arg2(), .ev_arg3(), .ev_flags()
    );

    assign ram_rd_en   = map_ram_rd_en;
    assign ram_rd_addr = map_ram_rd_addr[RAM_ADDR_W-1:0];

    logic        gif_gs_wr_en;
    logic [15:0] gif_gs_wr_addr;
    logic [63:0] gif_gs_wr_data;
    logic        gif_gif_reg_wr_en;
    logic [7:0]  gif_gif_reg_num;
    logic [63:0] gif_gif_reg_data;

    logic                gif_ev_valid;
    trace_pkg::subsys_e  gif_ev_subsys;
    trace_pkg::event_e   gif_ev_event;
    logic [63:0]         gif_ev_arg0, gif_ev_arg1, gif_ev_arg2, gif_ev_arg3;
    logic [31:0]         gif_ev_flags;

    gif_packed_stub #(.REAL_AD_REG_MAP(1'b1)) u_gif (
        .clk(clk), .rst_n(rst_n),
        .in_valid(dmac_gif_valid), .in_data(dmac_gif_data),
        .in_last(dmac_gif_last), .in_ready(dmac_gif_ready),
        .image_data_ready(1'b1),
        .raster_fifo_full(1'b0),
        .gs_wr_en(gif_gs_wr_en), .gs_wr_addr(gif_gs_wr_addr),
        .gs_wr_data(gif_gs_wr_data),
        .gif_reg_wr_en(gif_gif_reg_wr_en),
        .gif_reg_num(gif_gif_reg_num),
        .gif_reg_data(gif_gif_reg_data),
        .ev_valid(gif_ev_valid), .ev_subsys(gif_ev_subsys),
        .ev_event(gif_ev_event),
        .ev_arg0(gif_ev_arg0), .ev_arg1(gif_ev_arg1),
        .ev_arg2(gif_ev_arg2), .ev_arg3(gif_ev_arg3),
        .ev_flags(gif_ev_flags)
    );

    logic [7:0]          bg_r, bg_g, bg_b;
    logic [63:0]         prim_q, rgbaq_q, xyz2_q, xyzf2_q, frame_1_q, zbuf_1_q;
    logic                prim_complete;
    logic [31:0]         prim_complete_count;
    logic [63:0]         prim_v0_q, prim_v1_q, prim_v2_q;
    logic [63:0]         prim_color_q;
    logic [63:0]         prim_color_v0_q, prim_color_v1_q, prim_color_v2_q;
    trace_pkg::vertex_t  prim_v0_decoded_q, prim_v1_decoded_q, prim_v2_decoded_q;
    trace_pkg::color_t   prim_v0_color_decoded_q, prim_v1_color_decoded_q, prim_v2_color_decoded_q;
    logic                pixel_emit;
    logic [31:0]         pixel_emit_count;
    logic [11:0]         pixel_x_q, pixel_y_q;
    logic [63:0]         pixel_color_q;
    logic [8:0]          pixel_fbp_q;
    logic [5:0]          pixel_fbw_q, pixel_psm_q;
    logic [31:0]         pixel_fb_addr_q;
    logic                raster_pixel_emit;
    logic [31:0]         raster_pixel_emit_count;
    logic [11:0]         raster_pixel_x_q, raster_pixel_y_q;
    logic [63:0]         raster_pixel_color_q;
    logic [31:0]         raster_pixel_fb_addr_q;
    logic                raster_active;
    logic                raster_overflow;
    logic                raster_degenerate;
    logic                gs_ev_valid;
    trace_pkg::subsys_e  gs_ev_subsys;
    trace_pkg::event_e   gs_ev_event;
    logic [63:0]         gs_ev_arg0, gs_ev_arg1, gs_ev_arg2, gs_ev_arg3;
    logic [31:0]         gs_ev_flags;

    gs_stub u_gs (
        .clk(clk), .rst_n(rst_n),
        .reg_wr_en(gif_gs_wr_en), .reg_wr_addr(gif_gs_wr_addr),
        .reg_wr_data(gif_gs_wr_data),
        .gif_reg_wr_en(gif_gif_reg_wr_en),
        .gif_reg_num(gif_gif_reg_num),
        .gif_reg_data(gif_gif_reg_data),
        .bg_r(bg_r), .bg_g(bg_g), .bg_b(bg_b),
        .prim_q(prim_q), .rgbaq_q(rgbaq_q),
        .xyz2_q(xyz2_q), .xyzf2_q(xyzf2_q),
        .frame_1_q(frame_1_q), .zbuf_1_q(zbuf_1_q),
        .prim_complete(prim_complete),
        .prim_complete_count(prim_complete_count),
        .prim_v0_q(prim_v0_q), .prim_v1_q(prim_v1_q), .prim_v2_q(prim_v2_q),
        .prim_color_q(prim_color_q),
        .prim_color_v0_q(prim_color_v0_q),
        .prim_color_v1_q(prim_color_v1_q),
        .prim_color_v2_q(prim_color_v2_q),
        .prim_v0_decoded_q(prim_v0_decoded_q),
        .prim_v1_decoded_q(prim_v1_decoded_q),
        .prim_v2_decoded_q(prim_v2_decoded_q),
        .prim_v0_color_decoded_q(prim_v0_color_decoded_q),
        .prim_v1_color_decoded_q(prim_v1_color_decoded_q),
        .prim_v2_color_decoded_q(prim_v2_color_decoded_q),
        .pixel_emit(pixel_emit),
        .pixel_emit_count(pixel_emit_count),
        .pixel_x_q(pixel_x_q), .pixel_y_q(pixel_y_q),
        .pixel_color_q(pixel_color_q),
        .pixel_fbp_q(pixel_fbp_q),
        .pixel_fbw_q(pixel_fbw_q),
        .pixel_psm_q(pixel_psm_q),
        .pixel_fb_addr_q(pixel_fb_addr_q),
        .raster_pixel_emit(raster_pixel_emit),
        .raster_pixel_emit_count(raster_pixel_emit_count),
        .raster_pixel_x_q(raster_pixel_x_q),
        .raster_pixel_y_q(raster_pixel_y_q),
        .raster_pixel_color_q(raster_pixel_color_q),
        .raster_pixel_fb_addr_q(raster_pixel_fb_addr_q),
        .raster_active(raster_active),
        .raster_overflow(raster_overflow),
        .raster_degenerate(raster_degenerate),
        .ev_valid(gs_ev_valid), .ev_subsys(gs_ev_subsys),
        .ev_event(gs_ev_event),
        .ev_arg0(gs_ev_arg0), .ev_arg1(gs_ev_arg1),
        .ev_arg2(gs_ev_arg2), .ev_arg3(gs_ev_arg3),
        .ev_flags(gs_ev_flags)
    );

    trace_sink_stub #(.FILENAME("gif_raster_queue_dmac.trace"), .SINK_LABEL("dmac"))
        u_trace_dmac (.clk(clk), .rst_n(rst_n),
            .ev_valid(dmac_ev_valid), .ev_subsys(dmac_ev_subsys),
            .ev_event(dmac_ev_event),
            .ev_arg0(dmac_ev_arg0), .ev_arg1(dmac_ev_arg1),
            .ev_arg2(dmac_ev_arg2), .ev_arg3(dmac_ev_arg3),
            .ev_flags(dmac_ev_flags));
    trace_sink_stub #(.FILENAME("gif_raster_queue_gif.trace"), .SINK_LABEL("gif"))
        u_trace_gif (.clk(clk), .rst_n(rst_n),
            .ev_valid(gif_ev_valid), .ev_subsys(gif_ev_subsys),
            .ev_event(gif_ev_event),
            .ev_arg0(gif_ev_arg0), .ev_arg1(gif_ev_arg1),
            .ev_arg2(gif_ev_arg2), .ev_arg3(gif_ev_arg3),
            .ev_flags(gif_ev_flags));
    trace_sink_stub #(.FILENAME("gif_raster_queue_gs.trace"), .SINK_LABEL("gs"))
        u_trace_gs (.clk(clk), .rst_n(rst_n),
            .ev_valid(gs_ev_valid), .ev_subsys(gs_ev_subsys),
            .ev_event(gs_ev_event),
            .ev_arg0(gs_ev_arg0), .ev_arg1(gs_ev_arg1),
            .ev_arg2(gs_ev_arg2), .ev_arg3(gs_ev_arg3),
            .ev_flags(gs_ev_flags));

    int dma_start_count, dma_done_count;
    int gs_prim_draw_count;
    int pixel_emit_pulse_count;
    int raster_pixel_pulse_count;
    int errors;
    logic dma_done_seen;

    initial begin
        dma_start_count = 0; dma_done_count = 0;
        gs_prim_draw_count = 0;
        pixel_emit_pulse_count = 0;
        raster_pixel_pulse_count = 0;
        errors = 0;
        dma_done_seen = 1'b0;
    end

    always_ff @(posedge clk) begin
        if (rst_n && dmac_ev_valid) begin
            if (dmac_ev_event == trace_pkg::EV_DMA_START) dma_start_count <= dma_start_count + 1;
            if (dmac_ev_event == trace_pkg::EV_DMA_DONE) begin
                dma_done_count <= dma_done_count + 1;
                dma_done_seen  <= 1'b1;
            end
        end
        if (rst_n && gs_ev_valid && gs_ev_event == trace_pkg::EV_PRIM_DRAW)
            gs_prim_draw_count <= gs_prim_draw_count + 1;
        if (rst_n && pixel_emit)        pixel_emit_pulse_count   <= pixel_emit_pulse_count   + 1;
        if (rst_n && raster_pixel_emit) raster_pixel_pulse_count <= raster_pixel_pulse_count + 1;
    end

    logic [11:0] cap_x       [0:6];
    logic [11:0] cap_y       [0:6];
    logic [31:0] cap_fb_addr [0:6];
    int          cap_idx;

    initial begin
        cap_idx = 0;
        for (int i = 0; i < 7; i = i + 1) begin
            cap_x[i] = 0; cap_y[i] = 0; cap_fb_addr[i] = 0;
        end
    end

    always_ff @(posedge clk) begin
        if (rst_n && raster_pixel_emit && cap_idx < 7) begin
            cap_x[cap_idx]       <= raster_pixel_x_q;
            cap_y[cap_idx]       <= raster_pixel_y_q;
            cap_fb_addr[cap_idx] <= raster_pixel_fb_addr_q;
            cap_idx              <= cap_idx + 1;
        end
    end

    localparam logic [7:0]  CHCR_OFF = 8'h00;
    localparam logic [7:0]  MADR_OFF = 8'h10;
    localparam logic [7:0]  QWC_OFF  = 8'h20;
    localparam logic [31:0] PAYLOAD_MADR = 32'h0000_0100;
    localparam int          NUM_QWORDS = 9;

    task automatic write_dmac(input logic [7:0] offset, input logic [31:0] data);
        @(negedge clk); dmac_reg_wr_en = 1'b1; dmac_reg_offset = offset; dmac_reg_wr_data = data;
        @(negedge clk); dmac_reg_wr_en = 1'b0; dmac_reg_offset = 8'd0; dmac_reg_wr_data = 32'd0;
    endtask

    task automatic preload_qword(input logic [RAM_ADDR_W-1:0] addr,
                                 input logic [127:0] data);
        @(negedge clk); ram_wr_en = 1'b1; ram_wr_addr = addr; ram_wr_data = data; ram_wr_be = 16'hFFFF;
        @(negedge clk); ram_wr_en = 1'b0; ram_wr_addr = '0; ram_wr_data = 128'd0; ram_wr_be = 16'd0;
    endtask

    function automatic logic [127:0] giftag(
        input logic [14:0] nloop, input logic eop,
        input logic [1:0] flg, input logic [3:0] nreg, input logic [63:0] regs);
        logic [63:0] lower;
        lower = {nreg, flg, 42'd0, eop, nloop};
        return {regs, lower};
    endfunction

    function automatic logic [127:0] aplusd_real(input logic [7:0]  reg_num,
                                                 input logic [63:0] data64);
        return {56'd0, reg_num, data64};
    endfunction

    function automatic logic [63:0] xyz2_data(input logic [11:0] x_int,
                                              input logic [11:0] y_int);
        return {32'd0, y_int, 4'd0, x_int, 4'd0};
    endfunction

    localparam logic [7:0] R_PRIM    = 8'h00;
    localparam logic [7:0] R_RGBAQ   = 8'h01;
    localparam logic [7:0] R_XYZ2    = 8'h05;
    localparam logic [7:0] R_FRAME_1 = 8'h4C;

    localparam logic [63:0] PRIM_TRI_STRIP = 64'd4;
    localparam logic [63:0] FRAME_1_VAL    = 64'h0000_0000_000A_0002;
    localparam logic [63:0] RGBAQ_VAL      = 64'h0000_0000_FF00_30FF;

    initial begin
        rst_n = 1'b0;
        dmac_reg_wr_en = 1'b0; dmac_reg_offset = 8'd0; dmac_reg_wr_data = 32'd0;
        ram_wr_en = 1'b0; ram_wr_addr = '0; ram_wr_data = 128'd0; ram_wr_be = 16'd0;

        repeat (4) @(posedge clk); rst_n = 1'b1; repeat (8) @(posedge clk);

        begin : preload_block
            logic [RAM_ADDR_W-1:0] addr_q;

            // TRI_STRIP — 5 vertices, 3 closes (anchor + 2 sat ext).
            // NREG=8: PRIM, FRAME_1, RGBAQ, v1, v2, v3, v4, v5.
            addr_q = PAYLOAD_MADR + 32'd0;
            preload_qword(addr_q, giftag(15'd1, 1'b1, 2'd0, 4'd8,
                                         64'h0000_0000_EEEE_EEEE));
            addr_q = PAYLOAD_MADR + 32'd16;
            preload_qword(addr_q, aplusd_real(R_PRIM,    PRIM_TRI_STRIP));
            addr_q = PAYLOAD_MADR + 32'd32;
            preload_qword(addr_q, aplusd_real(R_FRAME_1, FRAME_1_VAL));
            addr_q = PAYLOAD_MADR + 32'd48;
            preload_qword(addr_q, aplusd_real(R_RGBAQ,   RGBAQ_VAL));
            addr_q = PAYLOAD_MADR + 32'd64;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd2, 12'd2)));   // v1
            addr_q = PAYLOAD_MADR + 32'd80;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd4, 12'd2)));   // v2
            addr_q = PAYLOAD_MADR + 32'd96;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd2, 12'd4)));   // v3 — anchor close (T1)
            addr_q = PAYLOAD_MADR + 32'd112;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd4, 12'd4)));   // v4 — sat extension (T2)
            addr_q = PAYLOAD_MADR + 32'd128;
            preload_qword(addr_q, aplusd_real(R_XYZ2, xyz2_data(12'd2, 12'd6)));   // v5 — sat extension (T3)
        end

        write_dmac(MADR_OFF, PAYLOAD_MADR);
        write_dmac(QWC_OFF,  NUM_QWORDS);
        write_dmac(CHCR_OFF, 32'h0000_0001);

        wait (dma_done_seen == 1'b1);
        wait (raster_active == 1'b0);
        repeat (80) @(posedge clk);

        $display("[tb_ee_core_gif_raster_queue] dma=%0d/%0d  prim_draw=%0d  pixel_emit=%0d  raster_emit=%0d  raster_overflow=%b  raster_degenerate=%b",
                 dma_start_count, dma_done_count, gs_prim_draw_count,
                 pixel_emit_pulse_count, raster_pixel_pulse_count,
                 raster_overflow, raster_degenerate);
        for (int i = 0; i < 7; i = i + 1) begin
            $display("[tb_ee_core_gif_raster_queue] cap[%0d] (%0d,%0d) fb=0x%h",
                     i, cap_x[i], cap_y[i], cap_fb_addr[i]);
        end

        if (dma_start_count != 1)         begin $error("dma_start"); errors = errors + 1; end
        if (dma_done_count != 1)          begin $error("dma_done"); errors = errors + 1; end
        if (gs_prim_draw_count != 3)      begin $error("gs_prim_draw=%0d (expected 3)", gs_prim_draw_count); errors = errors + 1; end
        if (pixel_emit_count != 32'd3)    begin $error("pixel_emit_count=%0d (expected 3)", pixel_emit_count); errors = errors + 1; end
        if (raster_pixel_emit_count != 32'd7) begin $error("raster_pixel_emit_count=%0d (expected 7)", raster_pixel_emit_count); errors = errors + 1; end
        if (raster_pixel_pulse_count != 7) begin $error("raster_emit pulses=%0d (expected 7)", raster_pixel_pulse_count); errors = errors + 1; end
        // *** Load-bearing assertion ***: the 2nd and 3rd primitive
        // closes happen mid-scan-of-T1 / mid-scan-of-T2; without
        // the Ch87 FIFO the FSM would have dropped them and
        // raster_overflow would latch high.
        if (raster_overflow !== 1'b0)     begin $error("raster_overflow=%b — back-to-back closes leaked past 2-entry FIFO!", raster_overflow); errors = errors + 1; end
        if (raster_degenerate !== 1'b0)   begin $error("raster_degenerate=%b (expected 0; non-degenerate triangles)", raster_degenerate); errors = errors + 1; end

        // T1 emits — ((2,2)/(4,2)/(2,4)) CCW, top-left rule
        if (cap_x[0] !== 12'd3 || cap_y[0] !== 12'd2 || cap_fb_addr[0] !== 32'h0000_240C) begin
            $error("cap[0] (%0d,%0d) fb=0x%h (expected (3,2) 0x240C)", cap_x[0], cap_y[0], cap_fb_addr[0]); errors = errors + 1;
        end
        if (cap_x[1] !== 12'd4 || cap_y[1] !== 12'd2 || cap_fb_addr[1] !== 32'h0000_2410) begin
            $error("cap[1] (%0d,%0d) fb=0x%h (expected (4,2) 0x2410)", cap_x[1], cap_y[1], cap_fb_addr[1]); errors = errors + 1;
        end
        if (cap_x[2] !== 12'd3 || cap_y[2] !== 12'd3 || cap_fb_addr[2] !== 32'h0000_2E0C) begin
            $error("cap[2] (%0d,%0d) fb=0x%h (expected (3,3) 0x2E0C)", cap_x[2], cap_y[2], cap_fb_addr[2]); errors = errors + 1;
        end

        // T2 emit (queued, dequeued after T1 SCAN ends)
        if (cap_x[3] !== 12'd4 || cap_y[3] !== 12'd3 || cap_fb_addr[3] !== 32'h0000_2E10) begin
            $error("cap[3] (%0d,%0d) fb=0x%h (expected (4,3) 0x2E10 — T2 saturated extension survived FIFO)", cap_x[3], cap_y[3], cap_fb_addr[3]); errors = errors + 1;
        end

        // T3 emits (deepest queue position, dequeued after T2 SCAN ends)
        if (cap_x[4] !== 12'd3 || cap_y[4] !== 12'd4 || cap_fb_addr[4] !== 32'h0000_380C) begin
            $error("cap[4] (%0d,%0d) fb=0x%h (expected (3,4) 0x380C — T3 survived 2-deep queue)", cap_x[4], cap_y[4], cap_fb_addr[4]); errors = errors + 1;
        end
        if (cap_x[5] !== 12'd4 || cap_y[5] !== 12'd4 || cap_fb_addr[5] !== 32'h0000_3810) begin
            $error("cap[5] (%0d,%0d) fb=0x%h (expected (4,4) 0x3810)", cap_x[5], cap_y[5], cap_fb_addr[5]); errors = errors + 1;
        end
        if (cap_x[6] !== 12'd3 || cap_y[6] !== 12'd5 || cap_fb_addr[6] !== 32'h0000_420C) begin
            $error("cap[6] (%0d,%0d) fb=0x%h (expected (3,5) 0x420C)", cap_x[6], cap_y[6], cap_fb_addr[6]); errors = errors + 1;
        end

        if (errors == 0) $display("[tb_ee_core_gif_raster_queue] PASS");
        else             $display("[tb_ee_core_gif_raster_queue] FAIL");
        $finish;
    end

    initial begin
        #5000000;
        $error("[tb_ee_core_gif_raster_queue] timeout");
        $finish;
    end

endmodule : tb_ee_core_gif_raster_queue
